*/
void TEMPLATE_emit_node(ir_node *irn, void *env) {
emit_env_t *emit_env = env;
- firm_dbg_module_t *mod = emit_env->mod;
FILE *F = emit_env->out;
ir_op *op = get_irn_op(irn);
+ DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
#include "bearch_TEMPLATE_t.h"
typedef struct _emit_env_t {
- firm_dbg_module_t *mod;
FILE *out;
const arch_env_t *arch_env;
const TEMPLATE_code_gen_t *cg;
+ DEBUG_ONLY(firm_dbg_module_t *mod;)
} emit_env_t;
const lc_arg_env_t *TEMPLATE_get_arg_env(void);
FILE *out; /* output file */
const arch_env_t *arch_env; /* the arch env */
set *reg_set; /* set to memorize registers for FIRM nodes (e.g. phi) */
- firm_dbg_module_t *mod; /* debugging module */
int emit_decls; /* flag indicating if decls were already emitted */
const be_irg_t *birg; /* The be-irg (contains additional information about the irg) */
+ DEBUG_ONLY(firm_dbg_module_t *mod;) /* debugging module */
} TEMPLATE_code_gen_t;
/* this is a struct to minimize the number of parameters
for transformation walker */
typedef struct _TEMPLATE_transform_env_t {
- firm_dbg_module_t *mod; /**< The firm debugger */
dbg_info *dbg; /**< The node debug info */
ir_graph *irg; /**< The irg, the node should be created in */
ir_node *block; /**< The block, the node should belong to */
ir_node *irn; /**< The irn, to be transformed */
ir_mode *mode; /**< The mode of the irn */
+ DEBUG_ONLY(firm_dbg_module_t *mod;) /**< The firm debugger */
} TEMPLATE_transform_env_t;
*/
static void arm_emit_node(const ir_node *irn, void *env) {
arm_emit_env_t *emit_env = env;
- firm_dbg_module_t *mod = emit_env->mod;
FILE *F = emit_env->out;
ir_op *op = get_irn_op(irn);
+ DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
#include "bearch_arm_t.h"
typedef struct _arm_emit_env_t {
- firm_dbg_module_t *mod;
FILE *out;
const arch_env_t *arch_env;
const arm_code_gen_t *cg;
+ DEBUG_ONLY(firm_dbg_module_t *mod;)
} arm_emit_env_t;
const lc_arg_env_t *arm_get_arg_env(void);
const_env.dbg = dbg;
const_env.irg = irg;
const_env.irn = node;
- const_env.mod = env->mod;
+ DEBUG_ONLY(const_env.mod = env->mod;)
const_env.mode = mode_Iu;
src_copy = be_new_Copy(&arm_reg_classes[CLASS_arm_general_purpose], irg, block, src);
tenv.dbg = get_irn_dbg_info(pred);
tenv.irg = current_ir_graph;
tenv.irn = pred;
- tenv.mod = cgenv->mod;
+ DEBUG_ONLY(tenv.mod = cgenv->mod;)
tenv.mode = get_irn_mode(pred);
const_graph = create_const_graph(&tenv);
set_irn_n(node, i, const_graph);
tenv.dbg = get_irn_dbg_info(pred);
tenv.irg = current_ir_graph;
tenv.irn = pred;
- tenv.mod = cgenv->mod;
+ DEBUG_ONLY(tenv.mod = cgenv->mod;)
tenv.mode = get_irn_mode(pred);
const_graph = create_const_graph(&tenv);
set_irn_n(node, i, const_graph);
tenv.dbg = get_irn_dbg_info(node);
tenv.irg = current_ir_graph;
tenv.irn = node;
- tenv.mod = cgenv->mod;
+ DEBUG_ONLY(tenv.mod = cgenv->mod;)
tenv.mode = get_irn_mode(node);
#define UNOP(a) case iro_##a: asm_node = gen_##a(&tenv, get_##a##_op(node)); break
FILE *out; /**< output file */
const arch_env_t *arch_env; /**< the arch env */
set *reg_set; /**< set to memorize registers for FIRM nodes (e.g. phi) */
- firm_dbg_module_t *mod; /**< debugging module */
int emit_decls; /**< flag indicating if decls were already emitted */
const be_irg_t *birg; /**< The be-irg (contains additional information about the irg) */
ir_type *int_tp; /**< the int type, needed for Call conversion */
+ DEBUG_ONLY(firm_dbg_module_t *mod;) /**< debugging module */
} arm_code_gen_t;
/* this is a struct to minimize the number of parameters
for transformation walker */
typedef struct _arm_transform_env_t {
- firm_dbg_module_t *mod; /**< The firm debugger */
dbg_info *dbg; /**< The node debug info */
ir_graph *irg; /**< The irg, the node should be created in */
ir_node *block; /**< The block, the node should belong to */
ir_node *irn; /**< The irn, to be transformed */
ir_mode *mode; /**< The mode of the irn */
-// arm_code_gen_t *cg; /**< The code generator */
+ DEBUG_ONLY(firm_dbg_module_t *mod;) /**< The firm debugger */
} arm_transform_env_t;
struct _be_options_t *options;
struct _arch_code_generator_t *cg;
struct _arch_irn_handler_t *phi_handler;
- firm_dbg_module_t *dbg;
+ DEBUG_ONLY(firm_dbg_module_t *dbg;)
};
struct _be_irg_t {
struct _be_abi_irg_t {
struct obstack obst;
- firm_dbg_module_t *dbg; /**< The debugging module. */
be_stack_frame_t *frame; /**< The stack frame model. */
const be_irg_t *birg; /**< The back end IRG. */
const arch_isa_t *isa; /**< The isa. */
arch_irn_handler_t irn_handler;
arch_irn_ops_t irn_ops;
+ DEBUG_ONLY(firm_dbg_module_t *dbg;) /**< The debugging module. */
};
#define get_abi_from_handler(ptr) firm_container_of(ptr, be_abi_irg_t, irn_handler)
*/
static void modify_irg(be_abi_irg_t *env)
{
- firm_dbg_module_t *dbg = env->dbg;
be_abi_call_t *call = env->call;
const arch_isa_t *isa = env->birg->main_env->arch_env->isa;
const arch_register_t *sp = arch_isa_sp(isa);
pset *dont_save = pset_new_ptr(8);
int n_params = get_method_n_params(method_type);
int max_arg = 0;
+ DEBUG_ONLY(firm_dbg_module_t *dbg = env->dbg;)
int i, j, n;
typedef struct _be_chordal_alloc_env_t {
be_chordal_env_t *chordal_env;
- firm_dbg_module_t *constr_dbg; /**< Debug output for the constraint handler. */
pset *pre_colored; /**< Set of precolored nodes. */
bitset_t *live; /**< A liveness bitset. */
bitset_t *tmp_colors; /**< An auxiliary bitset which is as long as the number of colors in the class. */
bitset_t *in_colors; /**< Colors used by live in values. */
bitset_t *ignore_regs; /**< A bitset of all ignore registers in the current class. */
int colors_n; /**< The number of colors. */
+ DEBUG_ONLY(firm_dbg_module_t *constr_dbg;) /**< Debug output for the constraint handler. */
} be_chordal_alloc_env_t;
#include "fourcc.h"
{
be_chordal_env_t *env = alloc_env->chordal_env;
const arch_env_t *aenv = env->birg->main_env->arch_env;
- firm_dbg_module_t *dbg = alloc_env->constr_dbg;
insn_t *insn = *the_insn;
ir_node *bl = get_nodes_block(insn->irn);
ir_node *copy = NULL;
ir_node *perm = NULL;
bitset_t *out_constr = bitset_alloca(env->cls->n_regs);
bitset_t *bs = bitset_alloca(env->cls->n_regs);
+ DEBUG_ONLY(firm_dbg_module_t *dbg = alloc_env->constr_dbg;)
int i;
correctly precolored. These Perms arise during the ABI handling phase.
*/
if(insn->has_constraints) {
- firm_dbg_module_t *dbg = alloc_env->constr_dbg;
const arch_env_t *aenv = env->birg->main_env->arch_env;
int n_regs = env->cls->n_regs;
bitset_t *bs = bitset_alloca(n_regs);
bipartite_t *bp = bipartite_new(n_regs, n_regs);
int *assignment = alloca(n_regs * sizeof(assignment[0]));
pmap *partners = pmap_create();
+ DEBUG_ONLY(firm_dbg_module_t *dbg = alloc_env->constr_dbg;)
int i, n_alloc;
long col;
be_chordal_alloc_env_t *alloc_env = env_ptr;
be_chordal_env_t *env = alloc_env->chordal_env;
bitset_t *live = alloc_env->live;
- firm_dbg_module_t *dbg = env->dbg;
ir_node *irn;
+ DEBUG_ONLY(firm_dbg_module_t *dbg = env->dbg;)
int i, n;
unsigned step = 0;
{
be_chordal_alloc_env_t *alloc_env = env_ptr;
be_chordal_env_t *env = alloc_env->chordal_env;
- firm_dbg_module_t *dbg = env->dbg;
bitset_t *live = alloc_env->live;
bitset_t *colors = alloc_env->colors;
bitset_t *in_colors = alloc_env->in_colors;
const arch_env_t *arch_env = env->birg->main_env->arch_env;
+ DEBUG_ONLY(firm_dbg_module_t *dbg = env->dbg;)
const ir_node *irn;
border_t *b;
void be_ra_chordal_check(be_chordal_env_t *chordal_env) {
- firm_dbg_module_t *dbg = chordal_env->dbg;
const arch_env_t *arch_env = chordal_env->birg->main_env->arch_env;
struct obstack ob;
pmap_entry *pme;
ir_node **nodes, *n1, *n2;
int i, o;
+ DEBUG_ONLY(firm_dbg_module_t *dbg = chordal_env->dbg;)
/* Collect all irns */
obstack_init(&ob);
static void check_pressure_walker(ir_node *bl, void *data)
{
be_chordal_env_t *env = data;
- firm_dbg_module_t *dbg = env->dbg;
int n_regs = arch_register_class_n_regs(env->cls);
pset *live = pset_new_ptr_default();
int step = 0;
ir_node *irn;
irn_live_t *li;
+ DEBUG_ONLY(firm_dbg_module_t *dbg = env->dbg;)
live_foreach(bl, li) {
if(live_is_end(li) && chordal_has_class(env, li->irn)) {
struct _be_chordal_env_t {
struct obstack obst; /**< An obstack for temporary storage. */
be_ra_chordal_opts_t *opts; /**< A pointer to the chordal ra options. */
- firm_dbg_module_t *dbg; /**< Debug module for the chordal register allocator. */
const be_irg_t *birg; /**< Back-end IRG session. */
dom_front_info_t *dom_front; /**< Dominance frontiers. */
ir_graph *irg; /**< The graph under examination. */
pmap *border_heads; /**< Maps blocks to border heads. */
be_ifg_t *ifg; /**< The interference graph. */
void *data; /**< Some pointer, to which different phases can attach data to. */
+ DEBUG_ONLY(firm_dbg_module_t *dbg;) /**< Debug module for the chordal register allocator. */
};
static INLINE struct list_head *_get_block_border_head(const be_chordal_env_t *inf, ir_node *bl) {
#include "becopystat.h"
#include "bitset.h"
-static firm_dbg_module_t *dbg = NULL;
+DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
#define SEARCH_FREE_COLORS
#define DEBUG_LVL 1
typedef struct _local_env_t {
- firm_dbg_module_t *dbg;
double time_limit;
int first_x_var, last_x_var;
pmap *nr_2_irn;
+ DEBUG_ONLY(firm_dbg_module_t *dbg;)
} local_env_t;
static void build_coloring_cstr(ilp_env_t *ienv) {
******************************************************************************/
-static firm_dbg_module_t *dbg = NULL;
+DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
void be_copy_opt_init(void) {
}
#define DO_ILP2
#define DEBUG_LVL SET_LEVEL_1
-static firm_dbg_module_t *dbg = NULL;
+DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
#define MAX_ARITY 20
#define MAX_CLS_SIZE 20
pset *ready_set;
pset *already_scheduled;
ir_node *block;
- firm_dbg_module_t *dbg;
const list_sched_selector_t *selector;
void *selector_block_env;
+ DEBUG_ONLY(firm_dbg_module_t *dbg;)
} block_sched_env_t;
/**
typedef struct _lower_env_t {
be_chordal_env_t *chord_env;
int do_copy;
- firm_dbg_module_t *dbg_module;
+ DEBUG_ONLY(firm_dbg_module_t *dbg_module;)
} lower_env_t;
/* holds a perm register pair */
static void lower_perm_node(ir_node *irn, void *walk_env) {
const arch_register_class_t *reg_class;
const arch_env_t *arch_env;
- firm_dbg_module_t *mod;
lower_env_t *env = walk_env;
reg_pair_t *pairs;
const ir_edge_t *edge;
ir_node *sched_point, *block, *in[2];
ir_node *arg1, *arg2, *res1, *res2;
ir_node *cpyxchg = NULL;
+ DEBUG_ONLY(firm_dbg_module_t *mod;)
arch_env = env->chord_env->birg->main_env->arch_env;
do_copy = env->do_copy;
- mod = env->dbg_module;
+ DEBUG_ONLY(mod = env->dbg_module;)
block = get_nodes_block(irn);
/*
* Environment with all the needed stuff
*/
typedef struct _be_raext_env_t {
- firm_dbg_module_t *dbg;
arch_env_t *aenv;
const arch_register_class_t *cls;
ir_graph *irg;
set *vars; /**< contains all var_info_t */
int n_cls_vars; /**< length of the array cls_vars */
var_info_t **cls_vars; /**< only the var_infos for current cls. needed for double iterating */
+ DEBUG_ONLY(firm_dbg_module_t *dbg;)
} be_raext_env_t;
} spill_ctx_t;
struct _spill_env_t {
- firm_dbg_module_t *dbg;
const arch_register_class_t *cls;
const be_chordal_env_t *chordal_env;
struct obstack obst;
pset *mem_phis; /**< set of all special spilled phis. allocated and freed seperately */
decide_irn_t is_mem_phi; /**< callback func to decide if a phi needs special spilling */
void *data; /**< data passed to all callbacks */
+ DEBUG_ONLY(firm_dbg_module_t *dbg;)
};
static int cmp_spillctx(const void *a, const void *b, size_t n) {
return ! (xx->spilled_node == yy->spilled_node);
}
-spill_env_t *be_new_spill_env(firm_dbg_module_t *dbg,
- const be_chordal_env_t *chordal_env,
- decide_irn_t is_mem_phi, void *data) {
-
+spill_env_t *be_new_spill_env(const be_chordal_env_t *chordal_env, decide_irn_t is_mem_phi, void *data) {
spill_env_t *env = xmalloc(sizeof(env[0]));
env->spill_ctxs = new_set(cmp_spillctx, 1024);
env->spills = new_set(cmp_spillinfo, 1024);
env->cls = chordal_env->cls;
- env->dbg = dbg;
env->is_mem_phi = is_mem_phi;
env->data = data;
env->chordal_env = chordal_env;
} spill_slot_t;
typedef struct _ss_env_t {
- firm_dbg_module_t *dbg;
struct obstack ob;
be_chordal_env_t *cenv;
pmap *slots; /* maps spill_contexts to spill_slots */
- pmap *types; /* maps modes to types */
+ pmap *types; /* maps modes to types */
+ DEBUG_ONLY(firm_dbg_module_t *dbg;)
} ss_env_t;
typedef int(*decide_irn_t)(const ir_node*, void*);
-spill_env_t *be_new_spill_env(
- firm_dbg_module_t *dbg,
- const be_chordal_env_t *chordal,
- decide_irn_t is_mem_phi,
- void *data);
+spill_env_t *be_new_spill_env(const be_chordal_env_t *chordal, decide_irn_t is_mem_phi, void *data);
void be_delete_spill_env(spill_env_t *senv);
#define DBG_SLOTS 32
#define DBG_TRACE 64
#define DEBUG_LVL 0 //(DBG_START | DBG_DECIDE | DBG_WSETS | DBG_FIX | DBG_SPILL)
-static firm_dbg_module_t *dbg = NULL;
+DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
#define MIN(a,b) (((a)<(b))?(a):(b))
/* init belady env */
obstack_init(&bel.ob);
- bel.arch = chordal_env->birg->main_env->arch_env;
- bel.cls = chordal_env->cls;
- bel.n_regs = arch_register_class_n_regs(bel.cls);
- bel.ws = new_workset(&bel.ob, &bel);
- bel.uses = be_begin_uses(chordal_env->irg, chordal_env->birg->main_env->arch_env, bel.cls);
- bel.senv = be_new_spill_env(dbg, chordal_env, is_mem_phi, NULL);
- bel.reloads = pset_new_ptr_default();
- bel.copies = pset_new_ptr_default();
+ bel.arch = chordal_env->birg->main_env->arch_env;
+ bel.cls = chordal_env->cls;
+ bel.n_regs = arch_register_class_n_regs(bel.cls);
+ bel.ws = new_workset(&bel.ob, &bel);
+ bel.uses = be_begin_uses(chordal_env->irg, chordal_env->birg->main_env->arch_env, bel.cls);
+ bel.senv = be_new_spill_env(chordal_env, is_mem_phi, NULL);
+ DEBUG_ONLY(bel.senv->dbg = dbg;)
+ bel.reloads = pset_new_ptr_default();
+ bel.copies = pset_new_ptr_default();
DBG((dbg, LEVEL_1, "running on register class: %s\n", bel.cls->name));
spill_stat_t stats;
const arch_register_class_t *cls;
const be_chordal_env_t *chordal_env;
- firm_dbg_module_t *dbg;
lpp_t *lpp;
set *irn_use_heads;
set *live_ranges;
struct obstack *obst;
int enable_store : 1;
int enable_remat : 1;
+ DEBUG_ONLY(firm_dbg_module_t *dbg;)
} spill_ilp_t;
typedef struct _live_range_t live_range_t;
memset(&si.stats, 0, sizeof(si.stats));
si.chordal_env = chordal_env;
si.obst = &obst;
- si.senv = be_new_spill_env(si.dbg, chordal_env, is_mem_phi, &si);
+ si.senv = be_new_spill_env(chordal_env, is_mem_phi, &si);
+ DEBUG_ONLY(si.senv->dbg = si.dbg;)
si.cls = chordal_env->cls;
si.lpp = new_lpp(problem_name, lpp_minimize);
si.irn_use_heads = new_set(cmp_irn_use_head, 4096);
si.enable_store = 1;
FIRM_DBG_REGISTER(si.dbg, "firm.be.ra.spillilp");
- firm_dbg_set_mask(si.dbg, DBG_LEVEL);
irg_block_walk_graph(chordal_env->irg, process_block, NULL, &si);
if(si.enable_store)
add_store_costs(&si);
#include "benode_t.h"
#include "besched_t.h"
-static firm_dbg_module_t *dbg = NULL;
+DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
#define DUMP_GRAPHS
#define get_chordal_arch(ce) ((ce)->birg->main_env->arch_env)
struct _be_uses_t {
set *uses;
ir_graph *irg;
- firm_dbg_module_t *dbg;
const arch_env_t *arch_env;
+ DEBUG_ONLY(firm_dbg_module_t *dbg;)
};
*/
static void ia32_prepare_graph(void *self) {
ia32_code_gen_t *cg = self;
- firm_dbg_module_t *old_mod = cg->mod;
+ DEBUG_ONLY(firm_dbg_module_t *old_mod = cg->mod;)
FIRM_DBG_REGISTER(cg->mod, "firm.be.ia32.transform");
irg_walk_blkwise_graph(cg->irg, ia32_place_consts_set_modes, ia32_transform_node, cg);
be_dump(cg->irg, "-transformed", dump_ir_block_graph_sched);
- cg->mod = old_mod;
+ DEBUG_ONLY(cg->mod = old_mod;)
if (cg->opt.doam) {
edges_deactivate(cg->irg);
tenv.dbg = get_irn_dbg_info(node);
tenv.irg = current_ir_graph;
tenv.irn = node;
- tenv.mod = cg->mod;
+ DEBUG_ONLY(tenv.mod = cg->mod;)
tenv.mode = get_irn_mode(node);
tenv.cg = cg;
FILE *out; /**< output file */
const arch_env_t *arch_env; /**< the arch env */
set *reg_set; /**< set to memorize registers for non-ia32 nodes (e.g. phi nodes) */
- firm_dbg_module_t *mod; /**< debugging module */
int emit_decls; /**< flag indicating if decls were already emitted */
pmap *types; /**< A map of modes to primitive types */
pmap *tv_ent; /**< A map of entities that store tarvals */
ia32_optimize_t opt; /**< contains optimization information */
char fp_kind; /**< floating point kind */
char used_x87; /**< x87 floating point unit used in this graph */
+ DEBUG_ONLY(firm_dbg_module_t *mod;) /**< debugging module */
} ia32_code_gen_t;
typedef struct _ia32_isa_t {
/* this is a struct to minimize the number of parameters
for transformation walker */
typedef struct _ia32_transform_env_t {
- firm_dbg_module_t *mod; /**< The firm debugger */
dbg_info *dbg; /**< The node debug info */
ir_graph *irg; /**< The irg, the node should be created in */
ir_node *block; /**< The block, the node should belong to */
ir_node *irn; /**< The irn, to be transformed */
ir_mode *mode; /**< The mode of the irn */
ia32_code_gen_t *cg; /**< The code generator */
+ DEBUG_ONLY(firm_dbg_module_t *mod;) /**< The firm debugger */
} ia32_transform_env_t;
/**
* Emits code for a node.
*/
static void ia32_emit_node(const ir_node *irn, void *env) {
- ia32_emit_env_t *emit_env = env;
- firm_dbg_module_t *mod = emit_env->mod;
+ ia32_emit_env_t *emit_env = env;
FILE *F = emit_env->out;
ir_op *op = get_irn_op(irn);
+ DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
#include "bearch_ia32_t.h"
typedef struct _ia32_emit_env_t {
- firm_dbg_module_t *mod;
FILE *out;
const arch_env_t *arch_env;
const ia32_code_gen_t *cg;
ia32_isa_t *isa;
+ DEBUG_ONLY(firm_dbg_module_t *mod;)
} ia32_emit_env_t;
const lc_arg_env_t *ia32_get_arg_env(void);
tenv.block = get_nodes_block(irn);
tenv.cg = cg;
tenv.irg = cg->irg;
- tenv.mod = cg->mod;
+ DEBUG_ONLY(tenv.mod = cg->mod;)
/* Loop over all predecessors and check for Sym/Const nodes */
for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
/**
* Folds Add or Sub to LEA if possible
*/
-static ir_node *fold_addr(ia32_code_gen_t *cg, ir_node *irn, firm_dbg_module_t *mod, ir_node *noreg) {
+static ir_node *fold_addr(ia32_code_gen_t *cg, ir_node *irn, ir_node *noreg) {
ir_graph *irg = get_irn_irg(irn);
dbg_info *dbg = get_irn_dbg_info(irn);
ir_node *block = get_nodes_block(irn);
ir_node *left, *right, *temp;
ir_node *base, *index;
ia32_am_flavour_t am_flav;
+ DEBUG_ONLY(firm_dbg_module_t *mod = cg->mod;)
if (is_ia32_Add(irn))
isadd = 1;
*/
void ia32_optimize_am(ir_node *irn, void *env) {
ia32_code_gen_t *cg = env;
- firm_dbg_module_t *mod = cg->mod;
ir_node *res = irn;
dbg_info *dbg;
ir_mode *mode;
ir_node *store, *load, *mem_proj;
ir_node *succ, *addr_b, *addr_i;
int check_am_src = 0;
+ DEBUG_ONLY(firm_dbg_module_t *mod = cg->mod;)
if (! is_ia32_irn(irn))
return;
/* check is irn is a candidate for address calculation */
if (is_candidate(block, irn, 1)) {
DBG((mod, LEVEL_1, "\tfound address calculation candidate %+F ... ", irn));
- res = fold_addr(cg, irn, mod, noreg_gp);
+ res = fold_addr(cg, irn, noreg_gp);
if (res == irn)
DB((mod, LEVEL_1, "transformed into %+F\n", res));
dbg_info *dbg = env->dbg;
ir_graph *irg = env->irg;
ir_node *block = env->block;
- firm_dbg_module_t *mod = env->mod;
ir_node *noreg_gp = ia32_new_NoReg_gp(env->cg);
ir_node *noreg_fp = ia32_new_NoReg_fp(env->cg);
ir_node *nomem = new_NoMem();
ir_node *expr_op, *imm_op;
+ DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
/* Check if immediate optimization is on and */
/* if it's an operation with immediate. */
dbg_info *dbg = env->dbg;
ir_graph *irg = env->irg;
ir_node *block = env->block;
- firm_dbg_module_t *mod = env->mod;
ir_node *noreg = ia32_new_NoReg_gp(env->cg);
ir_node *nomem = new_NoMem();
ir_node *expr_op, *imm_op;
tarval *tv;
+ DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
assert(! mode_is_float(mode) && "Shift/Rotate with float not supported");
ir_node *new_op = NULL;
ir_mode *mode = env->mode;
dbg_info *dbg = env->dbg;
- firm_dbg_module_t *mod = env->mod;
ir_graph *irg = env->irg;
ir_node *block = env->block;
ir_node *noreg = ia32_new_NoReg_gp(env->cg);
ir_node *nomem = new_NoMem();
+ DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
new_op = func(dbg, irg, block, noreg, noreg, op, nomem, mode_T);
static ir_node *gen_imm_Add(ia32_transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
ir_node *new_op = NULL;
tarval *tv = get_ia32_Immop_tarval(const_op);
- firm_dbg_module_t *mod = env->mod;
dbg_info *dbg = env->dbg;
ir_graph *irg = env->irg;
ir_node *block = env->block;
ir_node *nomem = new_NoMem();
int normal_add = 1;
tarval_classification_t class_tv, class_negtv;
+ DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
/* try to optimize to inc/dec */
if (env->cg->opt.incdec && tv) {
static ir_node *gen_imm_Sub(ia32_transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
ir_node *new_op = NULL;
tarval *tv = get_ia32_Immop_tarval(const_op);
- firm_dbg_module_t *mod = env->mod;
dbg_info *dbg = env->dbg;
ir_graph *irg = env->irg;
ir_node *block = env->block;
ir_node *nomem = new_NoMem();
int normal_sub = 1;
tarval_classification_t class_tv, class_negtv;
+ DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
/* try to optimize to inc/dec */
if (env->cg->opt.incdec && tv) {
ir_node *new_op = NULL;
ir_node *noreg = ia32_new_NoReg_gp(env->cg);
ir_node *nomem = new_rd_NoMem(irg);
- firm_dbg_module_t *mod = env->mod;
ir_node *proj;
+ DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
if (src_mode == tgt_mode) {
/* this can happen when changing mode_P to mode_Is */
tenv.dbg = get_irn_dbg_info(irn);
tenv.irg = cg->irg;
tenv.irn = irn;
- tenv.mod = cg->mod;
+ DEBUG_ONLY(tenv.mod = cg->mod;)
tenv.mode = get_ia32_res_mode(irn);
tenv.cg = cg;
tenv.dbg = get_irn_dbg_info(irn);
tenv.irg = cg->irg;
tenv.irn = irn;
- tenv.mod = cg->mod;
+ DEBUG_ONLY(tenv.mod = cg->mod;)
tenv.mode = get_irn_mode(irn);
tenv.cg = cg;
tenv.dbg = get_irn_dbg_info(node);
tenv.irg = current_ir_graph;
tenv.irn = node;
- tenv.mod = cgenv->mod;
+ DEBUG_ONLY(tenv.mod = cgenv->mod;)
tenv.mode = get_irn_mode(node);
tenv.cg = cgenv;
#define MASK_TOS(x) ((x) & (N_x87_REGS - 1))
/** the debug handle */
-static firm_dbg_module_t *dbg = NULL;
+DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
/**
* An exchange template.
FILE *out; /**< output file */
const arch_env_t *arch_env; /**< the arch env */
set *reg_set; /**< set to memorize registers for FIRM nodes (e.g. phi) */
- firm_dbg_module_t *mod; /**< debugging module */
int emit_decls; /**< flag indicating if decls were already emitted */
const be_irg_t *birg; /**< The be-irg (contains additional information about the irg) */
ir_node **bl_list; /**< The block schedule list. */
survive_dce_t *bl_list_sdce; /**< survive dce environment for the block schedule list */
+ DEBUG_ONLY(firm_dbg_module_t *mod;) /**< debugging module */
};
/* this is a struct to minimize the number of parameters
for transformation walker */
typedef struct _mips_transform_env_t {
- firm_dbg_module_t *mod; /**< The firm debugger */
dbg_info *dbg; /**< The node debug info */
ir_graph *irg; /**< The irg, the node should be created in */
ir_node *block; /**< The block, the node should belong to */
ir_node *irn; /**< The irn, to be transformed */
ir_mode *mode; /**< The mode of the irn */
mips_code_gen_t *cg; /**< The code generator */
+ DEBUG_ONLY(firm_dbg_module_t *mod;) /**< The firm debugger */
} mips_transform_env_t;
ir_node *mips_new_NoReg(mips_code_gen_t *cg);
*/
static void mips_emit_node(ir_node *irn, mips_emit_env_t* env)
{
- mips_emit_env_t *emit_env = env;
- firm_dbg_module_t *mod = emit_env->mod;
+ mips_emit_env_t *emit_env = env;
FILE *F = emit_env->out;
ir_op *op = get_irn_op(irn);
+ DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
#include "bearch_mips_t.h"
typedef struct _mips_emit_env_t {
- firm_dbg_module_t *mod;
FILE *out;
const arch_env_t *arch_env;
const mips_code_gen_t *cg;
+ DEBUG_ONLY(firm_dbg_module_t *mod;)
} mips_emit_env_t;
const lc_arg_env_t *mips_get_arg_env(void);
tenv.dbg = get_irn_dbg_info(node);
tenv.irg = current_ir_graph;
tenv.irn = node;
- tenv.mod = cgenv->mod;
+ DEBUG_ONLY(tenv.mod = cgenv->mod;)
tenv.mode = get_irn_mode(node);
tenv.cg = cgenv;
tenv.dbg = get_irn_dbg_info(node);
tenv.irg = current_ir_graph;
tenv.irn = node;
- tenv.mod = cgenv->mod;
+ DEBUG_ONLY(tenv.mod = cgenv->mod;)
tenv.mode = get_irn_mode(node);
tenv.cg = cgenv;
tenv.dbg = get_irn_dbg_info(node);
tenv.irg = current_ir_graph;
tenv.irn = node;
- tenv.mod = cg->mod;
+ DEBUG_ONLY(tenv.mod = cg->mod;)
tenv.mode = get_irn_mode(node);
tenv.cg = cg;
FILE *out; /**< output file */
const arch_env_t *arch_env; /**< the arch env */
set *reg_set; /**< set to memorize registers for FIRM nodes (e.g. phi) */
- firm_dbg_module_t *mod; /**< debugging module */
int emit_decls; /**< flag indicating if decls were already emitted */
const be_irg_t *birg; /**< The be-irg (contains additional information about the irg) */
unsigned area_size; /**< size of call area for the current irg */
entity *area; /**< the entity representing the call area or NULL for leaf functions */
ir_node *start_succ_block; /**< the block succeeding the start block in the cfg */
ir_node **blk_sched; /**< an array containing the scheduled blocks */
+ DEBUG_ONLY(firm_dbg_module_t *mod;) /**< debugging module */
} ppc32_code_gen_t;
/** this is a struct to minimize the number of parameters
for transformation walker */
typedef struct _ppc32_transform_env_t {
- firm_dbg_module_t *mod; /**< The firm debugger */
dbg_info *dbg; /**< The node debug info */
ir_graph *irg; /**< The irg, the node should be created in */
ir_node *block; /**< The block, the node should belong to */
ir_node *irn; /**< The irn, to be transformed */
ir_mode *mode; /**< The mode of the irn */
+ DEBUG_ONLY(firm_dbg_module_t *mod;) /**< The firm debugger */
} ppc32_transform_env_t;
* Emits code for a node.
*/
static void ppc32_emit_node(ir_node *irn, void *env) {
- ppc32_emit_env_t *emit_env = env;
- firm_dbg_module_t *mod = emit_env->mod;
- FILE *F = emit_env->out;
- ir_op *op = get_irn_op(irn);
+ ppc32_emit_env_t *emit_env = env;
+ FILE *F = emit_env->out;
+ ir_op *op = get_irn_op(irn);
+ DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
#include "bearch_ppc32_t.h"
typedef struct _emit_env_t {
- firm_dbg_module_t *mod;
FILE *out;
const arch_env_t *arch_env;
const ppc32_code_gen_t *cg;
+ DEBUG_ONLY(firm_dbg_module_t *mod;)
} ppc32_emit_env_t;
const lc_arg_env_t *ppc32_get_arg_env(void);
tenv.dbg = get_irn_dbg_info(node);
tenv.irg = current_ir_graph;
tenv.irn = node;
- tenv.mod = cgenv->mod;
+ DEBUG_ONLY(tenv.mod = cgenv->mod;)
tenv.mode = get_irn_mode(node);
#define UNOP(a) case iro_##a: asm_node = gen_##a(&tenv, get_##a##_op(node)); break
tenv.dbg = get_irn_dbg_info(node);
tenv.irg = current_ir_graph;
tenv.irn = node;
- tenv.mod = cgenv->mod;
+ DEBUG_ONLY(tenv.mod = cgenv->mod;)
tenv.mode = get_irn_mode(node);
#define OTHER_GEN(a) \
tenv.block = current_block;
tenv.irg = current_ir_graph;
- tenv.mod = cgenv->mod;
+ DEBUG_ONLY(tenv.mod = cgenv->mod;)
memory = get_irg_no_mem(current_ir_graph);
for(i = 0; i < attr->conv_count; i++)
}
tenv.irg = current_ir_graph;
- tenv.mod = cgenv->mod;
+ DEBUG_ONLY(tenv.mod = cgenv->mod;)
if (code == iro_Conv)
{
}
tenv.irg = current_ir_graph;
- tenv.mod = cgenv->mod;
+ DEBUG_ONLY(tenv.mod = cgenv->mod;)
if(code == iro_Const || code == iro_SymConst)
{