ia32_cg_config.use_imul_mem_imm32 = !FLAGS(opt_arch, arch_k8 | arch_k10) || opt_size;
ia32_cg_config.use_pxor = FLAGS(opt_arch, arch_netburst);
ia32_cg_config.use_mov_0 = FLAGS(opt_arch, arch_k6) && !opt_size;
- ia32_cg_config.use_pad_return = FLAGS(opt_arch, arch_athlon_plus | cpu_core2 | arch_generic32) && !opt_size;
+ ia32_cg_config.use_pad_return = FLAGS(opt_arch, arch_athlon_plus | arch_core2 | arch_generic32) && !opt_size;
+ ia32_cg_config.use_bt = FLAGS(opt_arch, arch_core2) || opt_size;
ia32_cg_config.optimize_cc = opt_cc;
ia32_cg_config.use_unsafe_floatconv = opt_unsafe_floatconv;
unsigned use_pxor:1;
/** use mov reg, 0 instruction */
unsigned use_mov_0:1;
- /** pad Ret that are destination of conditional jump or directly preceded
+ /** pad Ret instructions that are destination of conditional jump or directly preceded
by other jump instruction. */
- unsigned use_pad_return;
+ unsigned use_pad_return:1;
+ /** use the bt instruction */
+ unsigned use_bt:1;
/** optimize calling convention where possible */
unsigned optimize_cc:1;
/**