X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Flower%2Flower_hl.c;h=98ebc325c886d8920c43d35b86e4369caa2edbb0;hb=00ac040bae07059a0dc7ed804c424702a1fcaa36;hp=0dc8eb0b139c8f93e6a3cf1f592a2d6c0f995bf2;hpb=82d375f567df27a09fc33aece709c62866a9331d;p=libfirm diff --git a/ir/lower/lower_hl.c b/ir/lower/lower_hl.c index 0dc8eb0b1..98ebc325c 100644 --- a/ir/lower/lower_hl.c +++ b/ir/lower/lower_hl.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved. + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. * * This file is part of libFirm. * @@ -23,9 +23,7 @@ * @author Boris Boesler, Goetz Lindenmaier, Michael Beck * @version $Id$ */ -#ifdef HAVE_CONFIG_H -# include "config.h" -#endif +#include "config.h" #include "lowering.h" #include "irmode_t.h" @@ -52,13 +50,14 @@ static void lower_sel(ir_node *sel) { assert(is_Sel(sel)); + /* Do not lower frame type/global offset table access: must be lowered by the backend. */ + ptr = get_Sel_ptr(sel); + if (ptr == get_irg_frame(current_ir_graph)) + return; + ent = get_Sel_entity(sel); owner = get_entity_owner(ent); - /* Do not lower frame type access: must be lowered by the backend. */ - if (is_frame_type(owner)) - return; - /* * Cannot handle value param entities here. * Must be lowered by the backend. @@ -66,7 +65,6 @@ static void lower_sel(ir_node *sel) { if (is_value_param_type(owner)) return; - ptr = get_Sel_ptr(sel); dbg = get_irn_dbg_info(sel); mode = get_irn_mode(sel); @@ -79,7 +77,7 @@ static void lower_sel(ir_node *sel) { sym.entity_p = ent; bl = get_nodes_block(sel); - cnst = new_rd_SymConst(dbg, irg, bl, sym, symconst_addr_ent); + cnst = new_rd_SymConst(dbg, irg, bl, mode, sym, symconst_addr_ent); newn = new_rd_Add(dbg, irg, bl, ptr, cnst, mode); } else { /* not TLS */ @@ -97,15 +95,15 @@ static void lower_sel(ir_node *sel) { basemode = mode_P_data; assert(basemode && "no mode for lowering Sel"); - assert((get_mode_size_bytes(basemode) != -1) && "can not deal with unorthodox modes"); + assert((get_mode_size_bits(basemode) % 8 == 0) && "can not deal with unorthodox modes"); index = get_Sel_index(sel, 0); if (is_Array_type(owner)) { - ir_node *last_size; ir_type *arr_ty = owner; - int dims = get_array_n_dimensions(arr_ty); - int *map = alloca(sizeof(int) * dims); - int i; + int dims = get_array_n_dimensions(arr_ty); + int *map = ALLOCAN(int, dims); + ir_node *last_size; + int i; assert(dims == get_Sel_n_indexs(sel) && "array dimension must match number of indices of Sel node"); @@ -142,12 +140,12 @@ static void lower_sel(ir_node *sel) { ub = get_array_upper_bound(arr_ty, dim); assert(irg == current_ir_graph); - if (get_irn_op(lb) != op_Unknown) + if (! is_Unknown(lb)) lb = new_rd_Conv(dbg, irg, bl, copy_const_value(get_irn_dbg_info(sel), lb), mode_Int); else lb = NULL; - if (get_irn_op(ub) != op_Unknown) + if (! is_Unknown(ub)) ub = new_rd_Conv(dbg, irg, bl, copy_const_value(get_irn_dbg_info(sel), ub), mode_Int); else ub = NULL; @@ -157,8 +155,8 @@ static void lower_sel(ir_node *sel) { * bounds have to be set in the non-last dimension. */ if (i > 0) { - assert(lb && "lower bound has to be set in multi-dim array"); - assert(lb && "upper bound has to be set in multi-dim array"); + assert(lb != NULL && "lower bound has to be set in multi-dim array"); + assert(ub != NULL && "upper bound has to be set in multi-dim array"); /* Elements in one Dimension */ elms = new_rd_Sub(dbg, irg, bl, ub, lb, mode_Int); @@ -170,7 +168,7 @@ static void lower_sel(ir_node *sel) { * Normalize index, id lower bound is set, also assume * lower bound == 0 */ - if (lb) + if (lb != NULL) ind = new_rd_Sub(dbg, irg, bl, ind, lb, mode_Int); n = new_rd_Mul(dbg, irg, bl, ind, last_size, mode_Int); @@ -195,9 +193,9 @@ static void lower_sel(ir_node *sel) { mode); } } else if (is_Method_type(get_entity_type(ent)) && - is_Class_type(owner) && - (owner != get_glob_type()) && - (!is_frame_type(owner))) { + is_Class_type(owner) && + (owner != get_glob_type()) && + (!is_frame_type(owner))) { ir_node *add; ir_mode *ent_mode = get_type_mode(get_entity_type(ent)); @@ -214,16 +212,24 @@ static void lower_sel(ir_node *sel) { #endif newn = new_r_Proj(irg, bl, newn, ent_mode, pn_Load_res); - } else if (get_entity_owner(ent) != get_glob_type()) { + } else if (get_entity_owner(ent) != get_glob_type()) { + int offset; + /* replace Sel by add(obj, const(ent.offset)) */ assert(!(get_entity_allocation(ent) == allocation_static && (get_entity_n_overwrites(ent) == 0 && get_entity_n_overwrittenby(ent) == 0))); - tv = new_tarval_from_long(get_entity_offset(ent), mode_Int); - cnst = new_r_Const(irg, get_irg_start_block(irg), mode_Int, tv); - newn = new_rd_Add(dbg, irg, bl, get_Sel_ptr(sel), cnst, mode); + newn = get_Sel_ptr(sel); + offset = get_entity_offset(ent); + if (offset != 0) { + ir_mode *mode_UInt = get_reference_mode_unsigned_eq(mode); + + tv = new_tarval_from_long(offset, mode_UInt); + cnst = new_r_Const(irg, get_irg_start_block(irg), mode_UInt, tv); + newn = new_rd_Add(dbg, irg, bl, newn, cnst, mode); + } } else { /* global_type */ - newn = new_rd_SymConst_addr_ent(NULL, current_ir_graph, ent, firm_unknown_type); + newn = new_rd_SymConst_addr_ent(NULL, current_ir_graph, mode, ent, firm_unknown_type); } } /* run the hooks */ @@ -307,7 +313,10 @@ static void lower_symconst(ir_node *symc) { /* run the hooks */ hook_lower(symc); exchange(symc, newn); - break; + break; + case symconst_label: + /* leave */ + break; default: assert(!"unknown SymConst kind"); @@ -343,12 +352,16 @@ static void lower_bitfields_loads(ir_node *proj, ir_node *load) { int offset, bit_offset, bits, bf_bits, old_cse; dbg_info *db; - if (get_irn_op(sel) != op_Sel) + if (!is_Sel(sel)) return; ent = get_Sel_entity(sel); bf_type = get_entity_type(ent); + /* must be a bitfield type */ + if (!is_Primitive_type(bf_type) || get_primitive_base_type(bf_type) == NULL) + return; + /* We have a bitfield access, if either a bit offset is given, or the size is not integral. */ bf_mode = get_type_mode(bf_type); @@ -359,19 +372,9 @@ static void lower_bitfields_loads(ir_node *proj, ir_node *load) { block = get_nodes_block(proj); bf_bits = get_mode_size_bits(bf_mode); bit_offset = get_entity_offset_bits_remainder(ent); - if (bit_offset == 0 && is_integral_size(bf_bits)) { - if (mode != bf_mode) { - /* we have an integral size and can replace the load by a load - of a smaller mode */ - set_Load_mode(load, bf_mode); - db = get_irn_dbg_info(load); - res = new_rd_Proj(get_irn_dbg_info(proj), current_ir_graph, block, load, bf_mode, pn_Load_res); - res = new_rd_Conv(db, current_ir_graph, block, res, mode); - - exchange(proj, res); - } + + if (bit_offset == 0 && is_integral_size(bf_bits) && bf_mode == get_Load_mode(load)) return; - } bits = get_mode_size_bits(mode); offset = get_entity_offset(ent); @@ -442,32 +445,36 @@ static void lower_bitfields_stores(ir_node *store) { dbg_info *db; /* check bitfield access */ - if (get_irn_op(sel) != op_Sel) + if (!is_Sel(sel)) return; ent = get_Sel_entity(sel); bf_type = get_entity_type(ent); + /* must be a bitfield type */ + if (!is_Primitive_type(bf_type) || get_primitive_base_type(bf_type) == NULL) + return; + /* We have a bitfield access, if either a bit offset is given, or the size is not integral. */ bf_mode = get_type_mode(bf_type); if (! bf_mode) return; + value = get_Store_value(store); + mode = get_irn_mode(value); + block = get_nodes_block(store); + bf_bits = get_mode_size_bits(bf_mode); bit_offset = get_entity_offset_bits_remainder(ent); - if (bit_offset == 0 && is_integral_size(bf_bits)) - return; - value = get_Store_value(store); - mode = get_irn_mode(value); + if (bit_offset == 0 && is_integral_size(bf_bits) && bf_mode == get_irn_mode(value)) + return; /* * ok, here we are: now convert the Store(Sel(), value) into Or(And(Load(Sel),c), And(Value,c)) */ mem = get_Store_mem(store); - block = get_nodes_block(store); - bit_offset = get_entity_offset_bits_remainder(ent); offset = get_entity_offset(ent); bits_mask = get_mode_size_bits(mode) - bf_bits; @@ -505,6 +512,22 @@ static void lower_bitfields_stores(ir_node *store) { set_Store_ptr(store, ptr); } /* lower_bitfields_stores */ +/** + * Lowers unaligned Loads. + */ +static void lower_unaligned_Load(ir_node *load) { + (void) load; + /* NYI */ +} + +/** + * Lowers unaligned Stores + */ +static void lower_unaligned_Store(ir_node *store) { + (void) store; + /* NYI */ +} + /** * lowers IR-nodes, called from walker */ @@ -517,6 +540,17 @@ static void lower_irnode(ir_node *irn, void *env) { case iro_SymConst: lower_symconst(irn); break; + case iro_Load: + if (env != NULL && get_Load_align(irn) == align_non_aligned) + lower_unaligned_Load(irn); + break; + case iro_Store: + if (env != NULL && get_Store_align(irn) == align_non_aligned) + lower_unaligned_Store(irn); + break; + case iro_Cast: + exchange(irn, get_Cast_op(irn)); + break; default: break; } @@ -532,9 +566,8 @@ static void lower_bf_access(ir_node *irn, void *env) { { long proj = get_Proj_proj(irn); ir_node *pred = get_Proj_pred(irn); - ir_op *op = get_irn_op(pred); - if ((proj == pn_Load_res) && (op == op_Load)) + if (proj == pn_Load_res && is_Load(pred)) lower_bitfields_loads(irn, pred); break; } @@ -552,19 +585,37 @@ static void lower_bf_access(ir_node *irn, void *env) { * Replace Sel nodes by address computation. Also resolves array access. * Handle Bitfields by added And/Or calculations. */ -void lower_highlevel(void) { +void lower_highlevel_graph(ir_graph *irg, int lower_bitfields) { + + if (lower_bitfields) { + /* First step: lower bitfield access: must be run as long as Sels still + * exists. */ + irg_walk_graph(irg, NULL, lower_bf_access, NULL); + } + + /* Finally: lower SymConst-Size and Sel nodes, Casts, unaligned Load/Stores. */ + irg_walk_graph(irg, NULL, lower_irnode, NULL); +} /* lower_highlevel_graph */ + +/* + * does the same as lower_highlevel() for all nodes on the const code irg + */ +void lower_const_code(void) { + walk_const_code(NULL, lower_irnode, NULL); +} /* lower_const_code */ + +/* + * Replaces SymConsts by a real constant if possible. + * Replace Sel nodes by address computation. Also resolves array access. + * Handle Bitfields by added And/Or calculations. + */ +void lower_highlevel(int lower_bitfields) { int i, n; n = get_irp_n_irgs(); for (i = 0; i < n; ++i) { ir_graph *irg = get_irp_irg(i); - - /* First step: lower bitfield access: must be run as long as Sels still exists. */ - irg_walk_graph(irg, NULL, lower_bf_access, NULL); - - /* Finally: lower SymConst-Size and Sel nodes. */ - irg_walk_graph(irg, NULL, lower_irnode, NULL); - - set_irg_phase_low(irg); + lower_highlevel_graph(irg, lower_bitfields); } + lower_const_code(); } /* lower_highlevel */