X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Flower%2Flower_hl.c;h=70f44f4de25652cbdc13e2bd58f2cf412623d69b;hb=3a47171668b40b487a2a3d3c4e5fa3e3e76301c6;hp=4d5c336a910c0010e58a1abcf6875849e30119a0;hpb=3f18d2ba24dbc28de980bdd635c9654fe608cee8;p=libfirm diff --git a/ir/lower/lower_hl.c b/ir/lower/lower_hl.c index 4d5c336a9..70f44f4de 100644 --- a/ir/lower/lower_hl.c +++ b/ir/lower/lower_hl.c @@ -23,9 +23,7 @@ * @author Boris Boesler, Goetz Lindenmaier, Michael Beck * @version $Id$ */ -#ifdef HAVE_CONFIG_H -# include "config.h" -#endif +#include "config.h" #include "lowering.h" #include "irmode_t.h" @@ -37,11 +35,14 @@ #include "irhooks.h" #include "irgmod.h" #include "irgwalk.h" +#include "irtools.h" +#include "irpass_t.h" /** * Lower a Sel node. Do not touch Sels accessing entities on the frame type. */ -static void lower_sel(ir_node *sel) { +static void lower_sel(ir_node *sel) +{ ir_graph *irg = current_ir_graph; ir_entity *ent; ir_node *newn, *cnst, *index, *ptr, *bl; @@ -52,21 +53,21 @@ static void lower_sel(ir_node *sel) { assert(is_Sel(sel)); + /* Do not lower frame type/global offset table access: must be lowered by the backend. */ + ptr = get_Sel_ptr(sel); + if (ptr == get_irg_frame(current_ir_graph)) + return; + ent = get_Sel_entity(sel); owner = get_entity_owner(ent); - /* Do not lower frame type access: must be lowered by the backend. */ - if (is_frame_type(owner)) - return; - /* - * Cannot handle value param entities here. + * Cannot handle value param entities or frame type entities here. * Must be lowered by the backend. */ - if (is_value_param_type(owner)) + if (is_value_param_type(owner) || is_frame_type(owner)) return; - ptr = get_Sel_ptr(sel); dbg = get_irn_dbg_info(sel); mode = get_irn_mode(sel); @@ -79,8 +80,8 @@ static void lower_sel(ir_node *sel) { sym.entity_p = ent; bl = get_nodes_block(sel); - cnst = new_rd_SymConst(dbg, irg, bl, mode, sym, symconst_addr_ent); - newn = new_rd_Add(dbg, irg, bl, ptr, cnst, mode); + cnst = new_rd_SymConst(dbg, irg, mode, sym, symconst_addr_ent); + newn = new_rd_Add(dbg, bl, ptr, cnst, mode); } else { /* not TLS */ @@ -101,11 +102,11 @@ static void lower_sel(ir_node *sel) { index = get_Sel_index(sel, 0); if (is_Array_type(owner)) { - ir_node *last_size; ir_type *arr_ty = owner; - int dims = get_array_n_dimensions(arr_ty); - int *map = alloca(sizeof(int) * dims); - int i; + int dims = get_array_n_dimensions(arr_ty); + int *map = ALLOCAN(int, dims); + ir_node *last_size; + int i; assert(dims == get_Sel_n_indexs(sel) && "array dimension must match number of indices of Sel node"); @@ -121,7 +122,7 @@ static void lower_sel(ir_node *sel) { /* Size of the array element */ tv = new_tarval_from_long(get_type_size_bytes(basetyp), mode_Int); - last_size = new_rd_Const(dbg, irg, get_irg_start_block(irg), mode_Int, tv); + last_size = new_rd_Const(dbg, irg, tv); /* * We compute the offset part of dimension d_i recursively @@ -143,12 +144,12 @@ static void lower_sel(ir_node *sel) { assert(irg == current_ir_graph); if (! is_Unknown(lb)) - lb = new_rd_Conv(dbg, irg, bl, copy_const_value(get_irn_dbg_info(sel), lb), mode_Int); + lb = new_rd_Conv(dbg, bl, copy_const_value(get_irn_dbg_info(sel), lb), mode_Int); else lb = NULL; if (! is_Unknown(ub)) - ub = new_rd_Conv(dbg, irg, bl, copy_const_value(get_irn_dbg_info(sel), ub), mode_Int); + ub = new_rd_Conv(dbg, bl, copy_const_value(get_irn_dbg_info(sel), ub), mode_Int); else ub = NULL; @@ -161,36 +162,36 @@ static void lower_sel(ir_node *sel) { assert(ub != NULL && "upper bound has to be set in multi-dim array"); /* Elements in one Dimension */ - elms = new_rd_Sub(dbg, irg, bl, ub, lb, mode_Int); + elms = new_rd_Sub(dbg, bl, ub, lb, mode_Int); } - ind = new_rd_Conv(dbg, irg, bl, get_Sel_index(sel, dim), mode_Int); + ind = new_rd_Conv(dbg, bl, get_Sel_index(sel, dim), mode_Int); /* * Normalize index, id lower bound is set, also assume * lower bound == 0 */ if (lb != NULL) - ind = new_rd_Sub(dbg, irg, bl, ind, lb, mode_Int); + ind = new_rd_Sub(dbg, bl, ind, lb, mode_Int); - n = new_rd_Mul(dbg, irg, bl, ind, last_size, mode_Int); + n = new_rd_Mul(dbg, bl, ind, last_size, mode_Int); /* * see comment above. */ if (i > 0) - last_size = new_rd_Mul(dbg, irg, bl, last_size, elms, mode_Int); + last_size = new_rd_Mul(dbg, bl, last_size, elms, mode_Int); - newn = new_rd_Add(dbg, irg, bl, newn, n, mode); + newn = new_rd_Add(dbg, bl, newn, n, mode); } } else { /* no array type */ ir_mode *idx_mode = get_irn_mode(index); tarval *tv = new_tarval_from_long(get_mode_size_bytes(basemode), idx_mode); - newn = new_rd_Add(dbg, irg, bl, get_Sel_ptr(sel), - new_rd_Mul(dbg, irg, bl, index, - new_r_Const(irg, get_irg_start_block(irg), idx_mode, tv), + newn = new_rd_Add(dbg, bl, get_Sel_ptr(sel), + new_rd_Mul(dbg, bl, index, + new_r_Const(irg, tv), idx_mode), mode); } @@ -203,33 +204,33 @@ static void lower_sel(ir_node *sel) { /* We need an additional load when accessing methods from a dispatch table. */ tv = new_tarval_from_long(get_entity_offset(ent), mode_Int); - cnst = new_rd_Const(dbg, irg, get_irg_start_block(irg), mode_Int, tv); - add = new_rd_Add(dbg, irg, bl, get_Sel_ptr(sel), cnst, mode); + cnst = new_rd_Const(dbg, irg, tv); + add = new_rd_Add(dbg, bl, get_Sel_ptr(sel), cnst, mode); #ifdef DO_CACHEOPT /* cacheopt version */ - newn = new_rd_Load(dbg, irg, bl, get_Sel_mem(sel), sel, ent_mode); + newn = new_rd_Load(dbg, bl, get_Sel_mem(sel), sel, ent_mode, 0); cacheopt_map_addrs_register_node(newn); set_Load_ptr(newn, add); #else /* normal code */ - newn = new_rd_Load(dbg, irg, bl, get_Sel_mem(sel), add, ent_mode); + newn = new_rd_Load(dbg, bl, get_Sel_mem(sel), add, ent_mode, 0); #endif - newn = new_r_Proj(irg, bl, newn, ent_mode, pn_Load_res); + newn = new_r_Proj(newn, ent_mode, pn_Load_res); } else if (get_entity_owner(ent) != get_glob_type()) { int offset; /* replace Sel by add(obj, const(ent.offset)) */ - assert(!(get_entity_allocation(ent) == allocation_static && - (get_entity_n_overwrites(ent) == 0 && get_entity_n_overwrittenby(ent) == 0))); newn = get_Sel_ptr(sel); offset = get_entity_offset(ent); if (offset != 0) { - tv = new_tarval_from_long(offset, mode_Int); - cnst = new_r_Const(irg, get_irg_start_block(irg), mode_Int, tv); - newn = new_rd_Add(dbg, irg, bl, newn, cnst, mode); + ir_mode *mode_UInt = get_reference_mode_unsigned_eq(mode); + + tv = new_tarval_from_long(offset, mode_UInt); + cnst = new_r_Const(irg, tv); + newn = new_rd_Add(dbg, bl, newn, cnst, mode); } } else { /* global_type */ - newn = new_rd_SymConst_addr_ent(NULL, current_ir_graph, mode, ent, firm_unknown_type); + newn = new_rd_SymConst_addr_ent(NULL, irg, mode, ent, firm_unknown_type); } } /* run the hooks */ @@ -241,7 +242,8 @@ static void lower_sel(ir_node *sel) { /** * Lower a all possible SymConst nodes. */ -static void lower_symconst(ir_node *symc) { +static void lower_symconst(ir_node *symc) +{ ir_node *newn; ir_type *tp; ir_entity *ent; @@ -258,10 +260,7 @@ static void lower_symconst(ir_node *symc) { tp = get_SymConst_type(symc); assert(get_type_state(tp) == layout_fixed); mode = get_irn_mode(symc); - tv = new_tarval_from_long(get_type_size_bytes(tp), mode); - newn = new_r_Const(current_ir_graph, - get_irg_start_block(current_ir_graph), - get_irn_mode(symc), tv); + newn = new_Const_long(mode, get_type_size_bytes(tp)); assert(newn); /* run the hooks */ hook_lower(symc); @@ -272,18 +271,12 @@ static void lower_symconst(ir_node *symc) { tp = get_SymConst_type(symc); assert(get_type_state(tp) == layout_fixed); mode = get_irn_mode(symc); - tv = new_tarval_from_long(get_type_alignment_bytes(tp), mode); - newn = new_r_Const(current_ir_graph, - get_irg_start_block(current_ir_graph), - mode, tv); + newn = new_Const_long(mode, get_type_alignment_bytes(tp)); assert(newn); /* run the hooks */ hook_lower(symc); exchange(symc, newn); break; - case symconst_addr_name: - /* do not rewrite - pass info to back end */ - break; case symconst_addr_ent: /* leave */ break; @@ -292,10 +285,7 @@ static void lower_symconst(ir_node *symc) { ent = get_SymConst_entity(symc); assert(get_type_state(get_entity_type(ent)) == layout_fixed); mode = get_irn_mode(symc); - tv = new_tarval_from_long(get_entity_offset(ent), mode); - newn = new_r_Const(current_ir_graph, - get_irg_start_block(current_ir_graph), - mode, tv); + newn = new_Const_long(mode, get_entity_offset(ent)); assert(newn); /* run the hooks */ hook_lower(symc); @@ -306,17 +296,12 @@ static void lower_symconst(ir_node *symc) { ec = get_SymConst_enum(symc); assert(get_type_state(get_enumeration_owner(ec)) == layout_fixed); tv = get_enumeration_value(ec); - newn = new_r_Const(current_ir_graph, - get_irg_start_block(current_ir_graph), - get_irn_mode(symc), tv); + newn = new_Const(tv); assert(newn); /* run the hooks */ hook_lower(symc); exchange(symc, newn); break; - case symconst_label: - /* leave */ - break; default: assert(!"unknown SymConst kind"); @@ -329,7 +314,8 @@ static void lower_symconst(ir_node *symc) { * * @param size the size on bits */ -static int is_integral_size(int size) { +static int is_integral_size(int size) +{ /* must be a 2^n */ if (size & (size-1)) return 0; @@ -343,7 +329,8 @@ static int is_integral_size(int size) { * @param proj the Proj(result) node * @param load the Load node */ -static void lower_bitfields_loads(ir_node *proj, ir_node *load) { +static void lower_bitfields_loads(ir_node *proj, ir_node *load) +{ ir_node *sel = get_Load_ptr(load); ir_node *block, *n_proj, *res, *ptr; ir_entity *ent; @@ -352,7 +339,7 @@ static void lower_bitfields_loads(ir_node *proj, ir_node *load) { int offset, bit_offset, bits, bf_bits, old_cse; dbg_info *db; - if (get_irn_op(sel) != op_Sel) + if (!is_Sel(sel)) return; ent = get_Sel_entity(sel); @@ -387,7 +374,7 @@ static void lower_bitfields_loads(ir_node *proj, ir_node *load) { /* abandon bitfield sel */ ptr = get_Sel_ptr(sel); db = get_irn_dbg_info(sel); - ptr = new_rd_Add(db, current_ir_graph, block, ptr, new_Const_long(mode_Is, offset), get_irn_mode(ptr)); + ptr = new_rd_Add(db, block, ptr, new_Const_long(mode_Is, offset), get_irn_mode(ptr)); set_Load_ptr(load, ptr); set_Load_mode(load, mode); @@ -396,7 +383,7 @@ static void lower_bitfields_loads(ir_node *proj, ir_node *load) { /* create new proj, switch off CSE or we may get the old one back */ old_cse = get_opt_cse(); set_opt_cse(0); - res = n_proj = new_r_Proj(current_ir_graph, block, load, mode, pn_Load_res); + res = n_proj = new_r_Proj(load, mode, pn_Load_res); set_opt_cse(old_cse); if (mode_is_signed(mode)) { /* signed */ @@ -404,24 +391,20 @@ static void lower_bitfields_loads(ir_node *proj, ir_node *load) { int shift_count_down = bits - bf_bits; if (shift_count_up) { - res = new_r_Shl(current_ir_graph, block, res, - new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(shift_count_up, mode_Iu)), mode); + res = new_r_Shl(block, res, new_Const_long(mode_Iu, shift_count_up), mode); } if (shift_count_down) { - res = new_r_Shrs(current_ir_graph, block, res, - new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(shift_count_down, mode_Iu)), mode); + res = new_r_Shrs(block, res, new_Const_long(mode_Iu, shift_count_down), mode); } } else { /* unsigned */ int shift_count_down = bit_offset; unsigned mask = ((unsigned)-1) >> (bits - bf_bits); if (shift_count_down) { - res = new_r_Shr(current_ir_graph, block, res, - new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(shift_count_down, mode_Iu)), mode); + res = new_r_Shr(block, res, new_Const_long(mode_Iu, shift_count_down), mode); } if (bits != bf_bits) { - res = new_r_And(current_ir_graph, block, res, - new_r_Const(current_ir_graph, block, mode, new_tarval_from_long(mask, mode)), mode); + res = new_r_And(block, res, new_Const_long(mode, mask), mode); } } @@ -433,7 +416,8 @@ static void lower_bitfields_loads(ir_node *proj, ir_node *load) { * * @todo: It adds a load which may produce an exception! */ -static void lower_bitfields_stores(ir_node *store) { +static void lower_bitfields_stores(ir_node *store) +{ ir_node *sel = get_Store_ptr(store); ir_node *ptr, *value; ir_entity *ent; @@ -445,7 +429,7 @@ static void lower_bitfields_stores(ir_node *store) { dbg_info *db; /* check bitfield access */ - if (get_irn_op(sel) != op_Sel) + if (!is_Sel(sel)) return; ent = get_Sel_entity(sel); @@ -485,26 +469,23 @@ static void lower_bitfields_stores(ir_node *store) { /* abandon bitfield sel */ ptr = get_Sel_ptr(sel); db = get_irn_dbg_info(sel); - ptr = new_rd_Add(db, current_ir_graph, block, ptr, new_Const_long(mode_Is, offset), get_irn_mode(ptr)); + ptr = new_rd_Add(db, block, ptr, new_Const_long(mode_Is, offset), get_irn_mode(ptr)); if (neg_mask) { /* there are some bits, normal case */ - irn = new_r_Load(current_ir_graph, block, mem, ptr, mode); - mem = new_r_Proj(current_ir_graph, block, irn, mode_M, pn_Load_M); - irn = new_r_Proj(current_ir_graph, block, irn, mode, pn_Load_res); + irn = new_r_Load(block, mem, ptr, mode, 0); + mem = new_r_Proj(irn, mode_M, pn_Load_M); + irn = new_r_Proj(irn, mode, pn_Load_res); - irn = new_r_And(current_ir_graph, block, irn, - new_r_Const(current_ir_graph, block, mode, new_tarval_from_long(neg_mask, mode)), mode); + irn = new_r_And(block, irn, new_Const_long(mode, neg_mask), mode); if (bit_offset > 0) { - value = new_r_Shl(current_ir_graph, block, value, - new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(bit_offset, mode_Iu)), mode); + value = new_r_Shl(block, value, new_Const_long(mode_Iu, bit_offset), mode); } - value = new_r_And(current_ir_graph, block, value, - new_r_Const(current_ir_graph, block, mode, new_tarval_from_long(mask, mode)), mode); + value = new_r_And(block, value, new_Const_long(mode, mask), mode); - value = new_r_Or(current_ir_graph, block, value, irn, mode); + value = new_r_Or(block, value, irn, mode); } set_Store_mem(store, mem); @@ -515,7 +496,8 @@ static void lower_bitfields_stores(ir_node *store) { /** * Lowers unaligned Loads. */ -static void lower_unaligned_Load(ir_node *load) { +static void lower_unaligned_Load(ir_node *load) +{ (void) load; /* NYI */ } @@ -523,7 +505,8 @@ static void lower_unaligned_Load(ir_node *load) { /** * Lowers unaligned Stores */ -static void lower_unaligned_Store(ir_node *store) { +static void lower_unaligned_Store(ir_node *store) +{ (void) store; /* NYI */ } @@ -531,7 +514,8 @@ static void lower_unaligned_Store(ir_node *store) { /** * lowers IR-nodes, called from walker */ -static void lower_irnode(ir_node *irn, void *env) { +static void lower_irnode(ir_node *irn, void *env) +{ (void) env; switch (get_irn_opcode(irn)) { case iro_Sel: @@ -554,21 +538,21 @@ static void lower_irnode(ir_node *irn, void *env) { default: break; } -} /* lower_irnode */ +} /** * Walker: lowers IR-nodes for bitfield access */ -static void lower_bf_access(ir_node *irn, void *env) { +static void lower_bf_access(ir_node *irn, void *env) +{ (void) env; switch (get_irn_opcode(irn)) { case iro_Proj: { long proj = get_Proj_proj(irn); ir_node *pred = get_Proj_pred(irn); - ir_op *op = get_irn_op(pred); - if ((proj == pn_Load_res) && (op == op_Load)) + if (proj == pn_Load_res && is_Load(pred)) lower_bitfields_loads(irn, pred); break; } @@ -579,16 +563,16 @@ static void lower_bf_access(ir_node *irn, void *env) { default: break; } -} /* lower_bf_access */ +} /* * Replaces SymConsts by a real constant if possible. * Replace Sel nodes by address computation. Also resolves array access. * Handle Bitfields by added And/Or calculations. */ -void lower_highlevel_graph(ir_graph *irg, int lower_bitfields) { - - if(lower_bitfields) { +void lower_highlevel_graph(ir_graph *irg, int lower_bitfields) +{ + if (lower_bitfields) { /* First step: lower bitfield access: must be run as long as Sels still * exists. */ irg_walk_graph(irg, NULL, lower_bf_access, NULL); @@ -596,11 +580,46 @@ void lower_highlevel_graph(ir_graph *irg, int lower_bitfields) { /* Finally: lower SymConst-Size and Sel nodes, Casts, unaligned Load/Stores. */ irg_walk_graph(irg, NULL, lower_irnode, NULL); - set_irg_phase_low(irg); -} /* lower_highlevel */ -void lower_const_code(void) { + set_irg_outs_inconsistent(irg); +} + +struct pass_t { + ir_graph_pass_t pass; + int lower_bitfields; +}; + +/** + * Wrapper for running lower_highlevel_graph() as an ir_graph pass. + */ +static int lower_highlevel_graph_wrapper(ir_graph *irg, void *context) +{ + struct pass_t *pass = context; + + lower_highlevel_graph(irg, pass->lower_bitfields); + return 0; +} /* lower_highlevel_graph_wrapper */ + +ir_graph_pass_t *lower_highlevel_graph_pass(const char *name, int lower_bitfields) +{ + struct pass_t *pass = XMALLOCZ(struct pass_t); + + pass->lower_bitfields = lower_bitfields; + return def_graph_pass_constructor( + &pass->pass, name ? name : "lower_hl", lower_highlevel_graph_wrapper); +} /* lower_highlevel_graph_pass */ + +/* + * does the same as lower_highlevel() for all nodes on the const code irg + */ +void lower_const_code(void) +{ walk_const_code(NULL, lower_irnode, NULL); +} /* lower_const_code */ + +ir_prog_pass_t *lower_const_code_pass(const char *name) +{ + return def_prog_pass(name ? name : "lower_const_code", lower_const_code); } /* @@ -608,7 +627,8 @@ void lower_const_code(void) { * Replace Sel nodes by address computation. Also resolves array access. * Handle Bitfields by added And/Or calculations. */ -void lower_highlevel(int lower_bitfields) { +void lower_highlevel(int lower_bitfields) +{ int i, n; n = get_irp_n_irgs();