X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Flower%2Flower_hl.c;h=4196068b3c313d5f9a14073d4a27355bbe8eb320;hb=a999e1baedb84dc9b83059708699dac1c7fdb9a2;hp=b77fcfdfcb6895a67056741a1ef17d77f724d8ec;hpb=0c28268a1eacacadc78df3e83d13d1905ace7e7b;p=libfirm diff --git a/ir/lower/lower_hl.c b/ir/lower/lower_hl.c index b77fcfdfc..4196068b3 100644 --- a/ir/lower/lower_hl.c +++ b/ir/lower/lower_hl.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved. + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. * * This file is part of libFirm. * @@ -79,7 +79,7 @@ static void lower_sel(ir_node *sel) { sym.entity_p = ent; bl = get_nodes_block(sel); - cnst = new_rd_SymConst(dbg, irg, bl, sym, symconst_addr_ent); + cnst = new_rd_SymConst(dbg, irg, bl, mode, sym, symconst_addr_ent); newn = new_rd_Add(dbg, irg, bl, ptr, cnst, mode); } else { /* not TLS */ @@ -97,7 +97,7 @@ static void lower_sel(ir_node *sel) { basemode = mode_P_data; assert(basemode && "no mode for lowering Sel"); - assert((get_mode_size_bytes(basemode) != -1) && "can not deal with unorthodox modes"); + assert((get_mode_size_bits(basemode) % 8 != 0) && "can not deal with unorthodox modes"); index = get_Sel_index(sel, 0); if (is_Array_type(owner)) { @@ -195,9 +195,9 @@ static void lower_sel(ir_node *sel) { mode); } } else if (is_Method_type(get_entity_type(ent)) && - is_Class_type(owner) && - (owner != get_glob_type()) && - (!is_frame_type(owner))) { + is_Class_type(owner) && + (owner != get_glob_type()) && + (!is_frame_type(owner))) { ir_node *add; ir_mode *ent_mode = get_type_mode(get_entity_type(ent)); @@ -223,7 +223,7 @@ static void lower_sel(ir_node *sel) { newn = new_rd_Add(dbg, irg, bl, get_Sel_ptr(sel), cnst, mode); } else { /* global_type */ - newn = new_rd_SymConst_addr_ent(NULL, current_ir_graph, ent, firm_unknown_type); + newn = new_rd_SymConst_addr_ent(NULL, current_ir_graph, mode, ent, firm_unknown_type); } } /* run the hooks */ @@ -352,6 +352,10 @@ static void lower_bitfields_loads(ir_node *proj, ir_node *load) { ent = get_Sel_entity(sel); bf_type = get_entity_type(ent); + /* must be a bitfield type */ + if (!is_Primitive_type(bf_type) || get_primitive_base_type(bf_type) == NULL) + return; + /* We have a bitfield access, if either a bit offset is given, or the size is not integral. */ bf_mode = get_type_mode(bf_type); @@ -441,6 +445,10 @@ static void lower_bitfields_stores(ir_node *store) { ent = get_Sel_entity(sel); bf_type = get_entity_type(ent); + /* must be a bitfield type */ + if (!is_Primitive_type(bf_type) || get_primitive_base_type(bf_type) == NULL) + return; + /* We have a bitfield access, if either a bit offset is given, or the size is not integral. */ bf_mode = get_type_mode(bf_type); @@ -498,6 +506,22 @@ static void lower_bitfields_stores(ir_node *store) { set_Store_ptr(store, ptr); } /* lower_bitfields_stores */ +/** + * Lowers unaligned Loads. + */ +static void lower_unaligned_Load(ir_node *load) { + (void) load; + /* NYI */ +} + +/** + * Lowers unaligned Stores + */ +static void lower_unaligned_Store(ir_node *store) { + (void) store; + /* NYI */ +} + /** * lowers IR-nodes, called from walker */ @@ -510,6 +534,17 @@ static void lower_irnode(ir_node *irn, void *env) { case iro_SymConst: lower_symconst(irn); break; + case iro_Load: + if (env != NULL && get_Load_align(irn) == align_non_aligned) + lower_unaligned_Load(irn); + break; + case iro_Store: + if (env != NULL && get_Store_align(irn) == align_non_aligned) + lower_unaligned_Store(irn); + break; + case iro_Cast: + exchange(irn, get_Cast_op(irn)); + break; default: break; } @@ -545,19 +580,30 @@ static void lower_bf_access(ir_node *irn, void *env) { * Replace Sel nodes by address computation. Also resolves array access. * Handle Bitfields by added And/Or calculations. */ -void lower_highlevel(void) { +void lower_highlevel_graph(ir_graph *irg, int lower_bitfields) { + + if(lower_bitfields) { + /* First step: lower bitfield access: must be run as long as Sels still + * exists. */ + irg_walk_graph(irg, NULL, lower_bf_access, NULL); + } + + /* Finally: lower SymConst-Size and Sel nodes, Casts, unaligned Load/Stores. */ + irg_walk_graph(irg, NULL, lower_irnode, NULL); + set_irg_phase_low(irg); +} /* lower_highlevel */ + +/* + * Replaces SymConsts by a real constant if possible. + * Replace Sel nodes by address computation. Also resolves array access. + * Handle Bitfields by added And/Or calculations. + */ +void lower_highlevel(int lower_bitfields) { int i, n; n = get_irp_n_irgs(); for (i = 0; i < n; ++i) { ir_graph *irg = get_irp_irg(i); - - /* First step: lower bitfield access: must be run as long as Sels still exists. */ - irg_walk_graph(irg, NULL, lower_bf_access, NULL); - - /* Finally: lower SymConst-Size and Sel nodes. */ - irg_walk_graph(irg, NULL, lower_irnode, NULL); - - set_irg_phase_low(irg); + lower_highlevel_graph(irg, lower_bitfields); } } /* lower_highlevel */