X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Flower%2Flower_dw.c;h=483ad477527be7fa41c9bf8ada5d20c54f85bb70;hb=81648321eddd231ed7e771607d0f0cc75bc85813;hp=6099adf3d965228c1f8c25aa0f2c5a9ab5dab08a;hpb=cfc97f93109e75199ee30e7e9c2f090be6c7eaf5;p=libfirm diff --git a/ir/lower/lower_dw.c b/ir/lower/lower_dw.c index 6099adf3d..483ad4775 100644 --- a/ir/lower/lower_dw.c +++ b/ir/lower/lower_dw.c @@ -1,30 +1,37 @@ -/** - * @file irlwrdw.c - * @date 8.10.2004 - * @author Michael Beck - * @brief Lower Double word operations, ie Mode L -> I. +/* + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. + * + * This file is part of libFirm. * - * $Id$ + * This file may be distributed and/or modified under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation and appearing in the file LICENSE.GPL included in the + * packaging of this file. + * + * Licensees holding valid libFirm Professional Edition licenses may use + * this file in accordance with the libFirm Commercial License. + * Agreement provided with the Software. + * + * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE + * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE. + */ + +/** + * @file + * @brief Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc. + * @date 8.10.2004 + * @author Michael Beck + * @version $Id$ */ -#ifdef HAVE_CONFIG_H -# include "config.h" -#endif - -#ifdef HAVE_MALLOC_H -# include -#endif -#ifdef HAVE_ALLOCA_H -# include -#endif -#ifdef HAVE_STRING_H -# include -#endif -#ifdef HAVE_STDLIB_H -# include -#endif +#include "config.h" +#include +#include #include +#include "error.h" +#include "lowering.h" #include "irnode_t.h" #include "irgraph_t.h" #include "irmode_t.h" @@ -37,7 +44,6 @@ #include "firmstat.h" #include "irgwalk.h" #include "ircons.h" -#include "lower_dw.h" #include "irflag.h" #include "irtools.h" #include "debug.h" @@ -45,6 +51,8 @@ #include "pmap.h" #include "pdeq.h" #include "irdump.h" +#include "array_t.h" +#include "irpass_t.h" /** A map from mode to a primitive type. */ static pmap *prim_types; @@ -71,7 +79,7 @@ typedef struct _op_mode_entry { const ir_op *op; /**< the op */ const ir_mode *imode; /**< the input mode */ const ir_mode *omode; /**< the output mode */ - entity *ent; /**< the associated entity of this (op, imode, omode) triple */ + ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */ } op_mode_entry_t; /** @@ -88,13 +96,13 @@ typedef struct _conv_tp_entry { * we need some store to hold the replacement: */ typedef struct _node_entry_t { - ir_node *low_word; /**< the low word */ - ir_node *high_word; /**< the high word */ + ir_node *low_word; /**< the low word */ + ir_node *high_word; /**< the high word */ } node_entry_t; enum lower_flags { - MUST_BE_LOWERED = 1, /**< graph must be lowered */ - CF_CHANGED = 2, /**< control flow was changed */ + MUST_BE_LOWERED = 1, /**< graph must be lowered */ + CF_CHANGED = 2, /**< control flow was changed */ }; /** @@ -103,13 +111,17 @@ enum lower_flags { typedef struct _lower_env_t { node_entry_t **entries; /**< entries per node */ struct obstack obst; /**< an obstack holding the temporary data */ + ir_type *l_mtp; /**< lowered method type of the current method */ tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */ tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */ pdeq *waitq; /**< a wait queue of all nodes that must be handled later */ pmap *proj_2_block; /**< a map from ProjX to its destination blocks */ + ident *first_id; /**< .l for little and .h for big endian */ + ident *next_id; /**< .h for little and .l for big endian */ const lwrdw_param_t *params; /**< transformation parameter */ unsigned flags; /**< some flags */ int n_entries; /**< number of entries */ + ir_type *value_param_tp; /**< the old value param type */ } lower_env_t; /** @@ -128,7 +140,7 @@ static ir_type *get_primitive_type(ir_mode *mode) { pmap_insert(prim_types, mode, tp); return tp; -} +} /* get_primitive_type */ /** * Create a method type for a Conv emulation from imode to omode. @@ -158,38 +170,33 @@ static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) /* set param types and result types */ n_param = 0; if (imode == env->params->high_signed) { + set_method_param_type(mtd, n_param++, tp_u); set_method_param_type(mtd, n_param++, tp_s); - set_method_param_type(mtd, n_param++, tp_s); - } - else if (imode == env->params->high_unsigned) { + } else if (imode == env->params->high_unsigned) { set_method_param_type(mtd, n_param++, tp_u); set_method_param_type(mtd, n_param++, tp_u); - } - else { + } else { ir_type *tp = get_primitive_type(imode); set_method_param_type(mtd, n_param++, tp); - } + } /* if */ n_res = 0; if (omode == env->params->high_signed) { + set_method_res_type(mtd, n_res++, tp_u); set_method_res_type(mtd, n_res++, tp_s); - set_method_res_type(mtd, n_res++, tp_s); - } - else if (omode == env->params->high_unsigned) { + } else if (omode == env->params->high_unsigned) { set_method_res_type(mtd, n_res++, tp_u); set_method_res_type(mtd, n_res++, tp_u); - } - else { + } else { ir_type *tp = get_primitive_type(omode); set_method_res_type(mtd, n_res++, tp); - } - + } /* if */ entry->mtd = mtd; - } - else + } else { mtd = entry->mtd; + } /* if */ return mtd; -} +} /* get_conv_type */ /** * Add an additional control flow input to a block. @@ -210,13 +217,13 @@ static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf) set_irn_in(block, i + 1, in); - for (phi = get_irn_link(block); phi; phi = get_irn_link(phi)) { + for (phi = get_Block_phis(block); phi != NULL; phi = get_Phi_next(phi)) { for (i = 0; i < arity; ++i) in[i] = get_irn_n(phi, i); in[i] = in[nr]; set_irn_in(phi, i + 1, in); - } -} + } /* for */ +} /* add_block_cf_input_nr */ /** * Add an additional control flow input to a block. @@ -232,11 +239,11 @@ static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf) if (get_irn_n(block, i) == tmpl) { nr = i; break; - } - } + } /* if */ + } /* for */ assert(i < arity); add_block_cf_input_nr(block, nr, cf); -} +} /* add_block_cf_input */ /** * Return the "operational" mode of a Firm node. @@ -246,64 +253,60 @@ static ir_mode *get_irn_op_mode(ir_node *node) switch (get_irn_opcode(node)) { case iro_Load: return get_Load_mode(node); - case iro_Store: return get_irn_mode(get_Store_value(node)); - case iro_DivMod: return get_irn_mode(get_DivMod_left(node)); - case iro_Div: return get_irn_mode(get_Div_left(node)); - case iro_Mod: return get_irn_mode(get_Mod_left(node)); - case iro_Cmp: return get_irn_mode(get_Cmp_left(node)); - default: return get_irn_mode(node); - } -} + } /* switch */ +} /* get_irn_op_mode */ /** - * walker, prepare the node links + * Walker, prepare the node links. */ static void prepare_links(ir_node *node, void *env) { lower_env_t *lenv = env; ir_mode *mode = get_irn_op_mode(node); node_entry_t *link; - int i; + int i, idx; if (mode == lenv->params->high_signed || mode == lenv->params->high_unsigned) { /* ok, found a node that will be lowered */ - link = obstack_alloc(&lenv->obst, sizeof(*link)); + link = OALLOCZ(&lenv->obst, node_entry_t); - memset(link, 0, sizeof(*link)); + idx = get_irn_idx(node); + if (idx >= lenv->n_entries) { + /* enlarge: this happens only for Rotl nodes which is RARELY */ + int old = lenv->n_entries; + int n_idx = idx + (idx >> 3); - lenv->entries[get_irn_idx(node)] = link; + ARR_RESIZE(node_entry_t *, lenv->entries, n_idx); + memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0])); + lenv->n_entries = n_idx; + } + lenv->entries[idx] = link; lenv->flags |= MUST_BE_LOWERED; - } - else if (get_irn_op(node) == op_Conv) { + } else if (is_Conv(node)) { /* Conv nodes have two modes */ ir_node *pred = get_Conv_op(node); mode = get_irn_mode(pred); if (mode == lenv->params->high_signed || mode == lenv->params->high_unsigned) { - /* must lower this node either */ - link = obstack_alloc(&lenv->obst, sizeof(*link)); - - memset(link, 0, sizeof(*link)); - - lenv->entries[get_irn_idx(node)] = link; + /* must lower this node either but don't need a link */ lenv->flags |= MUST_BE_LOWERED; - } + } /* if */ return; - } + } /* if */ if (is_Proj(node)) { /* link all Proj nodes to its predecessor: @@ -312,24 +315,20 @@ static void prepare_links(ir_node *node, void *env) set_irn_link(node, get_irn_link(pred)); set_irn_link(pred, node); - } - else if (is_Phi(node)) { + } else if (is_Phi(node)) { /* link all Phi nodes to its block */ ir_node *block = get_nodes_block(node); - - set_irn_link(node, get_irn_link(block)); - set_irn_link(block, node); - } - else if (is_Block(node)) { + add_Block_phi(block, node); + } else if (is_Block(node)) { /* fill the Proj -> Block map */ for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) { ir_node *pred = get_Block_cfgpred(node, i); if (is_Proj(pred)) pmap_insert(lenv->proj_2_block, pred, node); - } - } -} + } /* for */ + } /* if */ +} /* prepare_links */ /** * Translate a Constant: create two. @@ -338,56 +337,52 @@ static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) { tarval *tv, *tv_l, *tv_h; ir_node *low, *high; dbg_info *dbg = get_irn_dbg_info(node); - ir_node *block = get_nodes_block(node); int idx; + ir_graph *irg = current_ir_graph; + ir_mode *low_mode = env->params->low_unsigned; tv = get_Const_tarval(node); - tv_l = tarval_convert_to(tv, mode); - low = new_rd_Const(dbg, current_ir_graph, block, mode, tv_l); + tv_l = tarval_convert_to(tv, low_mode); + low = new_rd_Const(dbg, irg, tv_l); tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode); - high = new_rd_Const(dbg, current_ir_graph, block, mode, tv_h); + high = new_rd_Const(dbg, irg, tv_h); idx = get_irn_idx(node); assert(idx < env->n_entries); env->entries[idx]->low_word = low; env->entries[idx]->high_word = high; -} +} /* lower_Const */ /** * Translate a Load: create two. */ static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) { - ir_graph *irg = current_ir_graph; - ir_node *adr = get_Load_ptr(node); - ir_node *mem = get_Load_mem(node); - ir_node *low, *high, *proj; - dbg_info *dbg; - ir_node *block = get_nodes_block(node); - int idx; + ir_mode *low_mode = env->params->low_unsigned; + ir_graph *irg = current_ir_graph; + ir_node *adr = get_Load_ptr(node); + ir_node *mem = get_Load_mem(node); + ir_node *low, *high, *proj; + dbg_info *dbg; + ir_node *block = get_nodes_block(node); + int idx; + ir_cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile + ? cons_volatile : 0; if (env->params->little_endian) { low = adr; - high = new_r_Add(irg, block, adr, - new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes), - get_irn_mode(adr)); - } - else { - low = new_r_Add(irg, block, adr, - new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes), - get_irn_mode(adr)); + high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr)); + } else { + low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr)); high = adr; - } + } /* if */ /* create two loads */ dbg = get_irn_dbg_info(node); - low = new_rd_Load(dbg, irg, block, mem, low, mode); - proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M); - high = new_rd_Load(dbg, irg, block, proj, high, mode); - - set_Load_volatility(low, get_Load_volatility(node)); - set_Load_volatility(high, get_Load_volatility(node)); + low = new_rd_Load(dbg, block, mem, low, low_mode, volatility); + proj = new_r_Proj(block, low, mode_M, pn_Load_M); + high = new_rd_Load(dbg, block, proj, high, mode, volatility); idx = get_irn_idx(node); assert(idx < env->n_entries); @@ -408,28 +403,31 @@ static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) { break; case pn_Load_res: /* Result of load operation. */ assert(idx < env->n_entries); - env->entries[idx]->low_word = new_r_Proj(irg, block, low, mode, pn_Load_res); - env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode, pn_Load_res); + env->entries[idx]->low_word = new_r_Proj(block, low, low_mode, pn_Load_res); + env->entries[idx]->high_word = new_r_Proj(block, high, mode, pn_Load_res); break; default: assert(0 && "unexpected Proj number"); - } + } /* switch */ /* mark this proj: we have handled it already, otherwise we might fall into * out new nodes. */ mark_irn_visited(proj); - } -} + } /* for */ +} /* lower_Load */ /** * Translate a Store: create two. */ static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) { - ir_graph *irg; - ir_node *block, *adr, *mem; - ir_node *low, *high, *irn, *proj; - dbg_info *dbg; - int idx; + ir_graph *irg; + ir_node *block, *adr, *mem; + ir_node *low, *high, *irn, *proj; + dbg_info *dbg; + int idx; node_entry_t *entry; + ir_cons_flags volatility = get_Store_volatility(node) == volatility_is_volatile + ? cons_volatile : 0; + (void) mode; irn = get_Store_value(node); entry = env->entries[get_irn_idx(irn)]; @@ -439,7 +437,7 @@ static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) { /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ irg = current_ir_graph; adr = get_Store_ptr(node); @@ -448,25 +446,17 @@ static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) { if (env->params->little_endian) { low = adr; - high = new_r_Add(irg, block, adr, - new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes), - get_irn_mode(adr)); - } - else { - low = new_r_Add(irg, block, adr, - new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes), - get_irn_mode(adr)); + high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr)); + } else { + low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr)); high = adr; - } + } /* if */ /* create two Stores */ dbg = get_irn_dbg_info(node); - low = new_rd_Store(dbg, irg, block, mem, low, entry->low_word); - proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M); - high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word); - - set_Store_volatility(low, get_Store_volatility(node)); - set_Store_volatility(high, get_Store_volatility(node)); + low = new_rd_Store(dbg, block, mem, low, entry->low_word, volatility); + proj = new_r_Proj(block, low, mode_M, pn_Store_M); + high = new_rd_Store(dbg, block, proj, high, entry->high_word, volatility); idx = get_irn_idx(node); assert(idx < env->n_entries); @@ -487,12 +477,12 @@ static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) { break; default: assert(0 && "unexpected Proj number"); - } + } /* switch */ /* mark this proj: we have handled it already, otherwise we might fall into * out new nodes. */ mark_irn_visited(proj); - } -} + } /* for */ +} /* lower_Store */ /** * Return a node containing the address of the intrinsic emulation function. @@ -501,14 +491,13 @@ static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) { * @param op the emulated ir_op * @param imode the input mode of the emulated opcode * @param omode the output mode of the emulated opcode - * @param block where the new mode is created * @param env the lower environment */ static ir_node *get_intrinsic_address(ir_type *method, ir_op *op, ir_mode *imode, ir_mode *omode, - ir_node *block, lower_env_t *env) { + lower_env_t *env) { symconst_symbol sym; - entity *ent; + ir_entity *ent; op_mode_entry_t key, *entry; key.op = op; @@ -524,13 +513,12 @@ static ir_node *get_intrinsic_address(ir_type *method, ir_op *op, assert(ent && "Intrinsic creator must return an entity"); entry->ent = ent; - } - else + } else { ent = entry->ent; - + } /* if */ sym.entity_p = ent; - return new_r_SymConst(current_ir_graph, block, sym, symconst_addr_ent); -} + return new_r_SymConst(current_ir_graph, mode_P_code, sym, symconst_addr_ent); +} /* get_intrinsic_address */ /** * Translate a Div. @@ -554,7 +542,7 @@ static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) { /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ in[0] = entry->low_word; in[1] = entry->high_word; @@ -567,28 +555,27 @@ static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) { /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ in[2] = entry->low_word; in[3] = entry->high_word; - dbg = get_irn_dbg_info(node); + dbg = get_irn_dbg_info(node); block = get_nodes_block(node); mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u; opmode = get_irn_op_mode(node); - irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env); - call = new_rd_Call(dbg, current_ir_graph, block, get_Div_mem(node), - irn, 4, in, mtp); + irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, env); + call = new_rd_Call(dbg, block, get_Div_mem(node), irn, 4, in, mtp); set_irn_pinned(call, get_irn_pinned(node)); - irn = new_r_Proj(current_ir_graph, block, call, mode_T, pn_Call_T_result); + irn = new_r_Proj(block, call, mode_T, pn_Call_T_result); for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) { switch (get_Proj_proj(proj)) { case pn_Div_M: /* Memory result. */ /* reroute to the call */ set_Proj_pred(proj, call); - set_Proj_proj(proj, pn_Call_M_except); + set_Proj_proj(proj, pn_Call_M); break; case pn_Div_X_except: /* Execution result if exception occurred. */ /* reroute to the call */ @@ -598,17 +585,17 @@ static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) { case pn_Div_res: /* Result of computation. */ idx = get_irn_idx(proj); assert(idx < env->n_entries); - env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, mode, 0); - env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1); + env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0); + env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1); break; default: assert(0 && "unexpected Proj number"); - } + } /* switch */ /* mark this proj: we have handled it already, otherwise we might fall into * out new nodes. */ mark_irn_visited(proj); - } -} + } /* for */ +} /* lower_Div */ /** * Translate a Mod. @@ -632,7 +619,7 @@ static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) { /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ in[0] = entry->low_word; in[1] = entry->high_word; @@ -645,28 +632,27 @@ static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) { /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ in[2] = entry->low_word; in[3] = entry->high_word; - dbg = get_irn_dbg_info(node); + dbg = get_irn_dbg_info(node); block = get_nodes_block(node); mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u; opmode = get_irn_op_mode(node); - irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env); - call = new_rd_Call(dbg, current_ir_graph, block, get_Mod_mem(node), - irn, 4, in, mtp); + irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, env); + call = new_rd_Call(dbg, block, get_Mod_mem(node), irn, 4, in, mtp); set_irn_pinned(call, get_irn_pinned(node)); - irn = new_r_Proj(current_ir_graph, block, call, mode_T, pn_Call_T_result); + irn = new_r_Proj(block, call, mode_T, pn_Call_T_result); for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) { switch (get_Proj_proj(proj)) { case pn_Mod_M: /* Memory result. */ /* reroute to the call */ set_Proj_pred(proj, call); - set_Proj_proj(proj, pn_Call_M_except); + set_Proj_proj(proj, pn_Call_M); break; case pn_Mod_X_except: /* Execution result if exception occurred. */ /* reroute to the call */ @@ -676,17 +662,17 @@ static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) { case pn_Mod_res: /* Result of computation. */ idx = get_irn_idx(proj); assert(idx < env->n_entries); - env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, mode, 0); - env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1); + env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0); + env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1); break; default: assert(0 && "unexpected Proj number"); - } + } /* switch */ /* mark this proj: we have handled it already, otherwise we might fall into * out new nodes. */ mark_irn_visited(proj); - } -} + } /* for */ +} /* lower_Mod */ /** * Translate a DivMod. @@ -694,7 +680,9 @@ static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) { * Create two intrinsic Calls. */ static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) { - ir_node *block, *proj, *irn, *mem, *callDiv, *callMod, *resDiv, *resMod; + ir_node *block, *proj, *irn, *mem, *callDiv, *callMod; + ir_node *resDiv = NULL; + ir_node *resMod = NULL; ir_node *in[4]; ir_mode *opmode; dbg_info *dbg; @@ -709,8 +697,8 @@ static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) { case pn_DivMod_res_div: flags |= 1; break; case pn_DivMod_res_mod: flags |= 2; break; default: break; - } - } + } /* switch */ + } /* for */ irn = get_DivMod_left(node); entry = env->entries[get_irn_idx(irn)]; @@ -720,7 +708,7 @@ static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) { /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ in[0] = entry->low_word; in[1] = entry->high_word; @@ -733,12 +721,12 @@ static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) { /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ in[2] = entry->low_word; in[3] = entry->high_word; - dbg = get_irn_dbg_info(node); + dbg = get_irn_dbg_info(node); block = get_nodes_block(node); mem = get_DivMod_mem(node); @@ -747,29 +735,27 @@ static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) { mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u; if (flags & 1) { opmode = get_irn_op_mode(node); - irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env); - callDiv = new_rd_Call(dbg, current_ir_graph, block, mem, - irn, 4, in, mtp); + irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, env); + callDiv = new_rd_Call(dbg, block, mem, irn, 4, in, mtp); set_irn_pinned(callDiv, get_irn_pinned(node)); - resDiv = new_r_Proj(current_ir_graph, block, callDiv, mode_T, pn_Call_T_result); - } + resDiv = new_r_Proj(block, callDiv, mode_T, pn_Call_T_result); + } /* if */ if (flags & 2) { if (flags & 1) - mem = new_r_Proj(current_ir_graph, block, callDiv, mode_M, pn_Call_M); + mem = new_r_Proj(block, callDiv, mode_M, pn_Call_M); opmode = get_irn_op_mode(node); - irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env); - callMod = new_rd_Call(dbg, current_ir_graph, block, mem, - irn, 4, in, mtp); + irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, env); + callMod = new_rd_Call(dbg, block, mem, irn, 4, in, mtp); set_irn_pinned(callMod, get_irn_pinned(node)); - resMod = new_r_Proj(current_ir_graph, block, callMod, mode_T, pn_Call_T_result); - } + resMod = new_r_Proj(block, callMod, mode_T, pn_Call_T_result); + } /* if */ for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) { switch (get_Proj_proj(proj)) { case pn_DivMod_M: /* Memory result. */ /* reroute to the first call */ set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem)); - set_Proj_proj(proj, pn_Call_M_except); + set_Proj_proj(proj, pn_Call_M); break; case pn_DivMod_X_except: /* Execution result if exception occurred. */ /* reroute to the first call */ @@ -779,22 +765,22 @@ static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) { case pn_DivMod_res_div: /* Result of Div. */ idx = get_irn_idx(proj); assert(idx < env->n_entries); - env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, resDiv, mode, 0); - env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, resDiv, mode, 1); + env->entries[idx]->low_word = new_r_Proj(block, resDiv, env->params->low_unsigned, 0); + env->entries[idx]->high_word = new_r_Proj(block, resDiv, mode, 1); break; case pn_DivMod_res_mod: /* Result of Mod. */ idx = get_irn_idx(proj); - env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, resMod, mode, 0); - env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, resMod, mode, 1); + env->entries[idx]->low_word = new_r_Proj(block, resMod, env->params->low_unsigned, 0); + env->entries[idx]->high_word = new_r_Proj(block, resMod, mode, 1); break; default: assert(0 && "unexpected Proj number"); - } + } /* switch */ /* mark this proj: we have handled it already, otherwise we might fall into * out new nodes. */ mark_irn_visited(proj); - } -} + } /* for */ +} /* lower_DivMod */ /** * Translate a Binop. @@ -807,6 +793,7 @@ static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) { dbg_info *dbg; ir_type *mtp; int idx; + ir_graph *irg; node_entry_t *entry; irn = get_binop_left(node); @@ -817,7 +804,7 @@ static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) { /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ in[0] = entry->low_word; in[1] = entry->high_word; @@ -830,26 +817,27 @@ static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) { /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ in[2] = entry->low_word; in[3] = entry->high_word; - dbg = get_irn_dbg_info(node); + dbg = get_irn_dbg_info(node); block = get_nodes_block(node); + irg = current_ir_graph; mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u; - irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env); - irn = new_rd_Call(dbg, current_ir_graph, block, get_irg_no_mem(current_ir_graph), + irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env); + irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph), irn, 4, in, mtp); set_irn_pinned(irn, get_irn_pinned(node)); - irn = new_r_Proj(current_ir_graph, block, irn, mode_T, pn_Call_T_result); + irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result); idx = get_irn_idx(node); assert(idx < env->n_entries); - env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, mode, 0); - env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1); -} + env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0); + env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1); +} /* lower_Binop */ /** * Translate a Shiftop. @@ -862,6 +850,7 @@ static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) { dbg_info *dbg; ir_type *mtp; int idx; + ir_graph *irg; node_entry_t *entry; irn = get_binop_left(node); @@ -872,7 +861,7 @@ static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) { /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ in[0] = entry->low_word; in[1] = entry->high_word; @@ -882,31 +871,33 @@ static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) { dbg = get_irn_dbg_info(node); block = get_nodes_block(node); + irg = current_ir_graph; mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u; - irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env); - irn = new_rd_Call(dbg, current_ir_graph, block, get_irg_no_mem(current_ir_graph), + irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env); + irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph), irn, 3, in, mtp); set_irn_pinned(irn, get_irn_pinned(node)); - irn = new_r_Proj(current_ir_graph, block, irn, mode_T, pn_Call_T_result); + irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result); idx = get_irn_idx(node); assert(idx < env->n_entries); - env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, mode, 0); - env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1); -} + env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0); + env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1); +} /* lower_Shiftop */ /** * Translate a Shr and handle special cases. */ static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) { - ir_node *right = get_Shr_right(node); + ir_node *right = get_Shr_right(node); + ir_graph *irg = current_ir_graph; if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) { tarval *tv = get_Const_tarval(right); if (tarval_is_long(tv) && - get_tarval_long(tv) >= get_mode_size_bits(mode)) { + get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) { ir_node *block = get_nodes_block(node); ir_node *left = get_Shr_left(node); ir_node *c; @@ -917,116 +908,178 @@ static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) { idx = get_irn_idx(node); if (shf_cnt > 0) { - c = new_r_Const_long(current_ir_graph, block, mode_Iu, shf_cnt); - env->entries[idx]->low_word = new_r_Shr(current_ir_graph, block, left, c, mode); - } - else + c = new_r_Const_long(irg, env->params->low_unsigned, shf_cnt); + env->entries[idx]->low_word = new_r_Shr(block, left, c, mode); + } else { env->entries[idx]->low_word = left; - env->entries[idx]->high_word = new_r_Const(current_ir_graph, block, mode, get_mode_null(mode)); + } /* if */ + env->entries[idx]->high_word = new_r_Const(irg, get_mode_null(mode)); return; - } - } + } /* if */ + } /* if */ lower_Shiftop(node, mode, env); -} +} /* lower_Shr */ /** * Translate a Shl and handle special cases. */ static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) { - ir_node *right = get_Shl_right(node); + ir_node *right = get_Shl_right(node); + ir_graph *irg = current_ir_graph; if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) { tarval *tv = get_Const_tarval(right); if (tarval_is_long(tv) && - get_tarval_long(tv) >= get_mode_size_bits(mode)) { + get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) { + ir_mode *mode_l; ir_node *block = get_nodes_block(node); ir_node *left = get_Shl_left(node); ir_node *c; long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode); int idx = get_irn_idx(left); - left = env->entries[idx]->low_word; + left = new_r_Conv(block, env->entries[idx]->low_word, mode); idx = get_irn_idx(node); + mode_l = env->params->low_unsigned; if (shf_cnt > 0) { - c = new_r_Const_long(current_ir_graph, block, mode_Iu, shf_cnt); - env->entries[idx]->high_word = new_r_Shl(current_ir_graph, block, left, c, mode); - } - else + c = new_r_Const_long(irg, mode_l, shf_cnt); + env->entries[idx]->high_word = new_r_Shl(block, left, c, mode); + } else { env->entries[idx]->high_word = left; - env->entries[idx]->low_word = new_r_Const(current_ir_graph, block, mode, get_mode_null(mode)); + } /* if */ + env->entries[idx]->low_word = new_r_Const(irg, get_mode_null(mode_l)); return; - } - } + } /* if */ + } /* if */ lower_Shiftop(node, mode, env); -} +} /* lower_Shl */ /** * Translate a Shrs and handle special cases. */ static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) { - ir_node *right = get_Shrs_right(node); + ir_node *right = get_Shrs_right(node); + ir_graph *irg = current_ir_graph; if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) { tarval *tv = get_Const_tarval(right); if (tarval_is_long(tv) && - get_tarval_long(tv) >= get_mode_size_bits(mode)) { - ir_node *block = get_nodes_block(node); - ir_node *left = get_Shrs_left(node); - long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode); + get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) { + ir_node *block = get_nodes_block(node); + ir_node *left = get_Shrs_left(node); + long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode); + int idx = get_irn_idx(left); + ir_mode *mode_l; + ir_node *low; ir_node *c; - int idx = get_irn_idx(left); left = env->entries[idx]->high_word; idx = get_irn_idx(node); + mode_l = env->params->low_unsigned; if (shf_cnt > 0) { - c = new_r_Const_long(current_ir_graph, block, mode_Iu, shf_cnt); - env->entries[idx]->low_word = new_r_Shrs(current_ir_graph, block, left, c, mode); - } - else - env->entries[idx]->low_word = left; + c = new_r_Const_long(irg, mode_l, shf_cnt); + low = new_r_Shrs(block, left, c, mode); + } else { + low = left; + } /* if */ + /* low word is expected to have mode_l */ + env->entries[idx]->low_word = new_r_Conv(block, low, mode_l); - c = new_r_Const_long(current_ir_graph, block, mode_Iu, get_mode_size_bits(mode) - 1); - env->entries[idx]->high_word = new_r_Shrs(current_ir_graph, block, left, c, mode); + c = new_r_Const_long(irg, mode_l, get_mode_size_bits(mode) - 1); + env->entries[idx]->high_word = new_r_Shrs(block, left, c, mode); return; - } - } + } /* if */ + } /* if */ lower_Shiftop(node, mode, env); -} +} /* lower_Shrs */ /** - * Translate a Rot and handle special cases. + * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes. */ -static void lower_Rot(ir_node *node, ir_mode *mode, lower_env_t *env) { - ir_node *right = get_Rot_right(node); - - if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) { - tarval *tv = get_Const_tarval(right); +static void prepare_links_and_handle_rotl(ir_node *node, void *env) { + lower_env_t *lenv = env; + + if (is_Rotl(node)) { + ir_mode *mode = get_irn_op_mode(node); + if (mode == lenv->params->high_signed || + mode == lenv->params->high_unsigned) { + ir_node *right = get_Rotl_right(node); + ir_node *left, *shl, *shr, *or, *block, *sub, *c; + ir_mode *omode, *rmode; + dbg_info *dbg; + optimization_state_t state; + + if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) { + tarval *tv = get_Const_tarval(right); + + if (tarval_is_long(tv) && + get_tarval_long(tv) == (long)get_mode_size_bits(mode)) { + /* will be optimized in lower_Rotl() */ + return; + } + } - if (tarval_is_long(tv) && - get_tarval_long(tv) == get_mode_size_bits(mode)) { - ir_node *left = get_Rot_left(node); - ir_node *h, *l; - int idx = get_irn_idx(left); + /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */ + dbg = get_irn_dbg_info(node); + omode = get_irn_mode(node); + left = get_Rotl_left(node); + block = get_nodes_block(node); + shl = new_rd_Shl(dbg, block, left, right, omode); + rmode = get_irn_mode(right); + c = new_Const_long(rmode, get_mode_size_bits(omode)); + sub = new_rd_Sub(dbg, block, c, right, rmode); + shr = new_rd_Shr(dbg, block, left, sub, omode); + + /* optimization must be switched off here, or we will get the Rotl back */ + save_optimization_state(&state); + set_opt_algebraic_simplification(0); + or = new_rd_Or(dbg, block, shl, shr, omode); + restore_optimization_state(&state); + + exchange(node, or); + + /* do lowering on the new nodes */ + prepare_links(shl, env); + prepare_links(c, env); + prepare_links(sub, env); + prepare_links(shr, env); + prepare_links(or, env); + } + } else { + prepare_links(node, env); + } +} - l = env->entries[idx]->low_word; - h = env->entries[idx]->high_word; - idx = get_irn_idx(node); +/** + * Translate a special case Rotl(x, sizeof(w)). + */ +static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) { + ir_node *right = get_Rotl_right(node); + ir_node *left = get_Rotl_left(node); + ir_node *h, *l; + int idx = get_irn_idx(left); + (void) right; + (void) mode; + + assert(get_mode_arithmetic(mode) == irma_twos_complement && + is_Const(right) && tarval_is_long(get_Const_tarval(right)) && + get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode)); + + l = env->entries[idx]->low_word; + h = env->entries[idx]->high_word; + idx = get_irn_idx(node); - env->entries[idx]->low_word = h; - env->entries[idx]->high_word = l; + env->entries[idx]->low_word = h; + env->entries[idx]->high_word = l; +} /* lower_Rotl */ - return; - } - } - lower_Shiftop(node, mode, env); -} /** * Translate an Unop. * @@ -1048,26 +1101,26 @@ static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) { /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ in[0] = entry->low_word; in[1] = entry->high_word; - dbg = get_irn_dbg_info(node); + dbg = get_irn_dbg_info(node); block = get_nodes_block(node); mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u; - irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env); - irn = new_rd_Call(dbg, current_ir_graph, block, get_irg_no_mem(current_ir_graph), + irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env); + irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph), irn, 2, in, mtp); set_irn_pinned(irn, get_irn_pinned(node)); - irn = new_r_Proj(current_ir_graph, block, irn, mode_T, pn_Call_T_result); + irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result); idx = get_irn_idx(node); assert(idx < env->n_entries); - env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, mode, 0); - env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1); -} + env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0); + env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1); +} /* lower_Unop */ /** * Translate a logical Binop. @@ -1075,11 +1128,12 @@ static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) { * Create two logical Binops. */ static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env, - ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) { + ir_node *(*constr_rd)(dbg_info *db, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) { ir_node *block, *irn; ir_node *lop_l, *lop_h, *rop_l, *rop_h; dbg_info *dbg; int idx; + ir_graph *irg; node_entry_t *entry; irn = get_binop_left(node); @@ -1090,7 +1144,7 @@ static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env, /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ lop_l = entry->low_word; lop_h = entry->high_word; @@ -1103,7 +1157,7 @@ static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env, /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ rop_l = entry->low_word; rop_h = entry->high_word; @@ -1113,11 +1167,12 @@ static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env, idx = get_irn_idx(node); assert(idx < env->n_entries); - env->entries[idx]->low_word = constr_rd(dbg, current_ir_graph, block, lop_l, rop_l, mode); - env->entries[idx]->high_word = constr_rd(dbg, current_ir_graph, block, lop_h, rop_h, mode); -} + irg = current_ir_graph; + env->entries[idx]->low_word = constr_rd(dbg, block, lop_l, rop_l, env->params->low_unsigned); + env->entries[idx]->high_word = constr_rd(dbg, block, lop_h, rop_h, mode); +} /* lower_Binop_logical */ -/** create a logical operation tranformation */ +/** create a logical operation transformation */ #define lower_logical(op) \ static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \ lower_Binop_logical(node, mode, env, new_rd_##op); \ @@ -1147,19 +1202,19 @@ static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) { /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ op_l = entry->low_word; op_h = entry->high_word; - dbg = get_irn_dbg_info(node); + dbg = get_irn_dbg_info(node); block = get_nodes_block(node); idx = get_irn_idx(node); assert(idx < env->n_entries); - env->entries[idx]->low_word = new_rd_Not(dbg, current_ir_graph, block, op_l, mode); - env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode); -} + env->entries[idx]->low_word = new_rd_Not(dbg, block, op_l, env->params->low_unsigned); + env->entries[idx]->high_word = new_rd_Not(dbg, block, op_h, mode); +} /* lower_Not */ /** * Translate a Cond. @@ -1169,6 +1224,7 @@ static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) { ir_node *sel = get_Cond_selector(node); ir_mode *m = get_irn_mode(sel); int idx; + (void) mode; if (m == mode_b) { node_entry_t *lentry, *rentry; @@ -1176,18 +1232,25 @@ static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) { ir_node *new_bl, *cmpH, *cmpL, *irn; ir_node *projHF, *projHT; ir_node *dst_blk; - ir_graph *irg; pn_Cmp pnc; + ir_graph *irg; dbg_info *dbg; + if(!is_Proj(sel)) + return; + cmp = get_Proj_pred(sel); + if(!is_Cmp(cmp)) + return; + left = get_Cmp_left(cmp); idx = get_irn_idx(left); lentry = env->entries[idx]; - if (! lentry) + if (! lentry) { /* a normal Cmp */ return; + } /* if */ right = get_Cmp_right(cmp); idx = get_irn_idx(right); @@ -1198,7 +1261,7 @@ static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) { /* not yet ready */ pdeq_putr(env->waitq, node); return; - } + } /* if */ /* all right, build the code */ for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) { @@ -1207,24 +1270,38 @@ static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) { if (proj_nr == pn_Cond_true) { assert(projT == NULL && "more than one Proj(true)"); projT = proj; - } - else { + } else { assert(proj_nr == pn_Cond_false); assert(projF == NULL && "more than one Proj(false)"); projF = proj; - } + } /* if */ mark_irn_visited(proj); - } + } /* for */ assert(projT && projF); /* create a new high compare */ - block = get_nodes_block(cmp); + block = get_nodes_block(node); + irg = get_Block_irg(block); dbg = get_irn_dbg_info(cmp); - irg = current_ir_graph; + pnc = get_Proj_proj(sel); + + if (is_Const(right) && is_Const_null(right)) { + if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) { + /* x ==/!= 0 ==> or(low,high) ==/!= 0 */ + ir_mode *mode = env->params->low_unsigned; + ir_node *low = new_r_Conv(block, lentry->low_word, mode); + ir_node *high = new_r_Conv(block, lentry->high_word, mode); + ir_node *or = new_rd_Or(dbg, block, low, high, mode); + ir_node *cmp = new_rd_Cmp(dbg, block, or, new_Const_long(mode, 0)); + + ir_node *proj = new_r_Proj(block, cmp, mode_b, pnc); + set_Cond_selector(node, proj); + return; + } + } - cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word); + cmpH = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word); - pnc = get_Proj_proj(sel); if (pnc == pn_Cmp_Eq) { /* simple case:a == b <==> a_h == b_h && a_l == b_l */ pmap_entry *entry = pmap_find(env->proj_2_block, projF); @@ -1232,69 +1309,67 @@ static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) { assert(entry); dst_blk = entry->value; - irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq); + irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Eq); dbg = get_irn_dbg_info(node); - irn = new_rd_Cond(dbg, irg, block, irn); + irn = new_rd_Cond(dbg, block, irn); - projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false); + projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false); mark_irn_visited(projHF); exchange(projF, projHF); - projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true); + projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true); mark_irn_visited(projHT); new_bl = new_r_Block(irg, 1, &projHT); dbg = get_irn_dbg_info(cmp); - cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word); - irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq); + cmpL = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word); + irn = new_r_Proj(new_bl, cmpL, mode_b, pn_Cmp_Eq); dbg = get_irn_dbg_info(node); - irn = new_rd_Cond(dbg, irg, new_bl, irn); + irn = new_rd_Cond(dbg, new_bl, irn); - proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false); + proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_false); mark_irn_visited(proj); add_block_cf_input(dst_blk, projHF, proj); - proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true); + proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_true); mark_irn_visited(proj); exchange(projT, proj); - } - else if (pnc == pn_Cmp_Lg) { + } else if (pnc == pn_Cmp_Lg) { /* simple case:a != b <==> a_h != b_h || a_l != b_l */ pmap_entry *entry = pmap_find(env->proj_2_block, projT); assert(entry); dst_blk = entry->value; - irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg); + irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Lg); dbg = get_irn_dbg_info(node); - irn = new_rd_Cond(dbg, irg, block, irn); + irn = new_rd_Cond(dbg, block, irn); - projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true); + projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true); mark_irn_visited(projHT); exchange(projT, projHT); - projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false); + projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false); mark_irn_visited(projHF); new_bl = new_r_Block(irg, 1, &projHF); dbg = get_irn_dbg_info(cmp); - cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word); - irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg); + cmpL = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word); + irn = new_r_Proj(new_bl, cmpL, mode_b, pn_Cmp_Lg); dbg = get_irn_dbg_info(node); - irn = new_rd_Cond(dbg, irg, new_bl, irn); + irn = new_rd_Cond(dbg, new_bl, irn); - proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true); + proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_true); mark_irn_visited(proj); add_block_cf_input(dst_blk, projHT, proj); - proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false); + proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_false); mark_irn_visited(proj); exchange(projF, proj); - } - else { - /* a rel b <==> a_h rel b_h || (a_h == b_h && a_l rel b_l) */ + } else { + /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */ ir_node *dstT, *dstF, *newbl_eq, *newbl_l; pmap_entry *entry; @@ -1306,52 +1381,51 @@ static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) { assert(entry); dstF = entry->value; - irn = new_r_Proj(irg, block, cmpH, mode_b, pnc); + irn = new_r_Proj(block, cmpH, mode_b, pnc & ~pn_Cmp_Eq); dbg = get_irn_dbg_info(node); - irn = new_rd_Cond(dbg, irg, block, irn); + irn = new_rd_Cond(dbg, block, irn); - projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true); + projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true); mark_irn_visited(projHT); exchange(projT, projHT); projT = projHT; - projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false); + projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false); mark_irn_visited(projHF); newbl_eq = new_r_Block(irg, 1, &projHF); - irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq); - irn = new_rd_Cond(dbg, irg, newbl_eq, irn); + irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Eq); + irn = new_rd_Cond(dbg, newbl_eq, irn); - proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false); + proj = new_r_Proj(newbl_eq, irn, mode_X, pn_Cond_false); mark_irn_visited(proj); exchange(projF, proj); projF = proj; - proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true); + proj = new_r_Proj(newbl_eq, irn, mode_X, pn_Cond_true); mark_irn_visited(proj); newbl_l = new_r_Block(irg, 1, &proj); dbg = get_irn_dbg_info(cmp); - cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word); - irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc); + cmpL = new_rd_Cmp(dbg, newbl_l, lentry->low_word, rentry->low_word); + irn = new_r_Proj(newbl_l, cmpL, mode_b, pnc); dbg = get_irn_dbg_info(node); - irn = new_rd_Cond(dbg, irg, newbl_l, irn); + irn = new_rd_Cond(dbg, newbl_l, irn); - proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true); + proj = new_r_Proj(newbl_l, irn, mode_X, pn_Cond_true); mark_irn_visited(proj); add_block_cf_input(dstT, projT, proj); - proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false); + proj = new_r_Proj(newbl_l, irn, mode_X, pn_Cond_false); mark_irn_visited(proj); add_block_cf_input(dstF, projF, proj); - } + } /* if */ /* we have changed the control flow */ env->flags |= CF_CHANGED; - } - else { + } else { idx = get_irn_idx(sel); if (env->entries[idx]) { @@ -1366,11 +1440,11 @@ static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) { /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ set_Cond_selector(node, env->entries[idx]->low_word); - } - } -} + } /* if */ + } /* if */ +} /* lower_Cond */ /** * Translate a Conv to higher_signed @@ -1378,7 +1452,8 @@ static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) { static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) { ir_node *op = get_Conv_op(node); ir_mode *imode = get_irn_mode(op); - ir_mode *dst_mode = env->params->low_signed; + ir_mode *dst_mode_l = env->params->low_unsigned; + ir_mode *dst_mode_h = env->params->low_signed; int idx = get_irn_idx(node); ir_graph *irg = current_ir_graph; ir_node *block = get_nodes_block(node); @@ -1387,35 +1462,53 @@ static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) { assert(idx < env->n_entries); if (mode_is_int(imode) || mode_is_reference(imode)) { - /* simple case: create a high word */ - if (imode != dst_mode) - op = new_rd_Conv(dbg, irg, block, op, dst_mode); + if (imode == env->params->high_unsigned) { + /* a Conv from Lu to Ls */ + int op_idx = get_irn_idx(op); - env->entries[idx]->low_word = op; - env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op, - new_Const_long(mode_Iu, get_mode_size_bits(dst_mode) - 1), dst_mode); - } - else { + if (! env->entries[op_idx]->low_word) { + /* not ready yet, wait */ + pdeq_putr(env->waitq, node); + return; + } /* if */ + env->entries[idx]->low_word = new_rd_Conv(dbg, block, env->entries[op_idx]->low_word, dst_mode_l); + env->entries[idx]->high_word = new_rd_Conv(dbg, block, env->entries[op_idx]->high_word, dst_mode_h); + } else { + /* simple case: create a high word */ + if (imode != dst_mode_l) + op = new_rd_Conv(dbg, block, op, dst_mode_l); + + env->entries[idx]->low_word = op; + + if (mode_is_signed(imode)) { + ir_node *op_conv = new_rd_Conv(dbg, block, op, dst_mode_h); + env->entries[idx]->high_word = new_rd_Shrs(dbg, block, op_conv, + new_Const_long(dst_mode_l, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h); + } else { + env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode_h)); + } /* if */ + } /* if */ + } else { ir_node *irn, *call; ir_mode *omode = env->params->high_signed; ir_type *mtp = get_conv_type(imode, omode, env); - irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env); - call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp); + irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env); + call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp); set_irn_pinned(call, get_irn_pinned(node)); - irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result); + irn = new_r_Proj(block, call, mode_T, pn_Call_T_result); - env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0); - env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1); - } -} + env->entries[idx]->low_word = new_r_Proj(block, irn, dst_mode_l, 0); + env->entries[idx]->high_word = new_r_Proj(block, irn, dst_mode_h, 1); + } /* if */ +} /* lower_Conv_to_Ls */ /** * Translate a Conv to higher_unsigned */ static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) { ir_node *op = get_Conv_op(node); - ir_mode *imode = get_irn_mode(op); + ir_mode *imode = get_irn_mode(op); ir_mode *dst_mode = env->params->low_unsigned; int idx = get_irn_idx(node); ir_graph *irg = current_ir_graph; @@ -1425,27 +1518,46 @@ static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) { assert(idx < env->n_entries); if (mode_is_int(imode) || mode_is_reference(imode)) { - /* simple case: create a high word */ - if (imode != dst_mode) - op = new_rd_Conv(dbg, irg, block, op, dst_mode); + if (imode == env->params->high_signed) { + /* a Conv from Ls to Lu */ + int op_idx = get_irn_idx(op); - env->entries[idx]->low_word = op; - env->entries[idx]->high_word = new_Const(dst_mode, get_mode_null(dst_mode)); - } - else { + if (! env->entries[op_idx]->low_word) { + /* not ready yet, wait */ + pdeq_putr(env->waitq, node); + return; + } /* if */ + env->entries[idx]->low_word = new_rd_Conv(dbg, block, env->entries[op_idx]->low_word, dst_mode); + env->entries[idx]->high_word = new_rd_Conv(dbg, block, env->entries[op_idx]->high_word, dst_mode); + } else { + /* simple case: create a high word */ + if (imode != dst_mode) + op = new_rd_Conv(dbg, block, op, dst_mode); + + env->entries[idx]->low_word = op; + + if (mode_is_signed(imode)) { + env->entries[idx]->high_word = new_rd_Shrs(dbg, block, op, + new_Const_long(dst_mode, get_mode_size_bits(dst_mode) - 1), dst_mode); + } else { + env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode)); + } /* if */ + } /* if */ + } else { ir_node *irn, *call; ir_mode *omode = env->params->high_unsigned; ir_type *mtp = get_conv_type(imode, omode, env); - irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env); - call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp); + /* do an intrinsic call */ + irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env); + call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp); set_irn_pinned(call, get_irn_pinned(node)); - irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result); + irn = new_r_Proj(block, call, mode_T, pn_Call_T_result); - env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0); - env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1); - } -} + env->entries[idx]->low_word = new_r_Proj(block, irn, dst_mode, 0); + env->entries[idx]->high_word = new_r_Proj(block, irn, dst_mode, 1); + } /* if */ +} /* lower_Conv_to_Lu */ /** * Translate a Conv from higher_signed @@ -1460,31 +1572,36 @@ static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) { assert(idx < env->n_entries); + if (! env->entries[idx]->low_word) { + /* not ready yet, wait */ + pdeq_putr(env->waitq, node); + return; + } /* if */ + if (mode_is_int(omode) || mode_is_reference(omode)) { op = env->entries[idx]->low_word; /* simple case: create a high word */ if (omode != env->params->low_signed) - op = new_rd_Conv(dbg, irg, block, op, omode); + op = new_rd_Conv(dbg, block, op, omode); set_Conv_op(node, op); - } - else { + } else { ir_node *irn, *call, *in[2]; ir_mode *imode = env->params->high_signed; ir_type *mtp = get_conv_type(imode, omode, env); - irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env); + irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env); in[0] = env->entries[idx]->low_word; in[1] = env->entries[idx]->high_word; - call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp); + call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp); set_irn_pinned(call, get_irn_pinned(node)); - irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result); + irn = new_r_Proj(block, call, mode_T, pn_Call_T_result); - exchange(node, new_r_Proj(irg, block, irn, omode, 0)); - } -} + exchange(node, new_r_Proj(block, irn, omode, 0)); + } /* if */ +} /* lower_Conv_from_Ls */ /** * Translate a Conv from higher_unsigned @@ -1499,31 +1616,36 @@ static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) { assert(idx < env->n_entries); + if (! env->entries[idx]->low_word) { + /* not ready yet, wait */ + pdeq_putr(env->waitq, node); + return; + } /* if */ + if (mode_is_int(omode) || mode_is_reference(omode)) { op = env->entries[idx]->low_word; /* simple case: create a high word */ if (omode != env->params->low_unsigned) - op = new_rd_Conv(dbg, irg, block, op, omode); + op = new_rd_Conv(dbg, block, op, omode); set_Conv_op(node, op); - } - else { + } else { ir_node *irn, *call, *in[2]; ir_mode *imode = env->params->high_unsigned; ir_type *mtp = get_conv_type(imode, omode, env); - irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env); + irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env); in[0] = env->entries[idx]->low_word; in[1] = env->entries[idx]->high_word; - call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp); + call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp); set_irn_pinned(call, get_irn_pinned(node)); - irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result); + irn = new_r_Proj(block, call, mode_T, pn_Call_T_result); - exchange(node, new_r_Proj(irg, block, irn, omode, 0)); - } -} + exchange(node, new_r_Proj(block, irn, omode, 0)); + } /* if */ +} /* lower_Conv_from_Lu */ /** * Translate a Conv. @@ -1531,29 +1653,33 @@ static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) { static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) { mode = get_irn_mode(node); - if (mode == env->params->high_signed) + if (mode == env->params->high_signed) { lower_Conv_to_Ls(node, env); - else if (mode == env->params->high_unsigned) + } else if (mode == env->params->high_unsigned) { lower_Conv_to_Lu(node, env); - else { + } else { ir_mode *mode = get_irn_mode(get_Conv_op(node)); - if (mode == env->params->high_signed) + if (mode == env->params->high_signed) { lower_Conv_from_Ls(node, env); - else { - assert(mode == env->params->high_unsigned); + } else if (mode == env->params->high_unsigned) { lower_Conv_from_Lu(node, env); - } - } -} + } /* if */ + } /* if */ +} /* lower_Conv */ /** * Lower the method type. + * + * @param mtp the method type to lower + * @param ent the lower environment + * + * @return the lowered type */ static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) { pmap_entry *entry; - ident *id; - ir_type *res; + ident *id, *lid; + ir_type *res, *value_type; if (is_lowered_type(mtp)) return mtp; @@ -1573,8 +1699,8 @@ static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) { if (mode == env->params->high_signed || mode == env->params->high_unsigned) ++n_param; - } - } + } /* if */ + } /* for */ /* count new number of results */ n_res = r = get_method_n_ress(mtp); @@ -1587,10 +1713,10 @@ static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) { if (mode == env->params->high_signed || mode == env->params->high_unsigned) ++n_res; - } - } + } /* if */ + } /* for */ - id = mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp)); + id = id_mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp)); res = new_type_method(id, n_param, n_res); /* set param types and result types */ @@ -1601,19 +1727,18 @@ static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) { ir_mode *mode = get_type_mode(tp); if (mode == env->params->high_signed) { + set_method_param_type(res, n_param++, tp_u); set_method_param_type(res, n_param++, tp_s); - set_method_param_type(res, n_param++, tp_s); - } - else if (mode == env->params->high_unsigned) { + } else if (mode == env->params->high_unsigned) { set_method_param_type(res, n_param++, tp_u); set_method_param_type(res, n_param++, tp_u); - } - else + } else { set_method_param_type(res, n_param++, tp); - } - else + } /* if */ + } else { set_method_param_type(res, n_param++, tp); - } + } /* if */ + } /* for */ for (i = n_res = 0; i < r; ++i) { ir_type *tp = get_method_res_type(mtp, i); @@ -1621,37 +1746,75 @@ static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) { ir_mode *mode = get_type_mode(tp); if (mode == env->params->high_signed) { + set_method_res_type(res, n_res++, tp_u); set_method_res_type(res, n_res++, tp_s); - set_method_res_type(res, n_res++, tp_s); - } - else if (mode == env->params->high_unsigned) { + } else if (mode == env->params->high_unsigned) { set_method_res_type(res, n_res++, tp_u); set_method_res_type(res, n_res++, tp_u); - } - else + } else { set_method_res_type(res, n_res++, tp); - } - else + } /* if */ + } else { set_method_res_type(res, n_res++, tp); - } + } /* if */ + } /* for */ set_lowered_type(mtp, res); pmap_insert(lowered_type, mtp, res); - } - else + + value_type = get_method_value_param_type(mtp); + if (value_type != NULL) { + /* this creates a new value parameter type */ + (void)get_method_value_param_ent(res, 0); + + /* set new param positions */ + for (i = n_param = 0; i < n; ++i) { + ir_type *tp = get_method_param_type(mtp, i); + ident *id = get_method_param_ident(mtp, i); + ir_entity *ent = get_method_value_param_ent(mtp, i); + + set_entity_link(ent, INT_TO_PTR(n_param)); + if (is_Primitive_type(tp)) { + ir_mode *mode = get_type_mode(tp); + + if (mode == env->params->high_signed || mode == env->params->high_unsigned) { + if (id != NULL) { + lid = id_mangle(id, env->first_id); + set_method_param_ident(res, n_param, lid); + set_entity_ident(get_method_value_param_ent(res, n_param), lid); + lid = id_mangle(id, env->next_id); + set_method_param_ident(res, n_param + 1, lid); + set_entity_ident(get_method_value_param_ent(res, n_param + 1), lid); + } /* if */ + n_param += 2; + continue; + } /* if */ + } /* if */ + if (id != NULL) { + set_method_param_ident(res, n_param, id); + set_entity_ident(get_method_value_param_ent(res, n_param), id); + } /* if */ + ++n_param; + } /* for */ + + set_lowered_type(value_type, get_method_value_param_type(res)); + } /* if */ + } else { res = entry->value; + } /* if */ return res; -} +} /* lower_mtp */ /** * Translate a Return. */ static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) { - ir_graph *irg = current_ir_graph; - entity *ent = get_irg_entity(irg); - ir_type *mtp = get_entity_type(ent); - ir_node **in; - int i, j, n, idx; - int need_conv = 0; + ir_graph *irg = current_ir_graph; + ir_entity *ent = get_irg_entity(irg); + ir_type *mtp = get_entity_type(ent); + ir_node **in; + int i, j, n, idx; + int need_conv = 0; + (void) mode; /* check if this return must be lowered */ for (i = 0, n = get_Return_n_ress(node); i < n; ++i) { @@ -1665,10 +1828,10 @@ static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) { /* not ready yet, wait */ pdeq_putr(env->waitq, node); return; - } + } /* if */ need_conv = 1; - } - } + } /* if */ + } /* for */ if (! need_conv) return; @@ -1691,31 +1854,32 @@ static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) { if (env->entries[idx]) { in[++j] = env->entries[idx]->low_word; in[++j] = env->entries[idx]->high_word; - } - else + } else { in[++j] = pred; - } + } /* if */ + } /* for */ set_irn_in(node, j+1, in); -} +} /* lower_Return */ /** * Translate the parameters. */ static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) { - ir_graph *irg = current_ir_graph; - entity *ent = get_irg_entity(irg); - ir_type *tp = get_entity_type(ent); - ir_type *mtp; - long *new_projs; - int i, j, n_params, rem; - ir_node *proj, *args; - - if (is_lowered_type(tp)) + ir_graph *irg = get_irn_irg(node); + ir_entity *ent = get_irg_entity(irg); + ir_type *tp = get_entity_type(ent); + ir_type *mtp; + long *new_projs; + int i, j, n_params, rem; + ir_node *proj, *args; + (void) mode; + + if (is_lowered_type(tp)) { mtp = get_associated_type(tp); - else + } else { mtp = tp; - + } /* if */ assert(! is_lowered_type(mtp)); n_params = get_method_n_params(mtp); @@ -1735,8 +1899,8 @@ static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) { if (mode == env->params->high_signed || mode == env->params->high_unsigned) ++j; - } - } + } /* if */ + } /* for */ if (i == j) return; @@ -1768,39 +1932,43 @@ static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) { idx = get_irn_idx(proj); if (env->entries[idx]) { + ir_mode *low_mode = env->params->low_unsigned; + mode = get_irn_mode(proj); - if (mode == env->params->high_signed) + if (mode == env->params->high_signed) { mode = env->params->low_signed; - else + } else { mode = env->params->low_unsigned; + } /* if */ dbg = get_irn_dbg_info(proj); env->entries[idx]->low_word = - new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr]); + new_rd_Proj(dbg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]); env->entries[idx]->high_word = - new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1); - } - } + new_rd_Proj(dbg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1); + } /* if */ + } /* for */ set_optimize(rem); -} +} /* lower_Start */ /** * Translate a Call. */ static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) { - ir_graph *irg = current_ir_graph; ir_type *tp = get_Call_type(node); ir_type *call_tp; ir_node **in, *proj, *results; int n_params, n_res, need_lower = 0; int i, j; long *res_numbers = NULL; + (void) mode; - if (is_lowered_type(tp)) + if (is_lowered_type(tp)) { call_tp = get_associated_type(tp); - else + } else { call_tp = tp; + } /* if */ assert(! is_lowered_type(call_tp)); @@ -1815,9 +1983,9 @@ static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) { mode == env->params->high_unsigned) { need_lower = 1; break; - } - } - } + } /* if */ + } /* if */ + } /* for */ n_res = get_method_n_ress(call_tp); if (n_res > 0) { NEW_ARR_A(long, res_numbers, n_res); @@ -1833,10 +2001,10 @@ static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) { mode == env->params->high_unsigned) { need_lower = 1; ++j; - } - } - } - } + } /* if */ + } /* if */ + } /* for */ + } /* if */ if (! need_lower) return; @@ -1862,10 +2030,10 @@ static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) { } in[j++] = env->entries[idx]->low_word; in[j++] = env->entries[idx]->high_word; - } - else + } else { in[j++] = pred; - } + } /* if */ + } /* for */ set_irn_in(node, j, in); @@ -1878,8 +2046,8 @@ static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) { /* found the result proj */ results = proj; break; - } - } + } /* if */ + } /* for */ if (results) { /* there are results */ int rem = get_optimize(); @@ -1897,35 +2065,39 @@ static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) { idx = get_irn_idx(proj); if (env->entries[idx]) { ir_mode *mode = get_irn_mode(proj); + ir_mode *low_mode = env->params->low_unsigned; dbg_info *dbg; - if (mode == env->params->high_signed) + if (mode == env->params->high_signed) { mode = env->params->low_signed; - else + } else { mode = env->params->low_unsigned; + } /* if */ dbg = get_irn_dbg_info(proj); env->entries[idx]->low_word = - new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr]); + new_rd_Proj(dbg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]); env->entries[idx]->high_word = - new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1); - } + new_rd_Proj(dbg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1); + } /* if */ mark_irn_visited(proj); - } - } + } /* if */ + } /* for */ set_optimize(rem); } -} +} /* lower_Call */ /** * Translate an Unknown into two. */ static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) { - int idx = get_irn_idx(node); + int idx = get_irn_idx(node); + ir_graph *irg = get_irn_irg(node); + ir_mode *low_mode = env->params->low_unsigned; - env->entries[idx]->low_word = - env->entries[idx]->high_word = new_r_Unknown(current_ir_graph, mode); -} + env->entries[idx]->low_word = new_r_Unknown(irg, low_mode); + env->entries[idx]->high_word = new_r_Unknown(irg, mode); +} /* lower_Unknown */ /** * Translate a Phi. @@ -1933,7 +2105,9 @@ static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) { * First step: just create two templates */ static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) { - ir_node *block, *unk; + ir_mode *mode_l = env->params->low_unsigned; + ir_graph *irg = get_irn_irg(phi); + ir_node *block, *unk_l, *unk_h, *phi_l, *phi_h; ir_node **inl, **inh; dbg_info *dbg; int idx, i, arity = get_Phi_n_preds(phi); @@ -1952,19 +2126,19 @@ static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) { if (env->entries[idx]->low_word) { set_Phi_pred(phil, i, env->entries[idx]->low_word); set_Phi_pred(phih, i, env->entries[idx]->high_word); - } - else { + } else { /* still not ready */ pdeq_putr(env->waitq, phi); return; - } - } - } + } /* if */ + } /* for */ + } /* if */ /* first create a new in array */ NEW_ARR_A(ir_node *, inl, arity); NEW_ARR_A(ir_node *, inh, arity); - unk = new_r_Unknown(current_ir_graph, mode); + unk_l = new_r_Unknown(irg, mode_l); + unk_h = new_r_Unknown(irg, mode); for (i = 0; i < arity; ++i) { ir_node *pred = get_Phi_pred(phi, i); @@ -1973,62 +2147,260 @@ static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) { if (env->entries[idx]->low_word) { inl[i] = env->entries[idx]->low_word; inh[i] = env->entries[idx]->high_word; - } - else { - inl[i] = unk; - inh[i] = unk; + } else { + inl[i] = unk_l; + inh[i] = unk_h; enq = 1; - } - } + } /* if */ + } /* for */ - dbg = get_irn_dbg_info(phi); + dbg = get_irn_dbg_info(phi); block = get_nodes_block(phi); idx = get_irn_idx(phi); assert(idx < env->n_entries); - env->entries[idx]->low_word = new_rd_Phi(dbg, current_ir_graph, block, arity, inl, mode); - env->entries[idx]->high_word = new_rd_Phi(dbg, current_ir_graph, block, arity, inh, mode); + env->entries[idx]->low_word = phi_l = new_rd_Phi(dbg, block, arity, inl, mode_l); + env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, block, arity, inh, mode); + + /* Don't forget to link the new Phi nodes into the block. + * Beware that some Phis might be optimized away. */ + if (is_Phi(phi_l)) + add_Block_phi(block, phi_l); + if (is_Phi(phi_h)) + add_Block_phi(block, phi_h); if (enq) { /* not yet finished */ pdeq_putr(env->waitq, phi); - } -} + } /* if */ +} /* lower_Phi */ + +/** + * Translate a Mux. + */ +static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) { + ir_node *block, *val; + ir_node *true_l, *true_h, *false_l, *false_h, *sel; + dbg_info *dbg; + int idx; + + val = get_Mux_true(mux); + idx = get_irn_idx(val); + if (env->entries[idx]->low_word) { + /* Values already build */ + true_l = env->entries[idx]->low_word; + true_h = env->entries[idx]->high_word; + } else { + /* still not ready */ + pdeq_putr(env->waitq, mux); + return; + } /* if */ + + val = get_Mux_false(mux); + idx = get_irn_idx(val); + if (env->entries[idx]->low_word) { + /* Values already build */ + false_l = env->entries[idx]->low_word; + false_h = env->entries[idx]->high_word; + } else { + /* still not ready */ + pdeq_putr(env->waitq, mux); + return; + } /* if */ + + + sel = get_Mux_sel(mux); + + dbg = get_irn_dbg_info(mux); + block = get_nodes_block(mux); + + idx = get_irn_idx(mux); + assert(idx < env->n_entries); + env->entries[idx]->low_word = new_rd_Mux(dbg, block, sel, false_l, true_l, mode); + env->entries[idx]->high_word = new_rd_Mux(dbg, block, sel, false_h, true_h, mode); +} /* lower_Mux */ + +/** + * Translate an ASM node. + */ +static void lower_ASM(ir_node *asmn, ir_mode *mode, lower_env_t *env) { + ir_mode *his = env->params->high_signed; + ir_mode *hiu = env->params->high_unsigned; + int i; + ir_node *n; + + (void)mode; + + for (i = get_irn_arity(asmn) - 1; i >= 0; --i) { + ir_mode *op_mode = get_irn_mode(get_irn_n(asmn, i)); + if (op_mode == his || op_mode == hiu) { + panic("lowering ASM unimplemented"); + } /* if */ + } /* for */ + + for (n = asmn;;) { + ir_mode *proj_mode; + + n = get_irn_link(n); + if (n == NULL) + break; + + proj_mode = get_irn_mode(n); + if (proj_mode == his || proj_mode == hiu) { + panic("lowering ASM unimplemented"); + } /* if */ + } /* for */ +} /* lower_ASM */ + +/** + * Translate a Sel node. + */ +static void lower_Sel(ir_node *sel, ir_mode *mode, lower_env_t *env) { + (void) mode; + + /* we must only lower value parameter Sels if we change the + value parameter type. */ + if (env->value_param_tp != NULL) { + ir_entity *ent = get_Sel_entity(sel); + if (get_entity_owner(ent) == env->value_param_tp) { + int pos = PTR_TO_INT(get_entity_link(ent)); + + ent = get_method_value_param_ent(env->l_mtp, pos); + set_Sel_entity(sel, ent); + } /* if */ + } /* if */ +} /* lower_Sel */ /** * check for opcodes that must always be lowered. */ -static int always_lower(opcode code) { +static int always_lower(ir_opcode code) { switch (code) { + case iro_ASM: + case iro_Proj: case iro_Start: case iro_Call: case iro_Return: case iro_Cond: + case iro_Conv: + case iro_Sel: return 1; default: return 0; - } -} + } /* switch */ +} /* always_lower */ + +/** + * lower boolean Proj(Cmp) + */ +static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) { + int lidx, ridx; + ir_node *l, *r, *low, *high, *t, *res; + pn_Cmp pnc; + ir_node *blk; + dbg_info *db; + + l = get_Cmp_left(cmp); + lidx = get_irn_idx(l); + if (! env->entries[lidx]->low_word) { + /* still not ready */ + return NULL; + } /* if */ + + r = get_Cmp_right(cmp); + ridx = get_irn_idx(r); + if (! env->entries[ridx]->low_word) { + /* still not ready */ + return NULL; + } /* if */ + + pnc = get_Proj_proj(proj); + blk = get_nodes_block(cmp); + db = get_irn_dbg_info(cmp); + low = new_rd_Cmp(db, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word); + high = new_rd_Cmp(db, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word); + + if (pnc == pn_Cmp_Eq) { + /* simple case:a == b <==> a_h == b_h && a_l == b_l */ + res = new_rd_And(db, blk, + new_r_Proj(blk, low, mode_b, pnc), + new_r_Proj(blk, high, mode_b, pnc), + mode_b); + } else if (pnc == pn_Cmp_Lg) { + /* simple case:a != b <==> a_h != b_h || a_l != b_l */ + res = new_rd_Or(db, blk, + new_r_Proj(blk, low, mode_b, pnc), + new_r_Proj(blk, high, mode_b, pnc), + mode_b); + } else { + /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */ + t = new_rd_And(db, blk, + new_r_Proj(blk, low, mode_b, pnc), + new_r_Proj(blk, high, mode_b, pn_Cmp_Eq), + mode_b); + res = new_rd_Or(db, blk, + new_r_Proj(blk, high, mode_b, pnc & ~pn_Cmp_Eq), + t, + mode_b); + } /* if */ + return res; +} /* lower_boolean_Proj_Cmp */ -/** The type of a lower function. */ +/** + * The type of a lower function. + * + * @param node the node to be lowered + * @param mode the low mode for the destination node + * @param env the lower environment + */ typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env); /** - * lower a node. + * Lower a node. */ static void lower_ops(ir_node *node, void *env) { lower_env_t *lenv = env; node_entry_t *entry; int idx = get_irn_idx(node); - - entry = lenv->entries[idx]; + ir_mode *mode = get_irn_mode(node); + + if (mode == mode_b || is_Mux(node) || is_Conv(node)) { + int i; + + for (i = get_irn_arity(node) - 1; i >= 0; --i) { + ir_node *proj = get_irn_n(node, i); + + if (is_Proj(proj)) { + ir_node *cmp = get_Proj_pred(proj); + + if (is_Cmp(cmp)) { + ir_node *arg = get_Cmp_left(cmp); + + mode = get_irn_mode(arg); + if (mode == lenv->params->high_signed || + mode == lenv->params->high_unsigned) { + ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv); + + if (res == NULL) { + /* could not lower because predecessors not ready */ + waitq_put(lenv->waitq, node); + return; + } /* if */ + set_irn_n(node, i, res); + } /* if */ + } /* if */ + } /* if */ + } /* for */ + } /* if */ + + entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL; if (entry || always_lower(get_irn_opcode(node))) { ir_op *op = get_irn_op(node); lower_func func = (lower_func)op->ops.generic; if (func) { - ir_mode *mode = get_irn_op_mode(node); + mode = get_irn_op_mode(node); if (mode == lenv->params->high_signed) mode = lenv->params->low_signed; @@ -2037,9 +2409,9 @@ static void lower_ops(ir_node *node, void *env) DB((dbg, LEVEL_1, " %+F\n", node)); func(node, mode, lenv); - } - } -} + } /* if */ + } /* if */ +} /* lower_ops */ #define IDENT(s) new_id_from_chars(s, sizeof(s)-1) @@ -2049,9 +2421,10 @@ static void lower_ops(ir_node *node, void *env) static int cmp_op_mode(const void *elt, const void *key, size_t size) { const op_mode_entry_t *e1 = elt; const op_mode_entry_t *e2 = key; + (void) size; return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode); -} +} /* cmp_op_mode */ /** * Compare two conv_tp_entry_t's. @@ -2059,9 +2432,44 @@ static int cmp_op_mode(const void *elt, const void *key, size_t size) { static int cmp_conv_tp(const void *elt, const void *key, size_t size) { const conv_tp_entry_t *e1 = elt; const conv_tp_entry_t *e2 = key; + (void) size; return (e1->imode - e2->imode) | (e1->omode - e2->omode); -} +} /* cmp_conv_tp */ + +/** + * Enter a lowering function into an ir_op. + */ +static void enter_lower_func(ir_op *op, lower_func func) { + op->ops.generic = (op_func)func; +} /* enter_lower_func */ + +/** + * Returns non-zero if a method type must be lowered. + * + * @param mtp the method type + */ +static int mtp_must_to_lowered(ir_type *mtp, lower_env_t *env) { + int i, n_params; + + n_params = get_method_n_params(mtp); + if (n_params <= 0) + return 0; + + /* first check if we have parameters that must be fixed */ + for (i = 0; i < n_params; ++i) { + ir_type *tp = get_method_param_type(mtp, i); + + if (is_Primitive_type(tp)) { + ir_mode *mode = get_type_mode(tp); + + if (mode == env->params->high_signed || + mode == env->params->high_unsigned) + return 1; + } /* if */ + } /* for */ + return 0; +} /* mtp_must_to_lowered */ /* * Do the lowering. @@ -2069,7 +2477,8 @@ static int cmp_conv_tp(const void *elt, const void *key, size_t size) { void lower_dw_ops(const lwrdw_param_t *param) { lower_env_t lenv; - int i; + int i; + ir_graph *rem; if (! param) return; @@ -2083,21 +2492,23 @@ void lower_dw_ops(const lwrdw_param_t *param) assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned)); assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned)); + /* create the necessary maps */ if (! prim_types) prim_types = pmap_create(); if (! intrinsic_fkt) - intrinsic_fkt = new_set(cmp_op_mode, iro_MaxOpcode); + intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1); if (! conv_types) conv_types = new_set(cmp_conv_tp, 16); if (! lowered_type) lowered_type = pmap_create(); + /* create a primitive unsigned and signed type */ if (! tp_u) tp_u = get_primitive_type(param->low_unsigned); if (! tp_s) tp_s = get_primitive_type(param->low_signed); - + /* create method types for the created binop calls */ if (! binop_tp_u) { binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2); set_method_param_type(binop_tp_u, 0, tp_u); @@ -2106,16 +2517,16 @@ void lower_dw_ops(const lwrdw_param_t *param) set_method_param_type(binop_tp_u, 3, tp_u); set_method_res_type(binop_tp_u, 0, tp_u); set_method_res_type(binop_tp_u, 1, tp_u); - } + } /* if */ if (! binop_tp_s) { binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2); - set_method_param_type(binop_tp_s, 0, tp_s); + set_method_param_type(binop_tp_s, 0, tp_u); set_method_param_type(binop_tp_s, 1, tp_s); - set_method_param_type(binop_tp_s, 2, tp_s); + set_method_param_type(binop_tp_s, 2, tp_u); set_method_param_type(binop_tp_s, 3, tp_s); - set_method_res_type(binop_tp_s, 0, tp_s); + set_method_res_type(binop_tp_s, 0, tp_u); set_method_res_type(binop_tp_s, 1, tp_s); - } + } /* if */ if (! shiftop_tp_u) { shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2); set_method_param_type(shiftop_tp_u, 0, tp_u); @@ -2123,44 +2534,47 @@ void lower_dw_ops(const lwrdw_param_t *param) set_method_param_type(shiftop_tp_u, 2, tp_u); set_method_res_type(shiftop_tp_u, 0, tp_u); set_method_res_type(shiftop_tp_u, 1, tp_u); - } + } /* if */ if (! shiftop_tp_s) { shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2); - set_method_param_type(shiftop_tp_s, 0, tp_s); + set_method_param_type(shiftop_tp_s, 0, tp_u); set_method_param_type(shiftop_tp_s, 1, tp_s); - /* beware: shift count is always mode_Iu */ set_method_param_type(shiftop_tp_s, 2, tp_u); - set_method_res_type(shiftop_tp_s, 0, tp_s); + set_method_res_type(shiftop_tp_s, 0, tp_u); set_method_res_type(shiftop_tp_s, 1, tp_s); - } + } /* if */ if (! unop_tp_u) { unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2); set_method_param_type(unop_tp_u, 0, tp_u); set_method_param_type(unop_tp_u, 1, tp_u); set_method_res_type(unop_tp_u, 0, tp_u); set_method_res_type(unop_tp_u, 1, tp_u); - } + } /* if */ if (! unop_tp_s) { unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2); - set_method_param_type(unop_tp_s, 0, tp_s); + set_method_param_type(unop_tp_s, 0, tp_u); set_method_param_type(unop_tp_s, 1, tp_s); - set_method_res_type(unop_tp_s, 0, tp_s); + set_method_res_type(unop_tp_s, 0, tp_u); set_method_res_type(unop_tp_s, 1, tp_s); - } + } /* if */ - lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), mode_Iu); - lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), mode_Iu); + lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), param->low_unsigned); + lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), param->low_unsigned); lenv.waitq = new_pdeq(); lenv.params = param; + lenv.first_id = new_id_from_chars(param->little_endian ? ".l" : ".h", 2); + lenv.next_id = new_id_from_chars(param->little_endian ? ".h" : ".l", 2); /* first clear the generic function pointer for all ops */ clear_irp_opcodes_generic_func(); -#define LOWER2(op, fkt) op_##op->ops.generic = (op_func)fkt +#define LOWER2(op, fkt) enter_lower_func(op_##op, fkt) #define LOWER(op) LOWER2(op, lower_##op) #define LOWER_BIN(op) LOWER2(op, lower_Binop) #define LOWER_UN(op) LOWER2(op, lower_Unop) + /* the table of all operations that must be lowered follows */ + LOWER(ASM); LOWER(Load); LOWER(Store); LOWER(Const); @@ -2173,6 +2587,7 @@ void lower_dw_ops(const lwrdw_param_t *param) LOWER(Call); LOWER(Unknown); LOWER(Phi); + LOWER(Mux); LOWER(Start); LOWER_BIN(Add); @@ -2181,12 +2596,13 @@ void lower_dw_ops(const lwrdw_param_t *param) LOWER(Shl); LOWER(Shr); LOWER(Shrs); - LOWER(Rot); - LOWER_UN(Minus); + LOWER(Rotl); LOWER(DivMod); LOWER(Div); LOWER(Mod); + LOWER(Sel); LOWER_UN(Abs); + LOWER_UN(Minus); LOWER(Conv); @@ -2196,21 +2612,40 @@ void lower_dw_ops(const lwrdw_param_t *param) #undef LOWER2 /* transform all graphs */ + rem = current_ir_graph; for (i = get_irp_n_irgs() - 1; i >= 0; --i) { - ir_graph *irg = get_irp_irg(i); + ir_graph *irg = get_irp_irg(i); + ir_entity *ent; + ir_type *mtp; int n_idx; obstack_init(&lenv.obst); n_idx = get_irg_last_idx(irg); + n_idx = n_idx + (n_idx >> 2); /* add 25% */ lenv.n_entries = n_idx; - lenv.entries = xmalloc(n_idx * sizeof(lenv.entries[0])); + lenv.entries = NEW_ARR_F(node_entry_t *, n_idx); memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0])); - /* first step: link all nodes and allocate data */ - lenv.flags = 0; + lenv.l_mtp = NULL; + lenv.flags = 0; lenv.proj_2_block = pmap_create(); - irg_walk_graph(irg, firm_clear_link, prepare_links, &lenv); + lenv.value_param_tp = NULL; + ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK); + + ent = get_irg_entity(irg); + mtp = get_entity_type(ent); + + if (mtp_must_to_lowered(mtp, &lenv)) { + ir_type *ltp = lower_mtp(mtp, &lenv); + lenv.flags |= MUST_BE_LOWERED; + set_entity_type(ent, ltp); + lenv.l_mtp = ltp; + lenv.value_param_tp = get_method_value_param_type(mtp); + } /* if */ + + /* first step: link all nodes and allocate data */ + irg_walk_graph(irg, firm_clear_node_and_phi_links, prepare_links_and_handle_rotl, &lenv); if (lenv.flags & MUST_BE_LOWERED) { DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg)); @@ -2220,11 +2655,14 @@ void lower_dw_ops(const lwrdw_param_t *param) /* last step: all waiting nodes */ DB((dbg, LEVEL_1, "finishing waiting nodes:\n")); + current_ir_graph = irg; while (! pdeq_empty(lenv.waitq)) { ir_node *node = pdeq_getl(lenv.waitq); lower_ops(node, &lenv); - } + } /* while */ + + ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK); /* outs are invalid, we changed the graph */ set_irg_outs_inconsistent(irg); @@ -2234,35 +2672,63 @@ void lower_dw_ops(const lwrdw_param_t *param) set_irg_doms_inconsistent(irg); set_irg_extblk_inconsistent(irg); set_irg_loopinfo_inconsistent(irg); - } - - dump_ir_block_graph(irg, "-dw"); - } + } /* if */ + } else { + ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK); + } /* if */ pmap_destroy(lenv.proj_2_block); - free(lenv.entries); + DEL_ARR_F(lenv.entries); obstack_free(&lenv.obst, NULL); - } + } /* for */ del_pdeq(lenv.waitq); + current_ir_graph = rem; +} /* lower_dw_ops */ + +struct pass_t { + ir_prog_pass_t pass; + const lwrdw_param_t *param; +}; + +/** + * Creates a wrapper around lower_dw_ops(). + */ +static int pass_wrapper(ir_prog *irp, void *context) +{ + struct pass_t *pass = context; + + (void)irp; + lower_dw_ops(pass->param); + return 0; } +ir_prog_pass_t *lower_dw_ops_pass(const char *name, const lwrdw_param_t *param) { + struct pass_t *pass = XMALLOCZ(struct pass_t); + + pass->param = param; + return def_prog_pass_constructor( + &pass->pass, name ? name : "lower_dw", pass_wrapper); +} /* lower_dw_ops_pass */ + /* Default implementation. */ -entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op, - const ir_mode *imode, const ir_mode *omode, - void *context) +ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op, + const ir_mode *imode, const ir_mode *omode, + void *context) { char buf[64]; ident *id; - entity *ent; + ir_entity *ent; + (void) context; - if (imode == omode) + if (imode == omode) { snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode)); - else + } else { snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op), get_mode_name(imode), get_mode_name(omode)); + } /* if */ id = new_id_from_str(buf); ent = new_entity(get_glob_type(), id, method); set_entity_ld_ident(ent, get_entity_ident(ent)); set_entity_visibility(ent, visibility_external_allocated); return ent; -} +} /* def_create_intrinsic_fkt */