X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fir%2Firvrfy.c;h=d43c915b930fc337718bf7f1d73eb8d30a47b474;hb=26baaebd4406b34b8b04ef441d4e45e23c10a747;hp=455df1d3fbebc0eda533e2b34fc16124b9cd73b7;hpb=ba9d36842d1c99fa82303c6a3670255677652660;p=libfirm

diff --git a/ir/ir/irvrfy.c b/ir/ir/irvrfy.c
index 455df1d3f..d43c915b9 100644
--- a/ir/ir/irvrfy.c
+++ b/ir/ir/irvrfy.c
@@ -868,18 +868,23 @@ static int verify_node_Block(ir_node *n, ir_graph *irg) {
 
 		/* Blocks with more than one predecessor must be header blocks */
 		ASSERT_AND_RET(get_Block_n_cfgpreds(n) == 1, "partBlock with more than one predecessor", 0);
-		pred = get_Block_cfgpred(n, 0);
-		if (is_Proj(pred)) {
-			/* the predecessor MUST be a regular Proj */
-			ir_node *frag_op = get_Proj_pred(pred);
-			ASSERT_AND_RET(is_fragile_op(frag_op) && get_Proj_proj(pred) == pn_Generic_X_regular,
-				"partBlock with non-regular predecessor", 0);
+		if (get_irg_phase_state(irg) != phase_backend) {
+			pred = get_Block_cfgpred(n, 0);
+			if (is_Proj(pred)) {
+				/* the predecessor MUST be a regular Proj */
+				ir_node *frag_op = get_Proj_pred(pred);
+				ASSERT_AND_RET(
+					is_fragile_op(frag_op) && get_Proj_proj(pred) == pn_Generic_X_regular,
+					"partBlock with non-regular predecessor", 0);
+			} else {
+				/* We allow Jmps to be predecessors of partBlocks. This can happen due to optimization
+				   of fragile nodes during construction. It does not violate our assumption of dominance
+				   so let it. */
+				ASSERT_AND_RET(is_Jmp(pred) || is_Bad(pred),
+					"partBlock with non-regular predecessor", 0);
+			}
 		} else {
-			/* We allow Jmps to be predecessors of partBlocks. This can happen due to optimization
-			   of fragile nodes during construction. It does not violate our assumption of dominance
-			   so let it. */
-			ASSERT_AND_RET(is_Jmp(pred) || is_Bad(pred),
-				"partBlock with non-regular predecessor", 0);
+			/* relax in backend: Bound nodes are probably lowered into conditional jumps */
 		}
 	}
 
@@ -1538,21 +1543,21 @@ static int verify_node_Shift(ir_node *n, ir_graph *irg) {
 #define verify_node_Shrs  verify_node_Shift
 
 /**
- * verify a Rot node
+ * verify a Rotl node
  */
-static int verify_node_Rot(ir_node *n, ir_graph *irg) {
+static int verify_node_Rotl(ir_node *n, ir_graph *irg) {
 	ir_mode *mymode  = get_irn_mode(n);
-	ir_mode *op1mode = get_irn_mode(get_Rot_left(n));
-	ir_mode *op2mode = get_irn_mode(get_Rot_right(n));
+	ir_mode *op1mode = get_irn_mode(get_Rotl_left(n));
+	ir_mode *op2mode = get_irn_mode(get_Rotl_right(n));
 	(void) irg;
 
 	ASSERT_AND_RET_DBG(
-		/* Rot: BB x int x int --> int */
+		/* Rotl: BB x int x int --> int */
 		mode_is_int(op1mode) &&
 		mode_is_int(op2mode) &&
 		mymode == op1mode,
-		"Rot node", 0,
-		show_binop_failure(n, "/* Rot: BB x int x int --> int */");
+		"Rotl node", 0,
+		show_binop_failure(n, "/* Rotl: BB x int x int --> int */");
 	);
 	return 1;
 }
@@ -2250,7 +2255,7 @@ void firm_set_default_verifyer(ir_opcode code, ir_op_ops *ops) {
 	CASE(Shl);
 	CASE(Shr);
 	CASE(Shrs);
-	CASE(Rot);
+	CASE(Rotl);
 	CASE(Conv);
 	CASE(Cast);
 	CASE(Phi);