X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fir%2Firvrfy.c;h=6c6b370190e8189916dc109ed5243743ac910832;hb=9baadfac02ee53ae9a7caa7593225a49ccd54753;hp=e5982cd50204e77e1358e751f9a8bf62e78c25cb;hpb=f2d236f4fac425604e8552790432332ff216c065;p=libfirm diff --git a/ir/ir/irvrfy.c b/ir/ir/irvrfy.c index e5982cd50..6c6b37019 100644 --- a/ir/ir/irvrfy.c +++ b/ir/ir/irvrfy.c @@ -23,9 +23,7 @@ * @author Christian Schaefer, Goetz Lindenmaier, Till Riedel, Michael Beck * @version $Id$ */ -#ifdef HAVE_CONFIG_H -# include "config.h" -#endif +#include "config.h" #include "irprog.h" #include "irop_t.h" @@ -60,11 +58,13 @@ static const char *get_mode_name_ex(ir_mode *mode) { return get_mode_name(mode); } -/** the last IRG, on which a verify error was found */ +/** the last IRG, on which a verification error was found */ static ir_graph *last_irg_error = NULL; /** * print the name of the entity of an verification failure + * + * @param node the node caused the failure */ static void show_entity_failure(ir_node *node) { ir_graph *irg = get_irn_irg(node); @@ -283,7 +283,7 @@ static void show_phi_inputs(ir_node *phi, ir_node *block) { * @param ptr the node representing the address */ static ir_entity *get_ptr_entity(ir_node *ptr) { - if (get_irn_op(ptr) == op_Sel) { + if (is_Sel(ptr)) { return get_Sel_entity(ptr); } else if (is_SymConst_addr_ent(ptr)) { return get_SymConst_entity(ptr); @@ -394,15 +394,15 @@ static int verify_node_Proj_Call(ir_node *n, ir_node *p) { /* if we have exception flow, we must have a real Memory input */ if (proj == pn_Call_X_regular) ASSERT_AND_RET( - get_irn_op(get_Call_mem(n)) != op_NoMem, + !is_NoMem(get_Call_mem(n)), "Regular Proj from FunctionCall", 0); else if (proj == pn_Call_X_except) ASSERT_AND_RET( - get_irn_op(get_Call_mem(n)) != op_NoMem, + !is_NoMem(get_Call_mem(n)), "Exception Proj from FunctionCall", 0); else if (proj == pn_Call_M_regular || proj == pn_Call_M_except) ASSERT_AND_RET( - (get_irn_op(get_Call_mem(n)) != op_NoMem || 1), + (!is_NoMem(get_Call_mem(n)) || 1), "Memory Proj from FunctionCall", 0); return 1; } @@ -868,18 +868,23 @@ static int verify_node_Block(ir_node *n, ir_graph *irg) { /* Blocks with more than one predecessor must be header blocks */ ASSERT_AND_RET(get_Block_n_cfgpreds(n) == 1, "partBlock with more than one predecessor", 0); - pred = get_Block_cfgpred(n, 0); - if (is_Proj(pred)) { - /* the predecessor MUST be a regular Proj */ - ir_node *frag_op = get_Proj_pred(pred); - ASSERT_AND_RET(is_fragile_op(frag_op) && get_Proj_proj(pred) == pn_Generic_X_regular, - "partBlock with non-regular predecessor", 0); + if (get_irg_phase_state(irg) != phase_backend) { + pred = get_Block_cfgpred(n, 0); + if (is_Proj(pred)) { + /* the predecessor MUST be a regular Proj */ + ir_node *frag_op = get_Proj_pred(pred); + ASSERT_AND_RET( + is_fragile_op(frag_op) && get_Proj_proj(pred) == pn_Generic_X_regular, + "partBlock with non-regular predecessor", 0); + } else { + /* We allow Jmps to be predecessors of partBlocks. This can happen due to optimization + of fragile nodes during construction. It does not violate our assumption of dominance + so let it. */ + ASSERT_AND_RET(is_Jmp(pred) || is_Bad(pred), + "partBlock with non-regular predecessor", 0); + } } else { - /* We allow Jmps to be predecessors of partBlocks. This can happen due to optimization - of fragile nodes during construction. It does not violate our assumption of dominance - so let it. */ - ASSERT_AND_RET(is_Jmp(pred) || is_Bad(pred), - "partBlock with non-regular predecessor", 0); + /* relax in backend: Bound nodes are probably lowered into conditional jumps */ } } @@ -1274,15 +1279,12 @@ static int verify_node_Sub(ir_node *n, ir_graph *irg) { (mymode ==op1mode && mymode == op2mode && mode_is_data(op1mode)) || /* Pointer Sub: BB x ref x int --> ref */ (op1mode == mymode && mode_is_int(op2mode) && mode_is_reference(mymode)) || - /* Pointer Sub: BB x int x ref --> ref */ - (mode_is_int(op1mode) && op2mode == mymode && mode_is_reference(mymode)) || /* Pointer Sub: BB x ref x ref --> int */ (op1mode == op2mode && mode_is_reference(op2mode) && mode_is_int(mymode)) ), "Sub node", 0, show_binop_failure(n, "/* common Sub: BB x numP x numP --> numP */ |\n" "/* Pointer Sub: BB x ref x int --> ref */ |\n" - "/* Pointer Sub: BB x int x ref --> ref */ |\n" "/* Pointer Sub: BB x ref x ref --> int */" ); ); return 1; @@ -1610,9 +1612,9 @@ static int verify_node_Phi(ir_node *n, ir_graph *irg) { } /* Phi: BB x dataM^n --> dataM */ - for (i = get_irn_arity(n) - 1; i >= 0; --i) { - ir_node *pred = get_irn_n(n, i); - if (!is_Bad(pred) && (get_irn_op(pred) != op_Unknown)) { + for (i = get_Phi_n_preds(n) - 1; i >= 0; --i) { + ir_node *pred = get_Phi_pred(n, i); + if (!is_Bad(pred)) { ASSERT_AND_RET_DBG( get_irn_mode(pred) == mymode, "Phi node", 0, @@ -1675,9 +1677,6 @@ static int verify_node_Load(ir_node *n, ir_graph *irg) { ASSERT_AND_RET(op1mode == mode_M, "Load node", 0); if (get_irg_phase_state(irg) != phase_backend) { ASSERT_AND_RET(mode_is_reference(op2mode), "Load node", 0 ); - } else { - ASSERT_AND_RET(mode_is_reference(op2mode) || - (mode_is_int(op2mode) && get_mode_size_bits(op2mode) == get_mode_size_bits(mode_P)), "Load node", 0 ); } ASSERT_AND_RET( mymode == mode_T, "Load node", 0 ); @@ -1713,9 +1712,6 @@ static int verify_node_Store(ir_node *n, ir_graph *irg) { ASSERT_AND_RET(op1mode == mode_M && mode_is_datab(op3mode), "Store node", 0 ); if (get_irg_phase_state(irg) != phase_backend) { ASSERT_AND_RET(mode_is_reference(op2mode), "Store node", 0 ); - } else { - ASSERT_AND_RET(mode_is_reference(op2mode) || - (mode_is_int(op2mode) && get_mode_size_bits(op2mode) == get_mode_size_bits(mode_P)), "Store node", 0 ); } ASSERT_AND_RET(mymode == mode_T, "Store node", 0); @@ -1822,11 +1818,11 @@ static int verify_node_Mux(ir_node *n, ir_graph *irg) { (void) irg; ASSERT_AND_RET( - /* Mux: BB x b x numP x numP --> numP */ + /* Mux: BB x b x datab x datab --> datab */ op1mode == mode_b && op2mode == mymode && op3mode == mymode && - mode_is_data(mymode), + mode_is_datab(mymode), "Mux node", 0 ); return 1; @@ -1847,11 +1843,6 @@ static int verify_node_CopyB(ir_node *n, ir_graph *irg) { if (get_irg_phase_state(irg) != phase_backend) { ASSERT_AND_RET(mode_is_reference(op2mode) && mode_is_reference(op3mode), "CopyB node", 0 ); - } else { - ASSERT_AND_RET(mode_is_reference(op2mode) || - (mode_is_int(op2mode) && get_mode_size_bits(op2mode) == get_mode_size_bits(mode_P)), "CopyB node", 0 ); - ASSERT_AND_RET(mode_is_reference(op3mode) || - (mode_is_int(op3mode) && get_mode_size_bits(op3mode) == get_mode_size_bits(mode_P)), "CopyB node", 0 ); } ASSERT_AND_RET( @@ -2143,7 +2134,7 @@ static void check_bads(ir_node *node, void *env) { } if ((venv->flags & TUPLE) == 0) { - if (get_irn_op(node) == op_Tuple) { + if (is_Tuple(node)) { venv->res |= TUPLE; if (get_node_verification_mode() == FIRM_VERIFICATION_REPORT) {