X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fir%2Firvrfy.c;h=57d5a283a8f666be394ca805e73418031f67b908;hb=31ef53136fdb86d4a98919c2148c95cadea4ea81;hp=034ff42631e5bff3b614183a9cf18380ca25536a;hpb=9c6ef39a9a1f9401eb46b5b577f109f704fa92b9;p=libfirm diff --git a/ir/ir/irvrfy.c b/ir/ir/irvrfy.c index 034ff4263..57d5a283a 100644 --- a/ir/ir/irvrfy.c +++ b/ir/ir/irvrfy.c @@ -283,7 +283,7 @@ static void show_phi_inputs(ir_node *phi, ir_node *block) { * @param ptr the node representing the address */ static ir_entity *get_ptr_entity(ir_node *ptr) { - if (get_irn_op(ptr) == op_Sel) { + if (is_Sel(ptr)) { return get_Sel_entity(ptr); } else if (is_SymConst_addr_ent(ptr)) { return get_SymConst_entity(ptr); @@ -394,15 +394,15 @@ static int verify_node_Proj_Call(ir_node *n, ir_node *p) { /* if we have exception flow, we must have a real Memory input */ if (proj == pn_Call_X_regular) ASSERT_AND_RET( - get_irn_op(get_Call_mem(n)) != op_NoMem, + !is_NoMem(get_Call_mem(n)), "Regular Proj from FunctionCall", 0); else if (proj == pn_Call_X_except) ASSERT_AND_RET( - get_irn_op(get_Call_mem(n)) != op_NoMem, + !is_NoMem(get_Call_mem(n)), "Exception Proj from FunctionCall", 0); else if (proj == pn_Call_M_regular || proj == pn_Call_M_except) ASSERT_AND_RET( - (get_irn_op(get_Call_mem(n)) != op_NoMem || 1), + (!is_NoMem(get_Call_mem(n)) || 1), "Memory Proj from FunctionCall", 0); return 1; } @@ -868,18 +868,23 @@ static int verify_node_Block(ir_node *n, ir_graph *irg) { /* Blocks with more than one predecessor must be header blocks */ ASSERT_AND_RET(get_Block_n_cfgpreds(n) == 1, "partBlock with more than one predecessor", 0); - pred = get_Block_cfgpred(n, 0); - if (is_Proj(pred)) { - /* the predecessor MUST be a regular Proj */ - ir_node *frag_op = get_Proj_pred(pred); - ASSERT_AND_RET(is_fragile_op(frag_op) && get_Proj_proj(pred) == pn_Generic_X_regular, - "partBlock with non-regular predecessor", 0); + if (get_irg_phase_state(irg) != phase_backend) { + pred = get_Block_cfgpred(n, 0); + if (is_Proj(pred)) { + /* the predecessor MUST be a regular Proj */ + ir_node *frag_op = get_Proj_pred(pred); + ASSERT_AND_RET( + is_fragile_op(frag_op) && get_Proj_proj(pred) == pn_Generic_X_regular, + "partBlock with non-regular predecessor", 0); + } else { + /* We allow Jmps to be predecessors of partBlocks. This can happen due to optimization + of fragile nodes during construction. It does not violate our assumption of dominance + so let it. */ + ASSERT_AND_RET(is_Jmp(pred) || is_Bad(pred), + "partBlock with non-regular predecessor", 0); + } } else { - /* We allow Jmps to be predecessors of partBlocks. This can happen due to optimization - of fragile nodes during construction. It does not violate our assumption of dominance - so let it. */ - ASSERT_AND_RET(is_Jmp(pred) || is_Bad(pred), - "partBlock with non-regular predecessor", 0); + /* relax in backend: Bound nodes are probably lowered into conditional jumps */ } } @@ -1274,15 +1279,12 @@ static int verify_node_Sub(ir_node *n, ir_graph *irg) { (mymode ==op1mode && mymode == op2mode && mode_is_data(op1mode)) || /* Pointer Sub: BB x ref x int --> ref */ (op1mode == mymode && mode_is_int(op2mode) && mode_is_reference(mymode)) || - /* Pointer Sub: BB x int x ref --> ref */ - (mode_is_int(op1mode) && op2mode == mymode && mode_is_reference(mymode)) || /* Pointer Sub: BB x ref x ref --> int */ (op1mode == op2mode && mode_is_reference(op2mode) && mode_is_int(mymode)) ), "Sub node", 0, show_binop_failure(n, "/* common Sub: BB x numP x numP --> numP */ |\n" "/* Pointer Sub: BB x ref x int --> ref */ |\n" - "/* Pointer Sub: BB x int x ref --> ref */ |\n" "/* Pointer Sub: BB x ref x ref --> int */" ); ); return 1; @@ -1538,21 +1540,21 @@ static int verify_node_Shift(ir_node *n, ir_graph *irg) { #define verify_node_Shrs verify_node_Shift /** - * verify a Rot node + * verify a Rotl node */ -static int verify_node_Rot(ir_node *n, ir_graph *irg) { +static int verify_node_Rotl(ir_node *n, ir_graph *irg) { ir_mode *mymode = get_irn_mode(n); - ir_mode *op1mode = get_irn_mode(get_Rot_left(n)); - ir_mode *op2mode = get_irn_mode(get_Rot_right(n)); + ir_mode *op1mode = get_irn_mode(get_Rotl_left(n)); + ir_mode *op2mode = get_irn_mode(get_Rotl_right(n)); (void) irg; ASSERT_AND_RET_DBG( - /* Rot: BB x int x int --> int */ + /* Rotl: BB x int x int --> int */ mode_is_int(op1mode) && mode_is_int(op2mode) && mymode == op1mode, - "Rot node", 0, - show_binop_failure(n, "/* Rot: BB x int x int --> int */"); + "Rotl node", 0, + show_binop_failure(n, "/* Rotl: BB x int x int --> int */"); ); return 1; } @@ -1612,7 +1614,7 @@ static int verify_node_Phi(ir_node *n, ir_graph *irg) { /* Phi: BB x dataM^n --> dataM */ for (i = get_irn_arity(n) - 1; i >= 0; --i) { ir_node *pred = get_irn_n(n, i); - if (!is_Bad(pred) && (get_irn_op(pred) != op_Unknown)) { + if (!is_Bad(pred) && !is_Unknown(pred)) { ASSERT_AND_RET_DBG( get_irn_mode(pred) == mymode, "Phi node", 0, @@ -1749,7 +1751,7 @@ static int verify_node_Alloc(ir_node *n, ir_graph *irg) { !mode_is_signed(op2mode) && mymode == mode_T, "Alloc node", 0, - show_binop_failure(n, "/* Alloc: BB x M x int_u --> M x X x ref */"); + show_node_failure(n); ); return 1; } @@ -1822,11 +1824,11 @@ static int verify_node_Mux(ir_node *n, ir_graph *irg) { (void) irg; ASSERT_AND_RET( - /* Mux: BB x b x numP x numP --> numP */ + /* Mux: BB x b x datab x datab --> datab */ op1mode == mode_b && op2mode == mymode && op3mode == mymode && - mode_is_data(mymode), + mode_is_datab(mymode), "Mux node", 0 ); return 1; @@ -2143,7 +2145,7 @@ static void check_bads(ir_node *node, void *env) { } if ((venv->flags & TUPLE) == 0) { - if (get_irn_op(node) == op_Tuple) { + if (is_Tuple(node)) { venv->res |= TUPLE; if (get_node_verification_mode() == FIRM_VERIFICATION_REPORT) { @@ -2250,7 +2252,7 @@ void firm_set_default_verifyer(ir_opcode code, ir_op_ops *ops) { CASE(Shl); CASE(Shr); CASE(Shrs); - CASE(Rot); + CASE(Rotl); CASE(Conv); CASE(Cast); CASE(Phi);