X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fir%2Firvrfy.c;h=034ff42631e5bff3b614183a9cf18380ca25536a;hb=672b5c243e900427b5dcae01441d4fa3327d692c;hp=e6cc6321c566693dd706aefab9976481b60b6684;hpb=7790404a56951fe20ab78b11ab6d1a3f6942bfb8;p=libfirm

diff --git a/ir/ir/irvrfy.c b/ir/ir/irvrfy.c
index e6cc6321c..034ff4263 100644
--- a/ir/ir/irvrfy.c
+++ b/ir/ir/irvrfy.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 1995-2007 University of Karlsruhe.  All right reserved.
+ * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
  *
  * This file is part of libFirm.
  *
@@ -277,11 +277,15 @@ static void show_phi_inputs(ir_node *phi, ir_node *block) {
 
 #endif /* #ifndef NDEBUG */
 
-/** If the address is Sel or SymConst, return the entity. */
+/**
+ * If the address is Sel or SymConst, return the entity.
+ *
+ * @param ptr  the node representing the address
+ */
 static ir_entity *get_ptr_entity(ir_node *ptr) {
 	if (get_irn_op(ptr) == op_Sel) {
 		return get_Sel_entity(ptr);
-	} else if ((get_irn_op(ptr) == op_SymConst) && (get_SymConst_kind(ptr) == symconst_addr_ent)) {
+	} else if (is_SymConst_addr_ent(ptr)) {
 		return get_SymConst_entity(ptr);
 	}
 	return NULL;
@@ -300,7 +304,6 @@ static int verify_node_Proj_Start(ir_node *n, ir_node *p) {
 			(proj == pn_Start_X_initial_exec && mode == mode_X) ||
 			(proj == pn_Start_M         && mode == mode_M) ||
 			(proj == pn_Start_P_frame_base && mode_is_reference(mode)) ||
-			(proj == pn_Start_P_globals && mode_is_reference(mode)) ||
 			(proj == pn_Start_P_tls     && mode_is_reference(mode)) ||
 			(proj == pn_Start_T_args    && mode == mode_T) ||
 			(proj == pn_Start_P_value_arg_base && mode_is_reference(mode)) ||
@@ -388,6 +391,7 @@ static int verify_node_Proj_Call(ir_node *n, ir_node *p) {
 		"wrong Proj from Call", 0,
 		show_proj_failure(p);
 	);
+	/* if we have exception flow, we must have a real Memory input */
 	if (proj == pn_Call_X_regular)
 		ASSERT_AND_RET(
 			get_irn_op(get_Call_mem(n)) != op_NoMem,
@@ -860,23 +864,34 @@ static int verify_node_Block(ir_node *n, ir_graph *irg) {
 	ASSERT_AND_RET(is_Block(mb) || is_Bad(mb), "Block node with wrong MacroBlock", 0);
 
 	if (is_Block(mb) && mb != n) {
+		ir_node *pred;
+
 		/* Blocks with more than one predecessor must be header blocks */
 		ASSERT_AND_RET(get_Block_n_cfgpreds(n) == 1, "partBlock with more than one predecessor", 0);
+		pred = get_Block_cfgpred(n, 0);
+		if (is_Proj(pred)) {
+			/* the predecessor MUST be a regular Proj */
+			ir_node *frag_op = get_Proj_pred(pred);
+			ASSERT_AND_RET(is_fragile_op(frag_op) && get_Proj_proj(pred) == pn_Generic_X_regular,
+				"partBlock with non-regular predecessor", 0);
+		} else {
+			/* We allow Jmps to be predecessors of partBlocks. This can happen due to optimization
+			   of fragile nodes during construction. It does not violate our assumption of dominance
+			   so let it. */
+			ASSERT_AND_RET(is_Jmp(pred) || is_Bad(pred),
+				"partBlock with non-regular predecessor", 0);
+		}
 	}
 
 	for (i = get_Block_n_cfgpreds(n) - 1; i >= 0; --i) {
 		ir_node *pred =  get_Block_cfgpred(n, i);
 		ASSERT_AND_RET(
-			(
-				is_Bad(pred)     ||
-				is_Unknown(pred) ||
-				(get_irn_mode(pred) == mode_X)
-			),
-			"Block node", 0);
+			is_Bad(pred) ||	(get_irn_mode(pred) == mode_X),
+			"Block node must have a mode_X predecessor", 0);
 	}
 
 	if (n == get_irg_end_block(irg) && get_irg_phase_state(irg) != phase_backend)
-		/*  End block may only have Return, Raise or fragile ops as preds. */
+		/* End block may only have Return, Raise or fragile ops as preds. */
 		for (i = get_Block_n_cfgpreds(n) - 1; i >= 0; --i) {
 			ir_node *pred =  skip_Proj(get_Block_cfgpred(n, i));
 			if (is_Proj(pred) || is_Tuple(pred))
@@ -2026,7 +2041,10 @@ int irg_verify(ir_graph *irg, unsigned flags) {
 
 	rem = current_ir_graph;
 	current_ir_graph = irg;
-	last_irg_error = NULL;
+
+#ifndef NDEBUG
+    last_irg_error = NULL;
+#endif /* NDEBUG */
 
 	assert(get_irg_pinned(irg) == op_pin_state_pinned && "Verification need pinned graph");