X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fir%2Firverify.c;h=4f6001acb2119b4ae93e96a3dc47da759cf25c04;hb=25313dd42cf428b81b32ca83296ef3dfac9702b7;hp=70b96f65f6f2c5e75d8cba9fda8810de46fac63c;hpb=3be74f06d986d871e3b6e76cf34f9443ab052740;p=libfirm diff --git a/ir/ir/irverify.c b/ir/ir/irverify.c index 70b96f65f..4f6001acb 100644 --- a/ir/ir/irverify.c +++ b/ir/ir/irverify.c @@ -1,30 +1,16 @@ /* - * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved. - * * This file is part of libFirm. - * - * This file may be distributed and/or modified under the terms of the - * GNU General Public License version 2 as published by the Free Software - * Foundation and appearing in the file LICENSE.GPL included in the - * packaging of this file. - * - * Licensees holding valid libFirm Professional Edition licenses may use - * this file in accordance with the libFirm Commercial License. - * Agreement provided with the Software. - * - * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE - * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE. + * Copyright (C) 2012 University of Karlsruhe. */ /** * @file * @brief Check irnodes for correctness. * @author Christian Schaefer, Goetz Lindenmaier, Till Riedel, Michael Beck - * @version $Id$ */ #include "config.h" +#include "irnode_t.h" #include "irprog.h" #include "irop_t.h" #include "irgraph_t.h" @@ -37,18 +23,10 @@ #include "irflag_t.h" #include "irpass_t.h" #include "irnodeset.h" - -/** if this flag is set, verify entity types in Load & Store nodes */ -static int verify_entities = 0; +#include "ircons.h" const char *firm_verify_failure_msg; -/* enable verification of Load/Store entities */ -void verify_enable_entity_tests(int enable) -{ - verify_entities = enable; -} - #ifndef NDEBUG /** @@ -85,13 +63,7 @@ static void show_entity_failure(const ir_node *node) if (ent) { ir_type *ent_type = get_entity_owner(ent); - - if (ent_type) { - ir_fprintf(stderr, "\nFIRM: irn_verify_irg() %+F::%s failed\n", - ent_type, get_entity_name(ent)); - } else { - fprintf(stderr, "\nFIRM: irn_verify_irg() ::%s failed\n", get_entity_name(ent)); - } + ir_fprintf(stderr, "\nFIRM: irn_verify_irg() %+F::%s failed\n", ent_type, get_entity_name(ent)); } else { fprintf(stderr, "\nFIRM: irn_verify_irg() failed\n", (void *)irg); } @@ -201,26 +173,6 @@ static void show_proj_mode_failure(const ir_node *n, ir_type *ty) get_mode_name_ex(m)); } -/** - * Prints a failure message for a proj - */ -static void show_proj_failure_ent(const ir_node *n, ir_entity *ent) -{ - ir_node *op = get_Proj_pred(n); - int proj = get_Proj_proj(n); - ir_mode *m = get_type_mode(get_entity_type(ent)); - char type_name[256]; - ir_print_type(type_name, sizeof(type_name), get_entity_type(ent)); - - show_entity_failure(n); - fprintf(stderr, " node %ld %s%s %d(%s%s) entity %s(type %s mode %s)failed\n" , - get_irn_node_nr(n), - get_irn_opname(n), get_irn_modename(n), proj, - get_irn_opname(op), get_irn_modename(op), - get_entity_name(ent), type_name, - get_mode_name_ex(m)); -} - /** * Show a node and a graph */ @@ -234,18 +186,19 @@ static void show_node_on_graph(const ir_graph *irg, const ir_node *n) */ static void show_call_param(const ir_node *n, ir_type *mt) { - size_t i; char type_name[256]; ir_print_type(type_name, sizeof(type_name), mt); show_entity_failure(n); fprintf(stderr, " Call type-check failed: %s(", type_name); - for (i = 0; i < get_method_n_params(mt); ++i) { + size_t n_method_params = get_method_n_params(mt); + for (size_t i = 0; i < n_method_params; ++i) { fprintf(stderr, "%s ", get_mode_name_ex(get_type_mode(get_method_param_type(mt, i)))); } fprintf(stderr, ") != CALL("); - for (i = 0; i < get_Call_n_params(n); ++i) { + int n_params = get_Call_n_params(n); + for (int i = 0; i < n_params; ++i) { fprintf(stderr, "%s ", get_mode_name_ex(get_irn_mode(get_Call_param(n, i)))); } fprintf(stderr, ")\n"); @@ -306,21 +259,6 @@ static void show_phi_inputs(const ir_node *phi, const ir_node *block) #endif /* #ifndef NDEBUG */ -/** - * If the address is Sel or SymConst, return the entity. - * - * @param ptr the node representing the address - */ -static ir_entity *get_ptr_entity(const ir_node *ptr) -{ - if (is_Sel(ptr)) { - return get_Sel_entity(ptr); - } else if (is_SymConst_addr_ent(ptr)) { - return get_SymConst_entity(ptr); - } - return NULL; -} - /** * verify a Proj(Start) node */ @@ -348,20 +286,29 @@ static int verify_node_Proj_Start(const ir_node *p) static int verify_node_Proj_Cond(const ir_node *p) { ir_mode *mode = get_irn_mode(p); - ir_node *pred = get_Proj_pred(p); - long proj = get_Proj_proj(p); + long proj = get_Proj_proj(p); ASSERT_AND_RET_DBG( - ( - (proj >= 0 && mode == mode_X && get_irn_mode(get_Cond_selector(pred)) == mode_b) || /* compare */ - (mode == mode_X && mode_is_int(get_irn_mode(get_Cond_selector(pred)))) /* switch */ - ), + mode == mode_X && (proj == pn_Cond_false || proj == pn_Cond_true), "wrong Proj from Cond", 0, show_proj_failure(p); ); return 1; } +static int verify_node_Proj_Switch(const ir_node *p) +{ + ir_mode *mode = get_irn_mode(p); + long pn = get_Proj_proj(p); + ir_node *pred = get_Proj_pred(p); + ASSERT_AND_RET_DBG( + mode == mode_X && (pn >= 0 && pn < (long)get_Switch_n_outs(pred)), + "wrong Proj from Switch", 0, + show_proj_failure(p); + ); + return 1; +} + /** * verify a Proj(Raise) node */ @@ -444,7 +391,7 @@ static int verify_node_Proj_Div(const ir_node *p) (proj == pn_Div_M && mode == mode_M) || (proj == pn_Div_X_regular && mode == mode_X) || (proj == pn_Div_X_except && mode == mode_X) || - (proj == pn_Div_res && mode_is_data(mode) && mode == get_Div_resmode(n)) + (proj == pn_Div_res && mode == get_Div_resmode(n)) ), "wrong Proj from Div", 0, show_proj_failure(p); @@ -508,27 +455,12 @@ static int verify_node_Proj_Load(const ir_node *p) long proj = get_Proj_proj(p); if (proj == pn_Load_res) { - ir_node *ptr = get_Load_ptr(n); - ir_entity *ent = get_ptr_entity(ptr); - ir_graph *irg = get_irn_irg(n); - - if (verify_entities && ent && get_irg_phase_state(irg) == phase_high) { - /* do NOT check this for lowered phases, see comment on Store */ - ASSERT_AND_RET_DBG( - (mode == get_type_mode(get_entity_type(ent))), - "wrong data Proj from Load, entity type_mode failed", 0, - show_proj_failure_ent(p, ent); - ); - } - else { - ASSERT_AND_RET_DBG( - mode_is_data(mode) && mode == get_Load_mode(n), - "wrong data Proj from Load", 0, - show_proj_failure(p); - ); - } - } - else { + ASSERT_AND_RET_DBG( + mode_is_data(mode) && mode == get_Load_mode(n), + "wrong data Proj from Load", 0, + show_proj_failure(p); + ); + } else { ASSERT_AND_RET_DBG( ( (proj == pn_Load_M && mode == mode_M) || @@ -607,18 +539,16 @@ static int verify_node_Proj_Alloc(const ir_node *p) */ static int verify_node_Proj_Proj(const ir_node *p) { - ir_mode *mode = get_irn_mode(p); - ir_node *pred = get_Proj_pred(p); - long proj = get_Proj_proj(p); - long nr = get_Proj_proj(pred); - ir_type *mt; /* A method type */ - - pred = skip_Id(get_Proj_pred(pred)); - ASSERT_AND_RET((get_irn_mode(pred) == mode_T), "Proj from something not a tuple", 0); + ir_mode *mode = get_irn_mode(p); + ir_node *pred = get_Proj_pred(p); + ir_node *predpred = get_Proj_pred(pred); + long proj = get_Proj_proj(p); + long nr = get_Proj_proj(pred); - switch (get_irn_opcode(pred)) { - case iro_Start: - mt = get_entity_type(get_irg_entity(get_irn_irg(pred))); + switch (get_irn_opcode(predpred)) { + case iro_Start:; + ir_graph *irg = get_irn_irg(p); + ir_type *mt = get_entity_type(get_irg_entity(irg)); if (nr == pn_Start_T_args) { ASSERT_AND_RET( @@ -628,12 +558,10 @@ static int verify_node_Proj_Proj(const ir_node *p) (proj < (int)get_method_n_params(mt)), "More Projs for args than args in type", 0 ); - if ((mode_is_reference(mode)) && is_compound_type(get_method_param_type(mt, proj))) - /* value argument */ break; - - if (get_irg_phase_state(get_irn_irg(pred)) != phase_backend) { + ir_type *param_type = get_method_param_type(mt, proj); + if (!irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) { ASSERT_AND_RET_DBG( - (mode == get_type_mode(get_method_param_type(mt, proj))), + (mode == get_type_mode(param_type)), "Mode of Proj from Start doesn't match mode of param type.", 0, show_proj_mode_failure(p, get_method_param_type(mt, proj)); ); @@ -646,16 +574,19 @@ static int verify_node_Proj_Proj(const ir_node *p) ASSERT_AND_RET( (proj >= 0 && mode_is_datab(mode)), "wrong Proj from Proj from Call", 0); - mt = get_Call_type(pred); - ASSERT_AND_RET(mt == get_unknown_type() || is_Method_type(mt), + mt = get_Call_type(predpred); + ASSERT_AND_RET(is_unknown_type(mt) || is_Method_type(mt), "wrong call type on call", 0); ASSERT_AND_RET( (proj < (int)get_method_n_ress(mt)), "More Projs for results than results in type.", 0); - if ((mode_is_reference(mode)) && is_compound_type(get_method_res_type(mt, proj))) - /* value result */ break; + ir_type *res_type = get_method_res_type(mt, proj); + /* value result */ + if ((mode_is_reference(mode)) && + (is_compound_type(res_type) || is_Array_type(res_type))) + break; - ASSERT_AND_RET( + ASSERT_AND_RET( (mode == get_type_mode(get_method_res_type(mt, proj))), "Mode of Proj from Call doesn't match mode of result type.", 0); } @@ -711,28 +642,6 @@ static int verify_node_Proj_CopyB(const ir_node *p) return 1; } -/** - * verify a Proj(Bound) node - */ -static int verify_node_Proj_Bound(const ir_node *p) -{ - ir_mode *mode = get_irn_mode(p); - ir_node *n = get_Proj_pred(p); - long proj = get_Proj_proj(p); - - ASSERT_AND_RET_DBG( - ( - (proj == pn_Bound_M && mode == mode_M) || - (proj == pn_Bound_X_regular && mode == mode_X) || - (proj == pn_Bound_X_except && mode == mode_X) || - (proj == pn_Bound_res && mode == get_irn_mode(get_Bound_index(n))) - ), - "wrong Proj from Bound", 0, - show_proj_failure(p); - ); - return 1; -} - static int verify_node_Proj_fragile(const ir_node *node) { ir_node *pred = get_Proj_pred(node); @@ -791,7 +700,7 @@ static int verify_node_Block(const ir_node *n) ASSERT_AND_RET(get_Block_n_cfgpreds(n) == 0, "Start Block node", 0); } - if (n == get_irg_end_block(irg) && get_irg_phase_state(irg) != phase_backend) { + if (n == get_irg_end_block(irg) && !irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) { /* End block may only have Return, Raise or fragile ops as preds. */ for (i = get_Block_n_cfgpreds(n) - 1; i >= 0; --i) { ir_node *pred = skip_Proj(get_Block_cfgpred(n, i)); @@ -863,14 +772,50 @@ static int verify_node_Cond(const ir_node *n) ir_mode *mymode = get_irn_mode(n); ir_mode *op1mode = get_irn_mode(get_Cond_selector(n)); - ASSERT_AND_RET( - /* Cond: BB x b --> X x X */ - (op1mode == mode_b || - /* Cond: BB x int --> X^n */ - mode_is_int(op1mode) ), "Cond node", 0 - ); + ASSERT_AND_RET(op1mode == mode_b, "Cond operand not mode_b", 0); ASSERT_AND_RET(mymode == mode_T, "Cond mode is not a tuple", 0); + return 1; +} + +static int verify_switch_table(const ir_node *n) +{ + const ir_switch_table *table = get_Switch_table(n); + unsigned n_outs = get_Switch_n_outs(n); + ir_node *selector = get_Switch_selector(n); + ir_mode *mode = get_irn_mode(selector); + size_t n_entries; + size_t e; + + ASSERT_AND_RET(table != NULL, "switch table is NULL", 0); + + n_entries = ir_switch_table_get_n_entries(table); + for (e = 0; e < n_entries; ++e) { + const ir_switch_table_entry *entry + = ir_switch_table_get_entry_const(table, e); + if (entry->pn == 0) + continue; + ASSERT_AND_RET(entry->min != NULL && entry->max != NULL, + "switch table entry without min+max value", 0); + ASSERT_AND_RET(get_tarval_mode(entry->min) == mode && + get_tarval_mode(entry->max) == mode, + "switch table entry with wrong modes", 0); + ASSERT_AND_RET(tarval_cmp(entry->min, entry->max) != ir_relation_greater, + "switch table entry without min+max value", 0); + ASSERT_AND_RET(entry->pn >= 0 && entry->pn < (long)n_outs, + "switch table entry with invalid proj number", 0); + } + return 1; +} + +static int verify_node_Switch(const ir_node *n) +{ + ir_mode *mymode = get_irn_mode(n); + ir_mode *op1mode = get_irn_mode(get_Switch_selector(n)); + if (!verify_switch_table(n)) + return 0; + ASSERT_AND_RET(mode_is_int(op1mode), "Switch operand not integer", 0); + ASSERT_AND_RET(mymode == mode_T, "Switch mode is not a tuple", 0); return 1; } @@ -895,13 +840,13 @@ static int verify_node_Return(const ir_node *n) ASSERT_AND_RET( mymode == mode_X, "Result X", 0 ); /* result X */ /* Compare returned results with result types of method type */ mt = get_entity_type(get_irg_entity(irg)); - ASSERT_AND_RET_DBG(get_Return_n_ress(n) == get_method_n_ress(mt), + ASSERT_AND_RET_DBG((size_t)get_Return_n_ress(n) == get_method_n_ress(mt), "Number of results for Return doesn't match number of results in type.", 0, show_return_nres(irg, n, mt);); for (i = get_Return_n_ress(n) - 1; i >= 0; --i) { ir_type *res_type = get_method_res_type(mt, i); - if (get_irg_phase_state(irg) != phase_backend) { + if (irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) { if (is_atomic_type(res_type)) { ASSERT_AND_RET_DBG( get_irn_mode(get_Return_res(n, i)) == get_type_mode(res_type), @@ -971,6 +916,14 @@ static int verify_node_SymConst(const ir_node *n) /* SymConst: BB --> ref */ mode_is_reference(mymode)) ,"SymConst node", 0); + if (SYMCONST_HAS_ENT(get_SymConst_kind(n))) { + ir_entity *ent = get_SymConst_entity(n); + /* the is_method_entity(ent) exception is for nested functions... */ + ASSERT_AND_RET_DBG((get_entity_owner(ent)->flags & tf_segment) + || is_method_entity(ent), + "SymConst node with non-segment entity", 0, + show_node_failure(n);); + } return 1; } @@ -996,6 +949,8 @@ static int verify_node_Sel(const ir_node *n) } ent = get_Sel_entity(n); ASSERT_AND_RET_DBG(ent, "Sel node with empty entity", 0, show_node_failure(n);); + ASSERT_AND_RET_DBG(!(get_entity_owner(ent)->flags & tf_segment), + "Sel node with global entity", 0, show_node_failure(n);); return 1; } @@ -1064,7 +1019,7 @@ static int verify_node_Call(const ir_node *n) if (get_method_variadicity(mt) == variadicity_variadic) { ASSERT_AND_RET_DBG( - get_Call_n_params(n) >= get_method_n_params(mt), + (size_t)get_Call_n_params(n) >= get_method_n_params(mt), "Number of args for Call doesn't match number of args in variadic type.", 0, ir_fprintf(stderr, "Call %+F has %d params, type %d\n", @@ -1072,7 +1027,7 @@ static int verify_node_Call(const ir_node *n) ); } else { ASSERT_AND_RET_DBG( - get_Call_n_params(n) == get_method_n_params(mt), + (size_t)get_Call_n_params(n) == get_method_n_params(mt), "Number of args for Call doesn't match number of args in non variadic type.", 0, ir_fprintf(stderr, "Call %+F has %d params, type %d\n", @@ -1083,7 +1038,7 @@ static int verify_node_Call(const ir_node *n) for (i = 0; i < get_method_n_params(mt); i++) { ir_type *t = get_method_param_type(mt, i); - if (get_irg_phase_state(irg) != phase_backend) { + if (irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) { if (is_atomic_type(t)) { ASSERT_AND_RET_DBG( get_irn_mode(get_Call_param(n, i)) == get_type_mode(t), @@ -1225,12 +1180,14 @@ static int verify_node_Div(const ir_node *n) ir_mode *op1mode = get_irn_mode(get_Div_mem(n)); ir_mode *op2mode = get_irn_mode(get_Div_left(n)); ir_mode *op3mode = get_irn_mode(get_Div_right(n)); + ir_mode *resmode = get_Div_resmode(n); ASSERT_AND_RET( - /* Div: BB x M x data x data --> M x X x data */ - op1mode == mode_M && - op2mode == op3mode && - mode_is_data(op2mode) && + /* Div: BB x M x num x num --> M x X x num */ + op1mode == mode_M && + op2mode == resmode && + op3mode == resmode && + mode_is_num(resmode) && mymode == mode_T, "Div node", 0 ); @@ -1246,12 +1203,14 @@ static int verify_node_Mod(const ir_node *n) ir_mode *op1mode = get_irn_mode(get_Mod_mem(n)); ir_mode *op2mode = get_irn_mode(get_Mod_left(n)); ir_mode *op3mode = get_irn_mode(get_Mod_right(n)); + ir_mode *resmode = get_Mod_resmode(n); ASSERT_AND_RET( /* Mod: BB x M x int x int --> M x X x int */ - op1mode == mode_M && - op2mode == op3mode && - mode_is_int(op2mode) && + op1mode == mode_M && + op2mode == resmode && + op3mode == resmode && + mode_is_int(resmode) && mymode == mode_T, "Mod node", 0 ); @@ -1391,33 +1350,13 @@ static int verify_node_Rotl(const ir_node *n) * verify a Conv node */ static int verify_node_Conv(const ir_node *n) -{ - ir_graph *irg = get_irn_irg(n); - ir_mode *mymode = get_irn_mode(n); - ir_mode *op1mode = get_irn_mode(get_Conv_op(n)); - - ASSERT_AND_RET_DBG( - is_irg_state(irg, IR_GRAPH_STATE_BCONV_ALLOWED) || - (mode_is_datab(op1mode) && mode_is_data(mymode)), - "Conv node", 0, - show_unop_failure(n, "/* Conv: BB x datab --> data */"); - ); - return 1; -} - -/** - * verify a Cast node - */ -static int verify_node_Cast(const ir_node *n) { ir_mode *mymode = get_irn_mode(n); - ir_mode *op1mode = get_irn_mode(get_Cast_op(n)); + ir_mode *op1mode = get_irn_mode(get_Conv_op(n)); - ASSERT_AND_RET_DBG( - /* Conv: BB x datab1 --> datab2 */ - mode_is_data(op1mode) && op1mode == mymode, - "Cast node", 0, - show_unop_failure(n, "/* Conv: BB x datab1 --> datab2 */"); + ASSERT_AND_RET_DBG(mode_is_data(op1mode) && mode_is_data(mymode), + "Conv node", 0, + show_unop_failure(n, "/* Conv: BB x data --> data */"); ); return 1; } @@ -1434,7 +1373,9 @@ static int verify_node_Phi(const ir_node *n) /* a Phi node MUST have the same number of inputs as its block * Exception is a phi with 0 inputs which is used when (re)constructing the * SSA form */ - if (! is_Bad(block) && get_irg_phase_state(get_irn_irg(n)) != phase_building && get_irn_arity(n) > 0) { + if (! is_Bad(block) + && !irg_is_constrained(get_irn_irg(n), IR_GRAPH_CONSTRAINT_CONSTRUCTION) + && get_irn_arity(n) > 0) { ASSERT_AND_RET_DBG( get_irn_arity(n) == get_irn_arity(block), "wrong number of inputs in Phi node", 0, @@ -1465,26 +1406,11 @@ static int verify_node_Load(const ir_node *n) ir_mode *op2mode = get_irn_mode(get_Load_ptr(n)); ASSERT_AND_RET(op1mode == mode_M, "Load node", 0); - if (get_irg_phase_state(irg) != phase_backend) { + if (!irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) { ASSERT_AND_RET(mode_is_reference(op2mode), "Load node", 0 ); } ASSERT_AND_RET( mymode == mode_T, "Load node", 0 ); - /* - * jack's gen_add_firm_code:simpleSel seems to build Load (Load - * (Proj (Proj))) sometimes ... - - * interprete.c:ai_eval seems to assume that this happens, too - - * obset.c:get_abstval_any can't deal with this if the load has - * mode_T - * - { - ir_entity *ent = hunt_for_entity (get_Load_ptr (n), n); - assert ((NULL != ent) || (mymode != mode_T)); - } - */ - return 1; } @@ -1494,7 +1420,6 @@ static int verify_node_Load(const ir_node *n) static int verify_node_Store(const ir_node *n) { ir_graph *irg = get_irn_irg(n); - ir_entity *target; ir_mode *mymode = get_irn_mode(n); ir_mode *op1mode = get_irn_mode(get_Store_mem(n)); @@ -1502,22 +1427,11 @@ static int verify_node_Store(const ir_node *n) ir_mode *op3mode = get_irn_mode(get_Store_value(n)); ASSERT_AND_RET(op1mode == mode_M && mode_is_datab(op3mode), "Store node", 0 ); - if (get_irg_phase_state(irg) != phase_backend) { + if (!irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) { ASSERT_AND_RET(mode_is_reference(op2mode), "Store node", 0 ); } ASSERT_AND_RET(mymode == mode_T, "Store node", 0); - target = get_ptr_entity(get_Store_ptr(n)); - if (verify_entities && target && get_irg_phase_state(irg) == phase_high) { - /* - * If lowered code, any Sels that add 0 may be removed, causing - * an direct access to entities of array or compound type. - * Prevent this by checking the phase. - */ - ASSERT_AND_RET( op3mode == get_type_mode(get_entity_type(target)), - "Store node", 0); - } - return 1; } @@ -1634,7 +1548,7 @@ static int verify_node_CopyB(const ir_node *n) /* CopyB: BB x M x ref x ref --> M x X */ ASSERT_AND_RET(mymode == mode_T && op1mode == mode_M, "CopyB node", 0); - if (get_irg_phase_state(irg) != phase_backend) { + if (!irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) { ASSERT_AND_RET(mode_is_reference(op2mode) && mode_is_reference(op3mode), "CopyB node", 0 ); } @@ -1649,28 +1563,6 @@ static int verify_node_CopyB(const ir_node *n) return 1; } -/** - * verify a Bound node - */ -static int verify_node_Bound(const ir_node *n) -{ - ir_mode *mymode = get_irn_mode(n); - ir_mode *op1mode = get_irn_mode(get_Bound_mem(n)); - ir_mode *op2mode = get_irn_mode(get_Bound_index(n)); - ir_mode *op3mode = get_irn_mode(get_Bound_lower(n)); - ir_mode *op4mode = get_irn_mode(get_Bound_upper(n)); - - /* Bound: BB x M x int x int x int --> M x X */ - ASSERT_AND_RET( - mymode == mode_T && - op1mode == mode_M && - op2mode == op3mode && - op3mode == op4mode && - mode_is_int(op3mode), - "Bound node", 0 ); - return 1; -} - /** * Check dominance. * For each usage of a node, it is checked, if the block of the @@ -1720,7 +1612,6 @@ static int check_dominance_for_node(const ir_node *use) return 1; } -/* Tests the modes of n and its predecessors. */ int irn_verify_irg(const ir_node *n, ir_graph *irg) { ir_op *op; @@ -1754,7 +1645,7 @@ int irn_verify_irg(const ir_node *n, ir_graph *irg) op = get_irn_op(n); - if (_get_op_pinned(op) >= op_pin_state_exc_pinned) { + if (get_op_pinned(op) >= op_pin_state_exc_pinned) { op_pin_state state = get_irn_pinned(n); ASSERT_AND_RET_DBG( state == op_pin_state_floats || @@ -1763,13 +1654,19 @@ int irn_verify_irg(const ir_node *n, ir_graph *irg) ir_printf("node %+F", n); ); } else if (!is_Block(n) && is_irn_pinned_in_irg(n) - && is_irg_state(irg, IR_GRAPH_STATE_NO_BAD_BLOCKS)) { + && irg_has_properties(irg, IR_GRAPH_PROPERTY_NO_BADS)) { ASSERT_AND_RET_DBG(is_Block(get_nodes_block(n)) || is_Anchor(n), "block input is not a block", 0, ir_printf("node %+F", n); ); } + ASSERT_AND_RET_DBG( + !is_irn_start_block_placed(n) || get_nodes_block(n) == get_irg_start_block(irg), + "node should be in start block", 0, + ir_printf("node %+F", n); + ); + if (op->ops.verify_node) return op->ops.verify_node(n); @@ -1851,7 +1748,7 @@ static int check_block_cfg(const ir_node *block, check_cfg_env_t *env) branch = skip_Tuple(branch); if (is_Bad(branch)) continue; - former_dest = pmap_get(branch_nodes, branch); + former_dest = pmap_get(ir_node, branch_nodes, branch); ASSERT_AND_RET_DBG(former_dest==NULL || is_unknown_jump(skip_Proj(branch)), "Multiple users on mode_X node", 0, ir_printf("node %+F\n", branch); @@ -1864,7 +1761,7 @@ static int check_block_cfg(const ir_node *block, check_cfg_env_t *env) if (is_Proj(branch)) { branch = skip_Proj(branch); } - former_branch = pmap_get(branch_nodes, branch_block); + former_branch = pmap_get(ir_node, branch_nodes, branch_block); ASSERT_AND_RET_DBG(former_branch == NULL || former_branch == branch, "Multiple branching nodes in a block", 0, @@ -1875,16 +1772,14 @@ static int check_block_cfg(const ir_node *block, check_cfg_env_t *env) if (is_Cond(branch)) { long pn = get_Proj_proj(branch_proj); - if (get_irn_mode(get_Cond_selector(branch)) == mode_b) { - if (pn == pn_Cond_true) - ir_nodeset_insert(&env->true_projs, branch); - if (pn == pn_Cond_false) - ir_nodeset_insert(&env->false_projs, branch); - } else { - long default_pn = get_Cond_default_proj(branch); - if (pn == default_pn) - ir_nodeset_insert(&env->true_projs, branch); - } + if (pn == pn_Cond_true) + ir_nodeset_insert(&env->true_projs, branch); + if (pn == pn_Cond_false) + ir_nodeset_insert(&env->false_projs, branch); + } else if (is_Switch(branch)) { + long pn = get_Proj_proj(branch_proj); + if (pn == pn_Switch_default) + ir_nodeset_insert(&env->true_projs, branch); } } @@ -1901,7 +1796,7 @@ static void check_cfg_walk_func(ir_node *node, void *data) static int verify_block_branch(const ir_node *block, check_cfg_env_t *env) { - ir_node *branch = pmap_get(env->branch_nodes, block); + ir_node *branch = pmap_get(ir_node, env->branch_nodes, block); ASSERT_AND_RET_DBG(branch != NULL || ir_nodeset_contains(&env->kept_nodes, block) || block == get_irg_end_block(get_irn_irg(block)), @@ -1913,21 +1808,23 @@ static int verify_block_branch(const ir_node *block, check_cfg_env_t *env) static int verify_cond_projs(const ir_node *cond, check_cfg_env_t *env) { - if (get_irn_mode(get_Cond_selector(cond)) == mode_b) { - ASSERT_AND_RET_DBG(ir_nodeset_contains(&env->true_projs, cond), - "Cond node lacks true proj", 0, - ir_printf("Cond %+F\n", cond); - ); - ASSERT_AND_RET_DBG(ir_nodeset_contains(&env->false_projs, cond), - "Cond node lacks false proj", 0, - ir_printf("Cond %+F\n", cond); - ); - } else { - ASSERT_AND_RET_DBG(ir_nodeset_contains(&env->true_projs, cond), - "Cond node lacks default Proj", 0, - ir_printf("Cond %+F\n", cond); - ); - } + ASSERT_AND_RET_DBG(ir_nodeset_contains(&env->true_projs, cond), + "Cond node lacks true proj", 0, + ir_printf("Cond %+F\n", cond); + ); + ASSERT_AND_RET_DBG(ir_nodeset_contains(&env->false_projs, cond), + "Cond node lacks false proj", 0, + ir_printf("Cond %+F\n", cond); + ); + return 1; +} + +static int verify_switch_projs(const ir_node *sw, check_cfg_env_t *env) +{ + ASSERT_AND_RET_DBG(ir_nodeset_contains(&env->true_projs, sw), + "Switch node lacks default Proj", 0, + ir_printf("Switch %+F\n", sw); + ); return 1; } @@ -1938,6 +1835,8 @@ static void assert_branch(ir_node *node, void *data) env->res &= verify_block_branch(node, env); } else if (is_Cond(node)) { env->res &= verify_cond_projs(node, env); + } else if (is_Switch(node)) { + env->res &= verify_switch_projs(node, env); } } @@ -1987,11 +1886,6 @@ static int check_cfg(ir_graph *irg) return env.res; } -/* - * Calls irn_verify for each node in irg. - * Graph must be in state "op_pin_state_pinned". - * If dominance info is available, check the SSA property. - */ int irg_verify(ir_graph *irg, unsigned flags) { int res = 1; @@ -2010,7 +1904,7 @@ int irg_verify(ir_graph *irg, unsigned flags) irg_walk_anchors( irg, - pinned && is_irg_state(irg, IR_GRAPH_STATE_CONSISTENT_DOMINANCE) + pinned && irg_has_properties(irg, IR_GRAPH_PROPERTY_CONSISTENT_DOMINANCE) ? verify_wrap_ssa : verify_wrap, NULL, &res @@ -2049,7 +1943,6 @@ static int irg_verify_wrapper(ir_graph *irg, void *context) return 0; } -/* Creates an ir_graph pass for irg_verify(). */ ir_graph_pass_t *irg_verify_pass(const char *name, unsigned flags) { pass_t *pass = XMALLOCZ(pass_t); @@ -2065,7 +1958,6 @@ ir_graph_pass_t *irg_verify_pass(const char *name, unsigned flags) return &pass->pass; } -/* create a verify pass */ int irn_verify_irg_dump(const ir_node *n, ir_graph *irg, const char **bad_string) { @@ -2075,7 +1967,7 @@ int irn_verify_irg_dump(const ir_node *n, ir_graph *irg, firm_verify_failure_msg = NULL; do_node_verification(FIRM_VERIFICATION_ERROR_ONLY); res = irn_verify_irg(n, irg); - if (res && is_irg_state(irg, IR_GRAPH_STATE_CONSISTENT_DOMINANCE) && + if (res && irg_has_properties(irg, IR_GRAPH_PROPERTY_CONSISTENT_DOMINANCE) && get_irg_pinned(irg) == op_pin_state_pinned) res = check_dominance_for_node(n); do_node_verification(old); @@ -2187,9 +2079,6 @@ static void check_bads(ir_node *node, void *env) } } -/* - * verify occurrence of bad nodes - */ int irg_verify_bads(ir_graph *irg, int flags) { verify_bad_env_t env; @@ -2202,85 +2091,71 @@ int irg_verify_bads(ir_graph *irg, int flags) return env.res; } -/* - * set the default verify operation - */ -void firm_set_default_verifier(unsigned code, ir_op_ops *ops) -{ -#define CASE(a) \ - case iro_##a: \ - ops->verify_node = verify_node_##a; \ - break - - switch (code) { - CASE(Proj); - CASE(Block); - CASE(Start); - CASE(Jmp); - CASE(IJmp); - CASE(Cond); - CASE(Return); - CASE(Raise); - CASE(Const); - CASE(SymConst); - CASE(Sel); - CASE(InstOf); - CASE(Call); - CASE(Add); - CASE(Sub); - CASE(Minus); - CASE(Mul); - CASE(Mulh); - CASE(Div); - CASE(Mod); - CASE(And); - CASE(Or); - CASE(Eor); - CASE(Not); - CASE(Cmp); - CASE(Shl); - CASE(Shr); - CASE(Shrs); - CASE(Rotl); - CASE(Conv); - CASE(Cast); - CASE(Phi); - CASE(Load); - CASE(Store); - CASE(Alloc); - CASE(Free); - CASE(Sync); - CASE(Confirm); - CASE(Mux); - CASE(CopyB); - CASE(Bound); - default: - break; - } -#undef CASE - -#define CASE(a) \ - case iro_##a: \ - ops->verify_proj_node = verify_node_Proj_##a; \ - break - - switch (code) { - CASE(Start); - CASE(Cond); - CASE(Raise); - CASE(InstOf); - CASE(Call); - CASE(Div); - CASE(Mod); - CASE(Load); - CASE(Store); - CASE(Alloc); - CASE(Proj); - CASE(Tuple); - CASE(CopyB); - CASE(Bound); - default: - break; - } -#undef CASE +static void register_verify_node_func(ir_op *op, verify_node_func func) +{ + op->ops.verify_node = func; +} + +static void register_verify_node_func_proj(ir_op *op, verify_node_func func) +{ + op->ops.verify_proj_node = func; +} + +void ir_register_verify_node_ops(void) +{ + register_verify_node_func(op_Add, verify_node_Add); + register_verify_node_func(op_Alloc, verify_node_Alloc); + register_verify_node_func(op_And, verify_node_And); + register_verify_node_func(op_Block, verify_node_Block); + register_verify_node_func(op_Call, verify_node_Call); + register_verify_node_func(op_Cmp, verify_node_Cmp); + register_verify_node_func(op_Cond, verify_node_Cond); + register_verify_node_func(op_Confirm, verify_node_Confirm); + register_verify_node_func(op_Const, verify_node_Const); + register_verify_node_func(op_Conv, verify_node_Conv); + register_verify_node_func(op_CopyB, verify_node_CopyB); + register_verify_node_func(op_Div, verify_node_Div); + register_verify_node_func(op_Eor, verify_node_Eor); + register_verify_node_func(op_Free, verify_node_Free); + register_verify_node_func(op_IJmp, verify_node_IJmp); + register_verify_node_func(op_InstOf, verify_node_InstOf); + register_verify_node_func(op_Jmp, verify_node_Jmp); + register_verify_node_func(op_Load, verify_node_Load); + register_verify_node_func(op_Minus, verify_node_Minus); + register_verify_node_func(op_Mod, verify_node_Mod); + register_verify_node_func(op_Mul, verify_node_Mul); + register_verify_node_func(op_Mulh, verify_node_Mulh); + register_verify_node_func(op_Mux, verify_node_Mux); + register_verify_node_func(op_Not, verify_node_Not); + register_verify_node_func(op_Or, verify_node_Or); + register_verify_node_func(op_Phi, verify_node_Phi); + register_verify_node_func(op_Proj, verify_node_Proj); + register_verify_node_func(op_Raise, verify_node_Raise); + register_verify_node_func(op_Return, verify_node_Return); + register_verify_node_func(op_Rotl, verify_node_Rotl); + register_verify_node_func(op_Sel, verify_node_Sel); + register_verify_node_func(op_Shl, verify_node_Shl); + register_verify_node_func(op_Shr, verify_node_Shr); + register_verify_node_func(op_Shrs, verify_node_Shrs); + register_verify_node_func(op_Start, verify_node_Start); + register_verify_node_func(op_Store, verify_node_Store); + register_verify_node_func(op_Sub, verify_node_Sub); + register_verify_node_func(op_Switch, verify_node_Switch); + register_verify_node_func(op_SymConst, verify_node_SymConst); + register_verify_node_func(op_Sync, verify_node_Sync); + + register_verify_node_func_proj(op_Alloc, verify_node_Proj_Alloc); + register_verify_node_func_proj(op_Call, verify_node_Proj_Call); + register_verify_node_func_proj(op_Cond, verify_node_Proj_Cond); + register_verify_node_func_proj(op_CopyB, verify_node_Proj_CopyB); + register_verify_node_func_proj(op_Div, verify_node_Proj_Div); + register_verify_node_func_proj(op_InstOf, verify_node_Proj_InstOf); + register_verify_node_func_proj(op_Load, verify_node_Proj_Load); + register_verify_node_func_proj(op_Mod, verify_node_Proj_Mod); + register_verify_node_func_proj(op_Proj, verify_node_Proj_Proj); + register_verify_node_func_proj(op_Raise, verify_node_Proj_Raise); + register_verify_node_func_proj(op_Start, verify_node_Proj_Start); + register_verify_node_func_proj(op_Store, verify_node_Proj_Store); + register_verify_node_func_proj(op_Switch, verify_node_Proj_Switch); + register_verify_node_func_proj(op_Tuple, verify_node_Proj_Tuple); }