X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fir%2Firverify.c;h=32568ba6f3e3324e7d018d992102a4064892e8ae;hb=a1e9069afa4fa1e16e2d176bcd7905d6a1ed4677;hp=56c9c2f5e1887b80556f84c1961213cc23411398;hpb=41f59a70277094ea8e989f778ebdb5dbae24d738;p=libfirm diff --git a/ir/ir/irverify.c b/ir/ir/irverify.c index 56c9c2f5e..32568ba6f 100644 --- a/ir/ir/irverify.c +++ b/ir/ir/irverify.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. + * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved. * * This file is part of libFirm. * @@ -845,39 +845,11 @@ static int verify_node_Proj(ir_node *p, ir_graph *irg) static int verify_node_Block(ir_node *n, ir_graph *irg) { int i; - ir_node *mb = get_Block_MacroBlock(n); - - ASSERT_AND_RET(is_Block(mb) || is_Bad(mb), "Block node with wrong MacroBlock", 0); - - if (is_Block(mb) && mb != n) { - ir_node *pred; - - /* Blocks with more than one predecessor must be header blocks */ - ASSERT_AND_RET(get_Block_n_cfgpreds(n) == 1, "partBlock with more than one predecessor", 0); - if (get_irg_phase_state(irg) != phase_backend) { - pred = get_Block_cfgpred(n, 0); - if (is_Proj(pred)) { - /* the predecessor MUST be a regular Proj */ - ir_node *frag_op = get_Proj_pred(pred); - ASSERT_AND_RET( - is_fragile_op(frag_op) && get_Proj_proj(pred) == pn_Generic_X_regular, - "partBlock with non-regular predecessor", 0); - } else { - /* We allow Jmps to be predecessors of partBlocks. This can happen due to optimization - of fragile nodes during construction. It does not violate our assumption of dominance - so let it. */ - ASSERT_AND_RET(is_Jmp(pred) || is_Bad(pred), - "partBlock with non-regular predecessor", 0); - } - } else { - /* relax in backend: Bound nodes are probably lowered into conditional jumps */ - } - } for (i = get_Block_n_cfgpreds(n) - 1; i >= 0; --i) { ir_node *pred = get_Block_cfgpred(n, i); ASSERT_AND_RET( - is_Bad(pred) || (get_irn_mode(pred) == mode_X), + is_Bad(pred) || (get_irn_mode(pred) == mode_X), "Block node must have a mode_X predecessor", 0); } @@ -1415,25 +1387,6 @@ static int verify_node_Mod(ir_node *n, ir_graph *irg) return 1; } -/** - * verify an Abs node - */ -static int verify_node_Abs(ir_node *n, ir_graph *irg) -{ - ir_mode *mymode = get_irn_mode(n); - ir_mode *op1mode = get_irn_mode(get_Abs_op(n)); - (void) irg; - - ASSERT_AND_RET_DBG( - /* Abs: BB x num --> num */ - op1mode == mymode && - mode_is_num (op1mode), - "Abs node", 0, - show_unop_failure(n, "/* Abs: BB x num --> num */"); - ); - return 1; -} - /** * verify a logical And, Or, Eor node */ @@ -1874,18 +1827,8 @@ static int verify_node_Bound(ir_node *n, ir_graph *irg) */ static int check_dominance_for_node(ir_node *use) { - if (is_Block(use)) { - ir_node *mbh = get_Block_MacroBlock(use); - - if (mbh != use) { - /* must be a partBlock */ - if (is_Block(mbh)) { - ASSERT_AND_RET(block_dominates(mbh, use), "MacroBlock header must dominate a partBlock", 0); - } - } - } /* This won't work for blocks and the end node */ - else if (use != get_irg_end(current_ir_graph) && use != current_ir_graph->anchor) { + if (!is_Block(use) && !is_End(use) && !is_Anchor(use)) { int i; ir_node *bl = get_nodes_block(use); @@ -2265,7 +2208,6 @@ void firm_set_default_verifyer(ir_opcode code, ir_op_ops *ops) CASE(DivMod); CASE(Div); CASE(Mod); - CASE(Abs); CASE(And); CASE(Or); CASE(Eor);