X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fsparc%2Fsparc_spec.pl;h=332c25325e01cf8ea764a9553448c2858b837a6b;hb=e6656be7cd30e7727e4dca7e8bdd8178562dbc67;hp=39f49a0d697f565aeae671432cdc5024b2c24ca8;hpb=208f6937077a4b3a2d68439da51f56690b8696b0;p=libfirm diff --git a/ir/be/sparc/sparc_spec.pl b/ir/be/sparc/sparc_spec.pl index 39f49a0d6..332c25325 100644 --- a/ir/be/sparc/sparc_spec.pl +++ b/ir/be/sparc/sparc_spec.pl @@ -10,103 +10,92 @@ $mode_fp = "mode_F"; $mode_fp2 = "mode_D"; $mode_fp4 = "mode_E"; # not correct, we need to register a new mode -$normal = 0; # no special type -$caller_save = 1; # caller save (register must be saved by the caller of a function) -$callee_save = 2; # callee save (register must be saved by the called function) -$ignore = 4; # ignore (do not assign this register) -$arbitrary = 8; # emitter can choose an arbitrary register of this class -$virtual = 16; # the register is a virtual one -$state = 32; # register represents a state - # available SPARC registers: 8 globals, 24 window regs (8 ins, 8 outs, 8 locals) %reg_classes = ( gp => [ - { name => "g0", type => $ignore }, # hardwired 0, behaves like /dev/null - { name => "g1", type => $caller_save }, # temp. value - { name => "g2", type => $caller_save }, - { name => "g3", type => $caller_save }, - { name => "g4", type => $caller_save }, - { name => "g5", type => $ignore }, # reserved by SPARC ABI - { name => "g6", type => $ignore }, # reserved by SPARC ABI - { name => "g7", type => $ignore }, # reserved by SPARC ABI - - # window's out registers - { name => "o0", type => $caller_save }, # param 1 / return value from callee - { name => "o1", type => $caller_save }, # param 2 - { name => "o2", type => $caller_save }, # param 3 - { name => "o3", type => $caller_save }, # param 4 - { name => "o4", type => $caller_save }, # param 5 - { name => "o5", type => $caller_save }, # param 6 - { name => "sp", type => $ignore }, # our stackpointer - { name => "o7", type => $ignore }, # temp. value / address of CALL instr. - - # window's local registers - { name => "l0", type => 0 }, - { name => "l1", type => 0 }, - { name => "l2", type => 0 }, - { name => "l3", type => 0 }, - { name => "l4", type => 0 }, - { name => "l5", type => 0 }, - { name => "l6", type => 0 }, - { name => "l7", type => 0 }, - - # window's in registers - { name => "i0", type => 0 }, # incoming param1 / return value to caller - { name => "i1", type => 0 }, # param 2 - { name => "i2", type => 0 }, # param 3 - { name => "i3", type => 0 }, # param 4 - { name => "i4", type => 0 }, # param 5 - { name => "i5", type => 0 }, # param 6 - { name => "frame_pointer", realname => "fp", type => $ignore }, # our framepointer - { name => "i7", type => $ignore }, # return address - 8 + { name => "g0" }, + { name => "g1" }, + { name => "g2" }, + { name => "g3" }, + { name => "g4" }, + { name => "g5" }, + { name => "g6" }, + { name => "g7" }, + + { name => "o0" }, + { name => "o1" }, + { name => "o2" }, + { name => "o3" }, + { name => "o4" }, + { name => "o5" }, + { name => "sp" }, + { name => "o7" }, + + { name => "l0" }, + { name => "l1" }, + { name => "l2" }, + { name => "l3" }, + { name => "l4" }, + { name => "l5" }, + { name => "l6" }, + { name => "l7" }, + + { name => "i0" }, + { name => "i1" }, + { name => "i2" }, + { name => "i3" }, + { name => "i4" }, + { name => "i5" }, + { name => "frame_pointer", realname => "fp" }, + { name => "i7" }, { mode => $mode_gp } ], fpflags_class => [ - { name => "fpflags", type => $ignore }, + { name => "fpflags" }, { mode => $mode_fpflags, flags => "manual_ra" } ], flags_class => [ - { name => "flags", type => $ignore }, + { name => "flags" }, { mode => $mode_flags, flags => "manual_ra" } ], mul_div_high_res => [ - { name => "y", type => $ignore }, + { name => "y" }, { mode => $mode_gp, flags => "manual_ra" } ], # fp registers can be accessed any time fp => [ - { name => "f0", type => $caller_save }, - { name => "f1", type => $caller_save }, - { name => "f2", type => $caller_save }, - { name => "f3", type => $caller_save }, - { name => "f4", type => $caller_save }, - { name => "f5", type => $caller_save }, - { name => "f6", type => $caller_save }, - { name => "f7", type => $caller_save }, - { name => "f8", type => $caller_save }, - { name => "f9", type => $caller_save }, - { name => "f10", type => $caller_save }, - { name => "f11", type => $caller_save }, - { name => "f12", type => $caller_save }, - { name => "f13", type => $caller_save }, - { name => "f14", type => $caller_save }, - { name => "f15", type => $caller_save }, - { name => "f16", type => $caller_save }, - { name => "f17", type => $caller_save }, - { name => "f18", type => $caller_save }, - { name => "f19", type => $caller_save }, - { name => "f20", type => $caller_save }, - { name => "f21", type => $caller_save }, - { name => "f22", type => $caller_save }, - { name => "f23", type => $caller_save }, - { name => "f24", type => $caller_save }, - { name => "f25", type => $caller_save }, - { name => "f26", type => $caller_save }, - { name => "f27", type => $caller_save }, - { name => "f28", type => $caller_save }, - { name => "f29", type => $caller_save }, - { name => "f30", type => $caller_save }, - { name => "f31", type => $caller_save }, + { name => "f0" }, + { name => "f1" }, + { name => "f2" }, + { name => "f3" }, + { name => "f4" }, + { name => "f5" }, + { name => "f6" }, + { name => "f7" }, + { name => "f8" }, + { name => "f9" }, + { name => "f10" }, + { name => "f11" }, + { name => "f12" }, + { name => "f13" }, + { name => "f14" }, + { name => "f15" }, + { name => "f16" }, + { name => "f17" }, + { name => "f18" }, + { name => "f19" }, + { name => "f20" }, + { name => "f21" }, + { name => "f22" }, + { name => "f23" }, + { name => "f24" }, + { name => "f25" }, + { name => "f26" }, + { name => "f27" }, + { name => "f28" }, + { name => "f29" }, + { name => "f30" }, + { name => "f31" }, { mode => $mode_fp } ] ); # %reg_classes @@ -114,22 +103,10 @@ $state = 32; # register represents a state %emit_templates = ( # emit source reg or imm dep. on node's arity RI => "${arch}_emit_reg_or_imm(node, -1);", - R1I => "${arch}_emit_reg_or_imm(node, 0);", - R2I => "${arch}_emit_reg_or_imm(node, 1);", - R3I => "${arch}_emit_reg_or_imm(node, 2);", - S1 => "${arch}_emit_source_register(node, 0);", - S2 => "${arch}_emit_source_register(node, 1);", - S3 => "${arch}_emit_source_register(node, 2);", - S4 => "${arch}_emit_source_register(node, 3);", - S5 => "${arch}_emit_source_register(node, 4);", - S6 => "${arch}_emit_source_register(node, 5);", - D1 => "${arch}_emit_dest_register(node, 0);", - D2 => "${arch}_emit_dest_register(node, 1);", - D3 => "${arch}_emit_dest_register(node, 2);", - D4 => "${arch}_emit_dest_register(node, 3);", - D5 => "${arch}_emit_dest_register(node, 4);", - D6 => "${arch}_emit_dest_register(node, 5);", - IM => "${arch}_emit_immediate(node);", + R1I => "${arch}_emit_reg_or_imm(node, 1);", + S0 => "${arch}_emit_source_register(node, 0);", + S1 => "${arch}_emit_source_register(node, 1);", + D0 => "${arch}_emit_dest_register(node, 0);", HIM => "${arch}_emit_high_immediate(node);", LM => "${arch}_emit_load_mode(node);", SM => "${arch}_emit_store_mode(node);", @@ -137,7 +114,8 @@ $state = 32; # register represents a state FPM => "${arch}_emit_fp_mode_suffix(node);", FCONVS => "${arch}_emit_fp_conv_source(node);", FCONVD => "${arch}_emit_fp_conv_destination(node);", - O => "${arch}_emit_offset(node);", + O1 => "${arch}_emit_offset(node, 1);", + O2 => "${arch}_emit_offset(node, 2);", ); $default_attr_type = "sparc_attr_t"; @@ -146,11 +124,10 @@ $default_copy_attr = "sparc_copy_attr"; %init_attr = ( sparc_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);", - sparc_load_store_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);\n". - "\tinit_sparc_load_store_attributes(res, ls_mode, entity, offset, is_frame_entity);", + sparc_load_store_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);", sparc_jmp_cond_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);", - sparc_jmp_switch_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);", - sparc_save_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);", + sparc_switch_jmp_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);\n". + "\tinit_sparc_switch_jmp_attributes(res, default_pn, jump_table);\n", sparc_fp_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);\n". "\tinit_sparc_fp_attributes(res, fp_mode);\n", sparc_fp_conv_attr_t => "\tinit_sparc_attributes(res, flags, in_reqs, exec_units, n_res);". @@ -161,20 +138,16 @@ $default_copy_attr = "sparc_copy_attr"; sparc_attr_t => "cmp_attr_sparc", sparc_load_store_attr_t => "cmp_attr_sparc_load_store", sparc_jmp_cond_attr_t => "cmp_attr_sparc_jmp_cond", - sparc_jmp_switch_attr_t => "cmp_attr_sparc_jmp_switch", - sparc_save_attr_t => "cmp_attr_sparc_save", + sparc_switch_jmp_attr_t => "cmp_attr_sparc_switch_jmp", sparc_fp_attr_t => "cmp_attr_sparc_fp", sparc_fp_conv_attr_t => "cmp_attr_sparc_fp_conv", ); %custom_irn_flags = ( - modifies_flags => "sparc_arch_irn_flag_modifies_flags", - modifies_fp_flags => "sparc_arch_irn_flag_modifies_fp_flags", + modifies_flags => "(arch_irn_flags_t)sparc_arch_irn_flag_modifies_flags", + modifies_fp_flags => "(arch_irn_flags_t)sparc_arch_irn_flag_modifies_fp_flags", ); -# addressing modes: imm, reg, reg +/- imm, reg + reg -# max. imm = 13 bits signed (-4096 ... 4096) - my %cmp_operand_constructors = ( imm => { attr => "ir_entity *immediate_entity, int32_t immediate_value", @@ -188,26 +161,28 @@ my %cmp_operand_constructors = ( }, ); -my %unop_operand_constructors = ( +my %binop_operand_constructors = ( imm => { attr => "ir_entity *immediate_entity, int32_t immediate_value", custominit => "sparc_set_attr_imm(res, immediate_entity, immediate_value);", - reg_req => { in => [], out => [ "gp" ] }, + reg_req => { in => [ "gp" ], out => [ "gp" ] }, + ins => [ "left" ], }, reg => { - reg_req => { in => [ "gp" ], out => [ "gp" ] }, + reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, + ins => [ "left", "right" ], }, ); -my %binop_operand_constructors = ( +my %binopcczero_operand_constructors = ( imm => { attr => "ir_entity *immediate_entity, int32_t immediate_value", custominit => "sparc_set_attr_imm(res, immediate_entity, immediate_value);", - reg_req => { in => [ "gp" ], out => [ "gp" ] }, + reg_req => { in => [ "gp" ], out => [ "flags" ] }, ins => [ "left" ], }, reg => { - reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, + reg_req => { in => [ "gp", "gp" ], out => [ "flags" ] }, ins => [ "left", "right" ], }, ); @@ -258,35 +233,39 @@ my %float_unop_constructors = ( Add => { irn_flags => [ "rematerializable" ], mode => $mode_gp, - emit => '. add %S1, %R2I, %D1', + emit => '. add %S0, %R1I, %D0', constructors => \%binop_operand_constructors, }, Sub => { irn_flags => [ "rematerializable" ], mode => $mode_gp, - emit => '. sub %S1, %R2I, %D1', + emit => '. sub %S0, %R1I, %D0', constructors => \%binop_operand_constructors, }, - # Load / Store Ld => { op_flags => [ "labeled", "fragile" ], state => "exc_pinned", constructors => { - "" => { - reg_req => { in => [ "gp", "none" ], out => [ "gp", "none" ] }, + imm => { + reg_req => { in => [ "gp", "none" ], out => [ "gp", "none" ] }, + ins => [ "ptr", "mem" ], + attr => "ir_mode *ls_mode, ir_entity *entity, int32_t offset, bool is_frame_entity", + custominit => "init_sparc_load_store_attributes(res, ls_mode, entity, offset, is_frame_entity, false);", }, - d => { - reg_req => { in => [ "gp", "none" ], out => [ "gp:a|2", "none" ] }, + reg => { + reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] }, + ins => [ "ptr", "ptr2", "mem" ], + attr => "ir_mode *ls_mode", + custominit => "init_sparc_load_store_attributes(res, ls_mode, NULL, 0, false, true);", }, }, - outs => [ "res", "M" ], ins => [ "ptr", "mem" ], + outs => [ "res", "M" ], attr_type => "sparc_load_store_attr_t", - attr => "ir_mode *ls_mode, ir_entity *entity, int32_t offset, bool is_frame_entity", - emit => '. ld%LM [%S1%O], %D1' + emit => '. ld%LM [%S0%O1], %D0' }, SetHi => { @@ -296,7 +275,7 @@ SetHi => { reg_req => { in => [], out => [ "gp" ] }, attr => "ir_entity *entity, int32_t immediate_value", custominit => "sparc_set_attr_imm(res, entity, immediate_value);", - emit => '. sethi %HIM, %D1' + emit => '. sethi %HIM, %D0' }, St => { @@ -304,44 +283,83 @@ St => { mode => "mode_M", state => "exc_pinned", constructors => { - "" => { - reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, + imm => { + reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, + ins => [ "val", "ptr", "mem" ], + attr => "ir_mode *ls_mode, ir_entity *entity, int32_t offset, bool is_frame_entity", + custominit => "init_sparc_load_store_attributes(res, ls_mode, entity, offset, is_frame_entity, false);", }, - d => { - reg_req => { in => [ "gp", "gp:a|2", "none" ], out => [ "none" ] }, + reg => { + reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] }, + ins => [ "val", "ptr", "ptr2", "mem" ], + attr => "ir_mode *ls_mode", + custominit => "init_sparc_load_store_attributes(res, ls_mode, NULL, 0, false, true);", }, }, - ins => [ "ptr", "val", "mem" ], + ins => [ "val", "ptr", "mem" ], outs => [ "M" ], attr_type => "sparc_load_store_attr_t", - attr => "ir_mode *ls_mode, ir_entity *entity, int32_t offset, bool is_frame_entity", - emit => '. st%SM %S2, [%S1%O]' + emit => '. st%SM %S0, [%S1%O2]' }, Save => { - reg_req => { - in => [ "sp", "none"], - out => [ "sp:I|S", "frame_pointer:I", "none" ] + emit => '. save %S0, %R1I, %D0', + outs => [ "stack" ], + ins => [ "stack" ], + constructors => { + imm => { + attr => "ir_entity *immediate_entity, int32_t immediate_value", + custominit => "sparc_set_attr_imm(res, immediate_entity, immediate_value);", + reg_req => { in => [ "sp" ], out => [ "sp:I|S" ] }, + ins => [ "stack" ], + }, + reg => { + reg_req => { in => [ "sp", "gp" ], out => [ "sp:I|S" ] }, + ins => [ "stack", "increment" ], + } }, - ins => [ "stack", "mem" ], - outs => [ "stack", "frame", "mem" ], - attr => "int initial_stacksize", - attr_type => "sparc_save_attr_t", - init_attr => "\tinit_sparc_save_attributes(res, initial_stacksize);", + mode => $mode_gp, +}, + +Restore => { + emit => '. restore %S0, %R1I, %D0', + outs => [ "stack" ], + ins => [ "stack" ], + constructors => { + imm => { + attr => "ir_entity *immediate_entity, int32_t immediate_value", + custominit => "sparc_set_attr_imm(res, immediate_entity, immediate_value);", + reg_req => { in => [ "sp" ], out => [ "sp:I|S" ] }, + ins => [ "stack" ], + }, + reg => { + reg_req => { in => [ "sp", "gp" ], out => [ "sp:I|S" ] }, + ins => [ "stack", "increment" ], + } + }, + mode => $mode_gp, +}, + +RestoreZero => { + emit => '. restore', + reg_req => { in => [ "frame_pointer" ], out => [ "sp:I|S" ] }, + ins => [ "frame_pointer" ], + outs => [ "stack" ], + mode => $mode_gp, }, SubSP => { reg_req => { in => [ "sp", "gp", "none" ], out => [ "sp:I|S", "gp", "none" ] }, ins => [ "stack", "size", "mem" ], outs => [ "stack", "addr", "M" ], - emit => ". sub %S1, %S2, %D1\n", + emit => ". sub %S0, %S1, %D0\n", }, AddSP => { reg_req => { in => [ "sp", "gp", "none" ], out => [ "sp:I|S", "none" ] }, ins => [ "stack", "size", "mem" ], outs => [ "stack", "M" ], - emit => ". add %S1, %S2, %D1\n", + emit => ". add %S0, %S1, %D0\n", }, FrameAddr => { @@ -360,8 +378,8 @@ Bicc => { state => "pinned", mode => "mode_T", attr_type => "sparc_jmp_cond_attr_t", - attr => "pn_Cmp pnc, bool is_unsigned", - init_attr => "\tinit_sparc_jmp_cond_attr(res, pnc, is_unsigned);", + attr => "ir_relation relation, bool is_unsigned", + init_attr => "\tinit_sparc_jmp_cond_attr(res, relation, is_unsigned);", reg_req => { in => [ "flags" ], out => [ "none", "none" ] }, }, @@ -370,8 +388,8 @@ fbfcc => { state => "pinned", mode => "mode_T", attr_type => "sparc_jmp_cond_attr_t", - attr => "pn_Cmp pnc", - init_attr => "\tinit_sparc_jmp_cond_attr(res, pnc, false);", + attr => "ir_relation relation", + init_attr => "\tinit_sparc_jmp_cond_attr(res, relation, false);", reg_req => { in => [ "fpflags" ], out => [ "none", "none" ] }, }, @@ -383,6 +401,25 @@ Ba => { mode => "mode_X", }, +# This is a JumpLink instruction, but with the addition that you can add custom +# register constraints to model your calling conventions +Return => { + arity => "variable", + out_arity => "variable", + constructors => { + imm => { + attr => "ir_entity *entity, int32_t offset", + custominit => "\tsparc_set_attr_imm(res, entity, offset);", + arity => "variable", + out_arity => "variable", + }, + reg => { + arity => "variable", + out_arity => "variable", + } + }, +}, + Call => { irn_flags => [ "modifies_flags", "modifies_fp_flags" ], state => "exc_pinned", @@ -402,101 +439,132 @@ Call => { }, }, -Cmp => { +Cmp => { # aka SubccZero irn_flags => [ "rematerializable", "modifies_flags" ], - emit => '. cmp %S1, %R2I', - ins => [ "left", "right" ], + emit => '. cmp %S0, %R1I', mode => $mode_flags, - constructors => \%cmp_operand_constructors, -}, - -Tst => { - irn_flags => [ "rematerializable", "modifies_flags" ], - emit => '. tst %S1', - mode => $mode_flags, - reg_req => { in => [ "gp" ], out => [ "flags" ] }, - ins => [ "val" ], + constructors => \%binopcczero_operand_constructors, }, SwitchJmp => { - op_flags => [ "labeled", "cfopcode", "forking" ], - irn_flags => [ "modifies_flags" ], - state => "pinned", - mode => "mode_T", - attr => "int n_projs, long def_proj_num", - init_attr => "\tset_sparc_jmp_switch_n_projs(res, n_projs);\n". - "\tset_sparc_jmp_switch_default_proj_num(res, def_proj_num);", - reg_req => { in => [ "gp" ], out => [ "none" ] }, - attr_type => "sparc_jmp_switch_attr_t", + op_flags => [ "labeled", "cfopcode", "forking" ], + state => "pinned", + mode => "mode_T", + reg_req => { in => [ "gp" ], out => [ ] }, + attr_type => "sparc_switch_jmp_attr_t", + attr => "long default_pn, ir_entity *jump_table", + init_attr => "info->out_infos = NULL;", # XXX ugly hack for out requirements }, Sll => { irn_flags => [ "rematerializable" ], mode => $mode_gp, - emit => '. sll %S1, %R2I, %D1', + emit => '. sll %S0, %R1I, %D0', constructors => \%binop_operand_constructors, }, -Slr => { +Srl => { irn_flags => [ "rematerializable" ], mode => $mode_gp, - emit => '. srl %S1, %R2I, %D1', + emit => '. srl %S0, %R1I, %D0', constructors => \%binop_operand_constructors, }, Sra => { irn_flags => [ "rematerializable" ], mode => $mode_gp, - emit => '. sra %S1, %R2I, %D1', + emit => '. sra %S0, %R1I, %D0', constructors => \%binop_operand_constructors, }, And => { irn_flags => [ "rematerializable" ], mode => $mode_gp, - emit => '. and %S1, %R2I, %D1', + emit => '. and %S0, %R1I, %D0', constructors => \%binop_operand_constructors, }, +AndCCZero => { + irn_flags => [ "rematerializable", "modifies_flags" ], + emit => '. andcc %S0, %R1I, %%g0', + mode => $mode_flags, + constructors => \%binopcczero_operand_constructors, +}, + AndN => { irn_flags => [ "rematerializable" ], mode => $mode_gp, - emit => '. andn %S1, %R2I, %D1', + emit => '. andn %S0, %R1I, %D0', constructors => \%binop_operand_constructors, }, +AndNCCZero => { + irn_flags => [ "rematerializable", "modifies_flags" ], + emit => '. andncc %S0, %R1I, %%g0', + mode => $mode_flags, + constructors => \%binopcczero_operand_constructors, +}, + Or => { irn_flags => [ "rematerializable" ], mode => $mode_gp, - emit => '. or %S1, %R2I, %D1', + emit => '. or %S0, %R1I, %D0', constructors => \%binop_operand_constructors, }, +OrCCZero => { + irn_flags => [ "rematerializable", "modifies_flags" ], + emit => '. orcc %S0, %R1I, %%g0', + mode => $mode_flags, + constructors => \%binopcczero_operand_constructors, +}, + OrN => { irn_flags => [ "rematerializable" ], mode => $mode_gp, - emit => '. orn %S1, %R2I, %D1', + emit => '. orn %S0, %R1I, %D0', constructors => \%binop_operand_constructors, }, +OrNCCZero => { + irn_flags => [ "rematerializable", "modifies_flags" ], + emit => '. orncc %S0, %R1I, %%g0', + mode => $mode_flags, + constructors => \%binopcczero_operand_constructors, +}, + Xor => { irn_flags => [ "rematerializable" ], mode => $mode_gp, - emit => '. xor %S1, %R2I, %D1', + emit => '. xor %S0, %R1I, %D0', constructors => \%binop_operand_constructors, }, +XorCCZero => { + irn_flags => [ "rematerializable", "modifies_flags" ], + emit => '. xorcc %S0, %R1I, %%g0', + mode => $mode_flags, + constructors => \%binopcczero_operand_constructors, +}, + XNor => { irn_flags => [ "rematerializable" ], mode => $mode_gp, - emit => '. xnor %S1, %R2I, %D1', + emit => '. xnor %S0, %R1I, %D0', constructors => \%binop_operand_constructors, }, +XNorCCZero => { + irn_flags => [ "rematerializable", "modifies_flags" ], + emit => '. xnorcc %S0, %R1I, %%g0', + mode => $mode_flags, + constructors => \%binopcczero_operand_constructors, +}, + Mul => { irn_flags => [ "rematerializable" ], mode => $mode_gp, - emit => '. smul %S1, %R2I, %D1', + emit => '. smul %S0, %R1I, %D0', constructors => \%binop_operand_constructors, }, @@ -524,7 +592,7 @@ UDiv => { fcmp => { irn_flags => [ "rematerializable", "modifies_fp_flags" ], - emit => '. fcmp%FPM %S1, %S2', + emit => '. fcmp%FPM %S0, %S1', attr_type => "sparc_fp_attr_t", attr => "ir_mode *fp_mode", mode => $mode_fpflags, @@ -544,7 +612,7 @@ fcmp => { fadd => { op_flags => [ "commutative" ], irn_flags => [ "rematerializable" ], - emit => '. fadd%FPM %S1, %S2, %D1', + emit => '. fadd%FPM %S0, %S1, %D0', attr_type => "sparc_fp_attr_t", attr => "ir_mode *fp_mode", ins => [ "left", "right" ], @@ -553,7 +621,7 @@ fadd => { fsub => { irn_flags => [ "rematerializable" ], - emit => '. fsub%FPM %S1, %S2, %D1', + emit => '. fsub%FPM %S0, %S1, %D0', attr_type => "sparc_fp_attr_t", attr => "ir_mode *fp_mode", ins => [ "left", "right" ], @@ -563,7 +631,7 @@ fsub => { fmul => { irn_flags => [ "rematerializable" ], op_flags => [ "commutative" ], - emit =>'. fmul%FPM %S1, %S2, %D1', + emit =>'. fmul%FPM %S0, %S1, %D0', attr_type => "sparc_fp_attr_t", attr => "ir_mode *fp_mode", ins => [ "left", "right" ], @@ -572,19 +640,29 @@ fmul => { fdiv => { irn_flags => [ "rematerializable" ], - emit => '. fdiv%FPM %S1, %S2, %D1', + emit => '. fdiv%FPM %S0, %S1, %D0', attr_type => "sparc_fp_attr_t", attr => "ir_mode *fp_mode", ins => [ "left", "right" ], outs => [ "res", "M" ], - constructors => \%float_binop_constructors, + constructors => { + s => { + reg_req => { in => [ "fp", "fp" ], out => [ "fp", "none" ] }, + }, + d => { + reg_req => { in => [ "fp:a|2", "fp:a|2" ], out => [ "fp:a|2", "none" ] }, + }, + q => { + reg_req => { in => [ "fp:a|4", "fp:a|4" ], out => [ "fp:a|4", "none" ] }, + } + }, }, fneg => { irn_flags => [ "rematerializable" ], reg_req => { in => [ "fp" ], out => [ "fp" ] }, # note that we only need the first register even for wide-values - emit => '. fneg %S1, %D1', + emit => '. fneg %S0, %D0', attr_type => "sparc_fp_attr_t", attr => "ir_mode *fp_mode", ins => [ "val" ], @@ -594,7 +672,7 @@ fneg => { "fabs" => { irn_flags => [ "rematerializable" ], # note that we only need the first register even for wide-values - emit => '. fabs %S1, %D1', + emit => '. fabs %S0, %D0', attr_type => "sparc_fp_attr_t", attr => "ir_mode *fp_mode", ins => [ "val" ], @@ -603,7 +681,7 @@ fneg => { fftof => { irn_flags => [ "rematerializable" ], - emit => '. f%FCONVS%.to%FCONVD %S1, %D1', + emit => '. f%FCONVS%.to%FCONVD %S0, %D0', attr_type => "sparc_fp_conv_attr_t", attr => "ir_mode *src_mode, ir_mode *dest_mode", constructors => { @@ -636,21 +714,20 @@ fftof => { fitof => { irn_flags => [ "rematerializable" ], - reg_req => { in => [ "gp" ], out => [ "fp" ] }, - emit => '. fito%FPM %S1, %D1', + emit => '. fito%FPM %S0, %D0', attr_type => "sparc_fp_attr_t", attr => "ir_mode *fp_mode", constructors => { s => { - reg_req => { in => [ "gp" ], out => [ "fp" ] }, + reg_req => { in => [ "fp" ], out => [ "fp" ] }, mode => $mode_fp, }, d => { - reg_req => { in => [ "gp" ], out => [ "fp:a|2" ] }, + reg_req => { in => [ "fp" ], out => [ "fp:a|2" ] }, mode => $mode_fp2, }, q => { - reg_req => { in => [ "gp" ], out => [ "fp:a|4" ] }, + reg_req => { in => [ "fp" ], out => [ "fp:a|4" ] }, mode => $mode_fp4, }, }, @@ -658,20 +735,19 @@ fitof => { fftoi => { irn_flags => [ "rematerializable" ], - reg_req => { in => [ "fp" ], out => [ "gp" ] }, - emit => '. f%FPM.toi %S1, %D1', + emit => '. f%FPM%.toi %S0, %D0', attr_type => "sparc_fp_attr_t", attr => "ir_mode *fp_mode", mode => $mode_gp, constructors => { s => { - reg_req => { in => [ "gp" ], out => [ "gp" ] }, + reg_req => { in => [ "fp" ], out => [ "fp" ] }, }, d => { - reg_req => { in => [ "fp:a|2" ], out => [ "gp" ] }, + reg_req => { in => [ "fp:a|2" ], out => [ "fp" ] }, }, q => { - reg_req => { in => [ "fp:a|4" ], out => [ "gp" ] }, + reg_req => { in => [ "fp:a|4" ], out => [ "fp" ] }, }, }, }, @@ -694,7 +770,8 @@ Ldf => { outs => [ "res", "M" ], attr_type => "sparc_load_store_attr_t", attr => "ir_mode *ls_mode, ir_entity *entity, int32_t offset, bool is_frame_entity", - emit => '. ld%FLSM [%S1%O], %D1' + custominit => "init_sparc_load_store_attributes(res, ls_mode, entity, offset, is_frame_entity, false);", + emit => '. ld%FLSM [%S0%O1], %D0' }, Stf => { @@ -702,20 +779,21 @@ Stf => { state => "exc_pinned", constructors => { s => { - reg_req => { in => [ "gp", "fp", "none" ], out => [ "none" ] }, + reg_req => { in => [ "fp", "gp", "none" ], out => [ "none" ] }, }, d => { - reg_req => { in => [ "gp", "fp:a|2", "none" ], out => [ "none" ] }, + reg_req => { in => [ "fp:a|2", "gp", "none" ], out => [ "none" ] }, }, q => { - reg_req => { in => [ "gp", "fp:a|4", "none" ], out => [ "none" ] }, + reg_req => { in => [ "fp:a|4", "gp", "none" ], out => [ "none" ] }, }, }, - ins => [ "ptr", "val", "mem" ], + ins => [ "val", "ptr", "mem" ], outs => [ "M" ], attr_type => "sparc_load_store_attr_t", attr => "ir_mode *ls_mode, ir_entity *entity, int32_t offset, bool is_frame_entity", - emit => '. st%FLSM %S2, [%S1%O]', + custominit => "init_sparc_load_store_attributes(res, ls_mode, entity, offset, is_frame_entity, false);", + emit => '. st%FLSM %S0, [%S1%O2]', mode => 'mode_M', },