X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fsparc%2Fsparc_emitter.c;h=d55c6daa910880b89fece2217559b9fcfc6e89c9;hb=6f068af98daa4725d60e5d23a8f98ec2841cfa44;hp=898605dd0044468db8c48959a9ebc1a449362795;hpb=f89fe6bdc4d0f139557986320adfa37ea02d32b3;p=libfirm

diff --git a/ir/be/sparc/sparc_emitter.c b/ir/be/sparc/sparc_emitter.c
index 898605dd0..d55c6daa9 100644
--- a/ir/be/sparc/sparc_emitter.c
+++ b/ir/be/sparc/sparc_emitter.c
@@ -20,6 +20,7 @@
 /**
  * @file
  * @brief   emit assembler for a backend graph
+ * @author  Hannes Rapp, Matthias Braun
  * @version $Id$
  */
 #include "config.h"
@@ -39,6 +40,7 @@
 #include "error.h"
 #include "raw_bitset.h"
 #include "dbginfo.h"
+#include "heights.h"
 
 #include "../besched.h"
 #include "../beblocksched.h"
@@ -46,6 +48,7 @@
 #include "../begnuas.h"
 #include "../be_dbgout.h"
 #include "../benode.h"
+#include "../bestack.h"
 
 #include "sparc_emitter.h"
 #include "gen_sparc_emitter.h"
@@ -55,6 +58,12 @@
 
 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
 
+static ir_heights_t  *heights;
+static const ir_node *delay_slot_filler; /**< this node has been choosen to fill
+                                              the next delay slot */
+
+static void sparc_emit_node(const ir_node *node);
+
 /**
  * Returns the register at in position pos.
  */
@@ -111,9 +120,39 @@ static const arch_register_t *get_out_reg(const ir_node *node, int pos)
 
 void sparc_emit_immediate(const ir_node *node)
 {
-	int const val = get_sparc_attr_const(node)->immediate_value;
-	assert(-4096 <= val && val < 4096);
-	be_emit_irprintf("%d", val);
+	const sparc_attr_t *attr   = get_sparc_attr_const(node);
+	ir_entity          *entity = attr->immediate_value_entity;
+
+	if (entity == NULL) {
+		int32_t value = attr->immediate_value;
+		assert(sparc_is_value_imm_encodeable(value));
+		be_emit_irprintf("%d", value);
+	} else {
+		be_emit_cstring("%lo(");
+		be_gas_emit_entity(entity);
+		if (attr->immediate_value != 0) {
+			be_emit_irprintf("%+d", attr->immediate_value);
+		}
+		be_emit_char(')');
+	}
+}
+
+void sparc_emit_high_immediate(const ir_node *node)
+{
+	const sparc_attr_t *attr   = get_sparc_attr_const(node);
+	ir_entity          *entity = attr->immediate_value_entity;
+
+	be_emit_cstring("%hi(");
+	if (entity == NULL) {
+		uint32_t value = (uint32_t) attr->immediate_value;
+		be_emit_irprintf("0x%X", value);
+	} else {
+		be_gas_emit_entity(entity);
+		if (attr->immediate_value != 0) {
+			be_emit_irprintf("%+d", attr->immediate_value);
+		}
+	}
+	be_emit_char(')');
 }
 
 void sparc_emit_source_register(const ir_node *node, int pos)
@@ -146,30 +185,47 @@ void sparc_emit_reg_or_imm(const ir_node *node, int pos)
 	}
 }
 
-static bool is_stack_pointer_relative(const ir_node *node)
-{
-	const arch_register_t *sp = &sparc_gp_regs[REG_SP];
-	return (is_sparc_St(node) && get_in_reg(node, n_sparc_St_ptr) == sp)
-	    || (is_sparc_Ld(node) && get_in_reg(node, n_sparc_Ld_ptr) == sp);
-}
-
 /**
  * emit SP offset
  */
-void sparc_emit_offset(const ir_node *node)
+void sparc_emit_offset(const ir_node *node, int offset_node_pos)
 {
 	const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
-	long                           offset = attr->offset;
 
-	/* bad hack: the real stack stuff is behind the always-there spill
-	 * space for the register window and stack */
-	if (is_stack_pointer_relative(node))
-		offset += SPARC_MIN_STACKSIZE;
-	if (offset != 0) {
-		be_emit_irprintf("%+ld", offset);
+	if (attr->is_reg_reg) {
+		assert(!attr->is_frame_entity);
+		assert(attr->base.immediate_value == 0);
+		assert(attr->base.immediate_value_entity == NULL);
+		be_emit_char('+');
+		sparc_emit_source_register(node, offset_node_pos);
+	} else if (attr->is_frame_entity) {
+		int32_t offset = attr->base.immediate_value;
+		if (offset != 0) {
+			assert(sparc_is_value_imm_encodeable(offset));
+			be_emit_irprintf("%+ld", offset);
+		}
+	} else if (attr->base.immediate_value != 0
+			|| attr->base.immediate_value_entity != NULL) {
+		be_emit_char('+');
+		sparc_emit_immediate(node);
 	}
 }
 
+void sparc_emit_float_load_store_mode(const ir_node *node)
+{
+	const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
+	ir_mode *mode = attr->load_store_mode;
+	int      bits = get_mode_size_bits(mode);
+
+	assert(mode_is_float(mode));
+
+	switch (bits) {
+	case 32:  return;
+	case 64:  be_emit_char('d'); return;
+	case 128: be_emit_char('q'); return;
+	}
+	panic("invalid flaot load/store mode %+F", mode);
+}
 
 /**
  *  Emit load mode char
@@ -186,7 +242,7 @@ void sparc_emit_load_mode(const ir_node *node)
 	} else if (bits == 8) {
 		be_emit_string(is_signed ? "sb" : "ub");
 	} else if (bits == 64) {
-		be_emit_string("d");
+		be_emit_char('d');
 	} else {
 		assert(bits == 32);
 	}
@@ -206,7 +262,7 @@ void sparc_emit_store_mode(const ir_node *node)
 	} else if (bits == 8) {
 		be_emit_string("b");
 	} else if (bits == 64) {
-		be_emit_string("d");
+		be_emit_char('d');
 	} else {
 		assert(bits == 32);
 	}
@@ -259,82 +315,173 @@ void sparc_emit_fp_mode_suffix(const ir_node *node)
 	emit_fp_suffix(attr->fp_mode);
 }
 
+static ir_node *get_jump_target(const ir_node *jump)
+{
+	return (ir_node*)get_irn_link(jump);
+}
+
 /**
  * Returns the target label for a control flow node.
  */
 static void sparc_emit_cfop_target(const ir_node *node)
 {
-	ir_node *block = get_irn_link(node);
+	ir_node *block = get_jump_target(node);
 	be_gas_emit_block_name(block);
 }
 
-/**
- * Emit single entity
- */
-static void sparc_emit_entity(ir_entity *entity)
+static int get_sparc_Call_dest_addr_pos(const ir_node *node)
 {
-	be_gas_emit_entity(entity);
+	return get_irn_arity(node)-1;
 }
 
-/**
- * Emits code for stack space management
- */
-static void emit_be_IncSP(const ir_node *irn)
+static bool ba_is_fallthrough(const ir_node *node)
 {
-	int offs = -be_get_IncSP_offset(irn);
+	ir_node *block      = get_nodes_block(node);
+	ir_node *next_block = (ir_node*)get_irn_link(block);
+	return get_irn_link(node) == next_block;
+}
 
-	if (offs == 0)
-			return;
+static bool is_no_instruction(const ir_node *node)
+{
+	/* copies are nops if src_reg == dest_reg */
+	if (be_is_Copy(node) || be_is_CopyKeep(node)) {
+		const arch_register_t *src_reg  = get_in_reg(node, 0);
+		const arch_register_t *dest_reg = get_out_reg(node, 0);
 
-	/* SPARC stack grows downwards */
-	if (offs < 0) {
-		be_emit_cstring("\tsub ");
-		offs = -offs;
-	} else {
-		be_emit_cstring("\tadd ");
+		if (src_reg == dest_reg)
+			return true;
 	}
+	if (be_is_IncSP(node) && be_get_IncSP_offset(node) == 0)
+		return true;
+	/* Ba is not emitted if it is a simple fallthrough */
+	if (is_sparc_Ba(node) && ba_is_fallthrough(node))
+		return true;
 
-	sparc_emit_source_register(irn, 0);
-	be_emit_irprintf(", %d", offs);
-	be_emit_cstring(", ");
-	sparc_emit_dest_register(irn, 0);
-	be_emit_finish_line_gas(irn);
+	return be_is_Keep(node) || be_is_Start(node) || is_Phi(node);
 }
 
-/**
- * emits code for save instruction with min. required stack space
+static bool has_delay_slot(const ir_node *node)
+{
+	if (is_sparc_Ba(node) && ba_is_fallthrough(node))
+		return false;
+
+	return is_sparc_Bicc(node) || is_sparc_fbfcc(node) || is_sparc_Ba(node)
+		|| is_sparc_SwitchJmp(node) || is_sparc_Call(node)
+		|| is_sparc_SDiv(node) || is_sparc_UDiv(node)
+		|| be_is_Return(node);
+}
+
+/** returns true if the emitter for this sparc node can produce more than one
+ * actual sparc instruction.
+ * Usually it is a bad sign if we have to add instructions here. We should
+ * rather try to get them lowered down. So we can actually put them into
+ * delay slots and make them more accessible to the scheduler.
  */
-static void emit_sparc_Save(const ir_node *irn)
+static bool emits_multiple_instructions(const ir_node *node)
 {
-	const sparc_save_attr_t *save_attr = get_sparc_save_attr_const(irn);
-	be_emit_cstring("\tsave ");
-	sparc_emit_source_register(irn, 0);
-	be_emit_irprintf(", %d, ", -save_attr->initial_stacksize);
-	sparc_emit_dest_register(irn, 0);
-	be_emit_finish_line_gas(irn);
+	if (has_delay_slot(node))
+		return true;
+
+	return is_sparc_Mulh(node) || is_sparc_SDiv(node) || is_sparc_UDiv(node)
+		|| be_is_MemPerm(node) || be_is_Perm(node);
 }
 
 /**
- * emits code to load hi 22 bit of a constant
+ * search for an instruction that can fill the delay slot of @p node
  */
-static void emit_sparc_HiImm(const ir_node *irn)
+static const ir_node *pick_delay_slot_for(const ir_node *node)
 {
-	const sparc_attr_t *attr = get_sparc_attr_const(irn);
-	be_emit_cstring("\tsethi ");
-	be_emit_irprintf("%%hi(%d), ", attr->immediate_value);
-	sparc_emit_dest_register(irn, 0);
-	be_emit_finish_line_gas(irn);
+	const ir_node *check      = node;
+	const ir_node *schedpoint = node;
+	unsigned       tries      = 0;
+	/* currently we don't track which registers are still alive, so we can't
+	 * pick any other instructions other than the one directly preceding */
+	static const unsigned PICK_DELAY_SLOT_MAX_DISTANCE = 1;
+
+	assert(has_delay_slot(node));
+
+	if (is_sparc_Call(node)) {
+		const sparc_attr_t *attr   = get_sparc_attr_const(node);
+		ir_entity          *entity = attr->immediate_value_entity;
+		if (entity != NULL) {
+			check = NULL; /* pick any instruction, dependencies on Call
+			                 don't matter */
+		} else {
+			/* we only need to check the value for the call destination */
+			check = get_irn_n(node, get_sparc_Call_dest_addr_pos(node));
+		}
+
+		/* the Call also destroys the value of %o7, but since this is currently
+		 * marked as ignore register in the backend, it should never be used by
+		 * the instruction in the delay slot. */
+	} else if (be_is_Return(node)) {
+		/* we only have to check the jump destination value */
+		int arity = get_irn_arity(node);
+		int i;
+
+		check = NULL;
+		for (i = 0; i < arity; ++i) {
+			ir_node               *in  = get_irn_n(node, i);
+			const arch_register_t *reg = arch_get_irn_register(in);
+			if (reg == &sparc_registers[REG_O7]) {
+				check = skip_Proj(in);
+				break;
+			}
+		}
+	} else {
+		check = node;
+	}
+
+	while (sched_has_prev(schedpoint)) {
+		schedpoint = sched_prev(schedpoint);
+
+		if (has_delay_slot(schedpoint))
+			break;
+
+		/* skip things which don't really result in instructions */
+		if (is_no_instruction(schedpoint))
+			continue;
+
+		if (tries++ >= PICK_DELAY_SLOT_MAX_DISTANCE)
+			break;
+
+		if (emits_multiple_instructions(schedpoint))
+			continue;
+
+		/* allowed for delayslot: any instruction which is not necessary to
+		 * compute an input to the branch. */
+		if (check != NULL
+				&& heights_reachable_in_block(heights, check, schedpoint))
+			continue;
+
+		/* found something */
+		return schedpoint;
+	}
+
+	return NULL;
 }
 
 /**
- * emits code to load lo 10bits of a constant
+ * Emits code for stack space management
  */
-static void emit_sparc_LoImm(const ir_node *irn)
+static void emit_be_IncSP(const ir_node *irn)
 {
-	const sparc_attr_t *attr = get_sparc_attr_const(irn);
-	be_emit_cstring("\tor ");
+	int offset = be_get_IncSP_offset(irn);
+
+	if (offset == 0)
+		return;
+
+	/* SPARC stack grows downwards */
+	if (offset < 0) {
+		be_emit_cstring("\tsub ");
+		offset = -offset;
+	} else {
+		be_emit_cstring("\tadd ");
+	}
+
 	sparc_emit_source_register(irn, 0);
-	be_emit_irprintf(", %%lo(%d), ", attr->immediate_value);
+	be_emit_irprintf(", %d", -offset);
+	be_emit_cstring(", ");
 	sparc_emit_dest_register(irn, 0);
 	be_emit_finish_line_gas(irn);
 }
@@ -357,24 +504,54 @@ static void emit_sparc_Mulh(const ir_node *irn)
 
 	// our result is in the y register now
 	// we just copy it to the assigned target reg
-	be_emit_cstring("\tmov ");
-	be_emit_char('%');
-	be_emit_string(arch_register_get_name(&sparc_flags_regs[REG_Y]));
-	be_emit_cstring(", ");
+	be_emit_cstring("\tmov %y, ");
 	sparc_emit_dest_register(irn, 0);
 	be_emit_finish_line_gas(irn);
 }
 
-/**
- * Emits code for return node
- */
-static void emit_be_Return(const ir_node *irn)
+static void fill_delay_slot(void)
 {
-	be_emit_cstring("\tret");
-	//be_emit_cstring("\tjmp %i7+8");
-	be_emit_finish_line_gas(irn);
-	be_emit_cstring("\trestore");
-	be_emit_finish_line_gas(irn);
+	if (delay_slot_filler != NULL) {
+		sparc_emit_node(delay_slot_filler);
+		delay_slot_filler = NULL;
+	} else {
+		be_emit_cstring("\tnop\n");
+		be_emit_write_line();
+	}
+}
+
+static void emit_sparc_Div(const ir_node *node, bool is_signed)
+{
+	/* can we get the delay count of the wr instruction somewhere? */
+	unsigned wry_delay_count = 3;
+	unsigned i;
+
+	be_emit_cstring("\twr ");
+	sparc_emit_source_register(node, 0);
+	be_emit_cstring(", 0, %y");
+	be_emit_finish_line_gas(node);
+
+	for (i = 0; i < wry_delay_count; ++i) {
+		fill_delay_slot();
+	}
+
+	be_emit_irprintf("\t%s ", is_signed ? "sdiv" : "udiv");
+	sparc_emit_source_register(node, 1);
+	be_emit_cstring(", ");
+	sparc_emit_reg_or_imm(node, 2);
+	be_emit_cstring(", ");
+	sparc_emit_dest_register(node, 0);
+	be_emit_finish_line_gas(node);
+}
+
+static void emit_sparc_SDiv(const ir_node *node)
+{
+	emit_sparc_Div(node, true);
+}
+
+static void emit_sparc_UDiv(const ir_node *node)
+{
+	emit_sparc_Div(node, false);
 }
 
 /**
@@ -387,17 +564,18 @@ static void emit_sparc_Call(const ir_node *node)
 
 	be_emit_cstring("\tcall ");
 	if (entity != NULL) {
-	    sparc_emit_entity(entity);
+	    be_gas_emit_entity(entity);
+	    if (attr->immediate_value != 0) {
+			be_emit_irprintf("%+d", attr->immediate_value);
+		}
 		be_emit_cstring(", 0");
 	} else {
-		int last = get_irn_arity(node);
-		sparc_emit_source_register(node, last-1);
+		int dest_addr = get_sparc_Call_dest_addr_pos(node);
+		sparc_emit_source_register(node, dest_addr);
 	}
 	be_emit_finish_line_gas(node);
 
-	/* fill delay slot */
-	be_emit_cstring("\tnop");
-	be_emit_finish_line_gas(node);
+	fill_delay_slot();
 }
 
 /**
@@ -430,9 +608,6 @@ static void emit_be_Perm(const ir_node *irn)
 	be_emit_finish_line_gas(irn);
 }
 
-/**
- * TODO: not really tested but seems to work with memperm_arity == 1
- */
 static void emit_be_MemPerm(const ir_node *node)
 {
 	int i;
@@ -489,72 +664,112 @@ static void emit_be_MemPerm(const ir_node *node)
 	assert(sp_change == 0);
 }
 
-/**
- * Emit a SymConst.
- */
-static void emit_sparc_SymConst(const ir_node *irn)
+static void emit_be_Return(const ir_node *node)
 {
-	const sparc_symconst_attr_t *attr = get_sparc_symconst_attr_const(irn);
-
-	//sethi %hi(const32),%reg
-	//or    %reg,%lo(const32),%reg
-
-	be_emit_cstring("\tsethi %hi(");
-	be_gas_emit_entity(attr->entity);
-	be_emit_cstring("), ");
-	sparc_emit_dest_register(irn, 0);
-	be_emit_cstring("\n ");
-
-	// TODO: could be combined with the following load/store instruction
-	be_emit_cstring("\tor ");
-	sparc_emit_dest_register(irn, 0);
-	be_emit_cstring(", %lo(");
-	be_gas_emit_entity(attr->entity);
-	be_emit_cstring("), ");
-	sparc_emit_dest_register(irn, 0);
-	be_emit_finish_line_gas(irn);
+	const char *destreg = "%o7";
+
+	/* hack: we don't explicitely model register changes because of the
+	 * restore node. So we have to do it manually here */
+	if (delay_slot_filler != NULL &&
+			(is_sparc_Restore(delay_slot_filler)
+			 || is_sparc_RestoreZero(delay_slot_filler))) {
+		destreg = "%i7";
+	}
+	be_emit_cstring("\tjmp ");
+	be_emit_string(destreg);
+	be_emit_cstring("+8");
+	be_emit_finish_line_gas(node);
+	fill_delay_slot();
 }
 
-/**
- * Emits code for FrameAddr fix
- */
-static void emit_sparc_FrameAddr(const ir_node *irn)
+static void emit_sparc_FrameAddr(const ir_node *node)
 {
-	const sparc_symconst_attr_t *attr = get_irn_generic_attr_const(irn);
+	const sparc_attr_t *attr   = get_sparc_attr_const(node);
+	int32_t             offset = attr->immediate_value;
 
-	// no need to fix offset as we are adressing via the framepointer
-	if (attr->fp_offset >= 0) {
+	if (offset < 0) {
 		be_emit_cstring("\tadd ");
-		sparc_emit_source_register(irn, 0);
+		sparc_emit_source_register(node, 0);
 		be_emit_cstring(", ");
-		be_emit_irprintf("%ld", attr->fp_offset);
+		assert(sparc_is_value_imm_encodeable(offset));
+		be_emit_irprintf("%ld", offset);
 	} else {
 		be_emit_cstring("\tsub ");
-		sparc_emit_source_register(irn, 0);
+		sparc_emit_source_register(node, 0);
 		be_emit_cstring(", ");
-		be_emit_irprintf("%ld", -attr->fp_offset);
+		assert(sparc_is_value_imm_encodeable(-offset));
+		be_emit_irprintf("%ld", -offset);
 	}
 
 	be_emit_cstring(", ");
-	sparc_emit_dest_register(irn, 0);
-	be_emit_finish_line_gas(irn);
+	sparc_emit_dest_register(node, 0);
+	be_emit_finish_line_gas(node);
 }
 
+static const char *get_icc_unsigned(ir_relation relation)
+{
+	switch (relation & (ir_relation_less_equal_greater)) {
+	case ir_relation_false:              return "bn";
+	case ir_relation_equal:              return "be";
+	case ir_relation_less:               return "blu";
+	case ir_relation_less_equal:         return "bleu";
+	case ir_relation_greater:            return "bgu";
+	case ir_relation_greater_equal:      return "bgeu";
+	case ir_relation_less_greater:       return "bne";
+	case ir_relation_less_equal_greater: return "ba";
+	default: panic("Cmp has unsupported relation");
+	}
+}
 
-/**
- * Emits code for Branch
- */
-static void emit_sparc_BXX(const ir_node *node)
+static const char *get_icc_signed(ir_relation relation)
+{
+	switch (relation & (ir_relation_less_equal_greater)) {
+	case ir_relation_false:              return "bn";
+	case ir_relation_equal:              return "be";
+	case ir_relation_less:               return "bl";
+	case ir_relation_less_equal:         return "ble";
+	case ir_relation_greater:            return "bg";
+	case ir_relation_greater_equal:      return "bge";
+	case ir_relation_less_greater:       return "bne";
+	case ir_relation_less_equal_greater: return "ba";
+	default: panic("Cmp has unsupported relation");
+	}
+}
+
+static const char *get_fcc(ir_relation relation)
+{
+	switch (relation) {
+	case ir_relation_false:                   return "fbn";
+	case ir_relation_equal:                   return "fbe";
+	case ir_relation_less:                    return "fbl";
+	case ir_relation_less_equal:              return "fble";
+	case ir_relation_greater:                 return "fbg";
+	case ir_relation_greater_equal:           return "fbge";
+	case ir_relation_less_greater:            return "fblg";
+	case ir_relation_less_equal_greater:      return "fbo";
+	case ir_relation_unordered:               return "fbu";
+	case ir_relation_unordered_equal:         return "fbue";
+	case ir_relation_unordered_less:          return "fbul";
+	case ir_relation_unordered_less_equal:    return "fbule";
+	case ir_relation_unordered_greater:       return "fbug";
+	case ir_relation_unordered_greater_equal: return "fbuge";
+	case ir_relation_unordered_less_greater:  return "fbne";
+	case ir_relation_true:                    return "fba";
+	}
+	panic("invalid relation");
+}
+
+typedef const char* (*get_cc_func)(ir_relation relation);
+
+static void emit_sparc_branch(const ir_node *node, get_cc_func get_cc)
 {
 	const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
-	int              proj_num    = attr->proj_num;
-	bool             is_unsigned = attr->is_unsigned;
+	ir_relation      relation    = attr->relation;
 	const ir_node   *proj_true   = NULL;
 	const ir_node   *proj_false  = NULL;
 	const ir_edge_t *edge;
 	const ir_node   *block;
 	const ir_node   *next_block;
-	const char      *suffix;
 
 	foreach_out_edge(node, edge) {
 		ir_node *proj = get_edge_src_irn(edge);
@@ -570,10 +785,7 @@ static void emit_sparc_BXX(const ir_node *node)
 	block = get_nodes_block(node);
 
 	/* we have a block schedule */
-	next_block = get_irn_link(block);
-
-	assert(proj_num != pn_Cmp_False);
-	assert(proj_num != pn_Cmp_True);
+	next_block = (ir_node*)get_irn_link(block);
 
 	if (get_irn_link(proj_true) == next_block) {
 		/* exchange both proj's so the second one can be omitted */
@@ -581,44 +793,20 @@ static void emit_sparc_BXX(const ir_node *node)
 
 		proj_true  = proj_false;
 		proj_false = t;
-		proj_num   = get_negated_pnc(proj_num, mode_Iu);
-	}
-
-	if (is_unsigned) {
-		switch (proj_num) {
-			case pn_Cmp_Eq:  suffix = "e"; break;
-			case pn_Cmp_Lt:  suffix = "lu"; break;
-			case pn_Cmp_Le:  suffix = "leu"; break;
-			case pn_Cmp_Gt:  suffix = "gu"; break;
-			case pn_Cmp_Ge:  suffix = "geu"; break;
-			case pn_Cmp_Lg:  suffix = "ne"; break;
-			default: panic("Cmp has unsupported pnc");
-		}
-	} else {
-		switch (proj_num) {
-			case pn_Cmp_Eq:  suffix = "e"; break;
-			case pn_Cmp_Lt:  suffix = "l"; break;
-			case pn_Cmp_Le:  suffix = "le"; break;
-			case pn_Cmp_Gt:  suffix = "g"; break;
-			case pn_Cmp_Ge:  suffix = "ge"; break;
-			case pn_Cmp_Lg:  suffix = "ne"; break;
-			default: panic("Cmp has unsupported pnc");
-		}
+		relation   = get_negated_relation(relation);
 	}
 
 	/* emit the true proj */
-	be_emit_cstring("\tb");
-	be_emit_string(suffix);
+	be_emit_cstring("\t");
+	be_emit_string(get_cc(relation));
 	be_emit_char(' ');
 	sparc_emit_cfop_target(proj_true);
 	be_emit_finish_line_gas(proj_true);
 
-	be_emit_cstring("\tnop");
-	be_emit_pad_comment();
-	be_emit_cstring("/* TODO: use delay slot */\n");
+	fill_delay_slot();
 
 	if (get_irn_link(proj_false) == next_block) {
-		be_emit_cstring("\t/* false-fallthrough to ");
+		be_emit_cstring("\t/* fallthrough to ");
 		sparc_emit_cfop_target(proj_false);
 		be_emit_cstring(" */");
 		be_emit_finish_line_gas(proj_false);
@@ -626,80 +814,167 @@ static void emit_sparc_BXX(const ir_node *node)
 		be_emit_cstring("\tba ");
 		sparc_emit_cfop_target(proj_false);
 		be_emit_finish_line_gas(proj_false);
-		be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
-		be_emit_finish_line_gas(proj_false);
+		fill_delay_slot();
 	}
 }
 
-/**
- * emit Jmp (which actually is a branch always (ba) instruction)
- */
-static void emit_sparc_Ba(const ir_node *node)
+static void emit_sparc_Bicc(const ir_node *node)
 {
-	ir_node *block, *next_block;
+	const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
+	bool             is_unsigned = attr->is_unsigned;
+	emit_sparc_branch(node, is_unsigned ? get_icc_unsigned : get_icc_signed);
+}
 
-	/* for now, the code works for scheduled and non-schedules blocks */
-	block = get_nodes_block(node);
+static void emit_sparc_fbfcc(const ir_node *node)
+{
+	emit_sparc_branch(node, get_fcc);
+}
 
-	/* we have a block schedule */
-	next_block = get_irn_link(block);
-	if (get_irn_link(node) != next_block) {
-		be_emit_cstring("\tba ");
-		sparc_emit_cfop_target(node);
-		be_emit_finish_line_gas(node);
-		be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
-	} else {
+static void emit_sparc_Ba(const ir_node *node)
+{
+	if (ba_is_fallthrough(node)) {
 		be_emit_cstring("\t/* fallthrough to ");
 		sparc_emit_cfop_target(node);
 		be_emit_cstring(" */");
+	} else {
+		be_emit_cstring("\tba ");
+		sparc_emit_cfop_target(node);
+		be_emit_finish_line_gas(node);
+		fill_delay_slot();
 	}
 	be_emit_finish_line_gas(node);
 }
 
-/**
- * emit copy node
- */
-static void emit_be_Copy(const ir_node *irn)
+static void emit_jump_table(const ir_node *node)
 {
-	ir_mode *mode = get_irn_mode(irn);
+	const sparc_switch_jmp_attr_t *attr = get_sparc_switch_jmp_attr_const(node);
+	long             switch_max    = LONG_MIN;
+	long             default_pn    = attr->default_proj_num;
+	ir_entity       *entity        = attr->jump_table;
+	ir_node         *default_block = NULL;
+	unsigned long    length;
+	const ir_edge_t *edge;
+	unsigned         i;
+	ir_node        **table;
 
-	if (get_in_reg(irn, 0) == get_out_reg(irn, 0)) {
-		/* omitted Copy */
-		return;
+	/* go over all proj's and collect them */
+	foreach_out_edge(node, edge) {
+		ir_node *proj = get_edge_src_irn(edge);
+		long     pn   = get_Proj_proj(proj);
+
+		/* check for default proj */
+		if (pn == default_pn) {
+			assert(default_block == NULL); /* more than 1 default_pn? */
+			default_block = get_jump_target(proj);
+		} else {
+			switch_max = pn > switch_max ? pn : switch_max;
+		}
 	}
+	assert(switch_max > LONG_MIN);
+
+	length = (unsigned long) switch_max + 1;
+	/* the 16000 isn't a real limit of the architecture. But should protect us
+	 * from seamingly endless compiler runs */
+	if (length > 16000) {
+		/* switch lowerer should have broken this monster to pieces... */
+		panic("too large switch encountered");
+	}
+
+	table = XMALLOCNZ(ir_node*, length);
+	foreach_out_edge(node, edge) {
+		ir_node *proj = get_edge_src_irn(edge);
+		long     pn   = get_Proj_proj(proj);
+		if (pn == default_pn)
+			continue;
+
+		table[pn] = get_jump_target(proj);
+	}
+
+	/* emit table */
+	be_gas_emit_switch_section(GAS_SECTION_RODATA);
+	be_emit_cstring("\t.align 4\n");
+	be_gas_emit_entity(entity);
+	be_emit_cstring(":\n");
+	for (i = 0; i < length; ++i) {
+		ir_node *block = table[i];
+		if (block == NULL)
+			block = default_block;
+		be_emit_cstring("\t.long ");
+		be_gas_emit_block_name(block);
+		be_emit_char('\n');
+		be_emit_write_line();
+	}
+	be_gas_emit_switch_section(GAS_SECTION_TEXT);
+
+	xfree(table);
+}
+
+static void emit_sparc_SwitchJmp(const ir_node *node)
+{
+	be_emit_cstring("\tjmp ");
+	sparc_emit_source_register(node, 0);
+	be_emit_finish_line_gas(node);
+	fill_delay_slot();
+
+	emit_jump_table(node);
+}
+
+static void emit_fmov(const ir_node *node, const arch_register_t *src_reg,
+                      const arch_register_t *dst_reg)
+{
+	be_emit_cstring("\tfmovs %");
+	be_emit_string(arch_register_get_name(src_reg));
+	be_emit_cstring(", %");
+	be_emit_string(arch_register_get_name(dst_reg));
+	be_emit_finish_line_gas(node);
+}
+
+static const arch_register_t *get_next_fp_reg(const arch_register_t *reg)
+{
+	unsigned index = reg->global_index;
+	assert(reg == &sparc_registers[index]);
+	index++;
+	assert(index - REG_F0 < N_sparc_fp_REGS);
+	return &sparc_registers[index];
+}
+
+static void emit_be_Copy(const ir_node *node)
+{
+	ir_mode               *mode    = get_irn_mode(node);
+	const arch_register_t *src_reg = get_in_reg(node, 0);
+	const arch_register_t *dst_reg = get_out_reg(node, 0);
+
+	if (src_reg == dst_reg)
+		return;
 
 	if (mode_is_float(mode)) {
-		panic("emit_be_Copy: move not supported for FP");
+		unsigned bits = get_mode_size_bits(mode);
+		int      n    = bits > 32 ? bits > 64 ? 3 : 1 : 0;
+		int      i;
+		emit_fmov(node, src_reg, dst_reg);
+		for (i = 0; i < n; ++i) {
+			src_reg = get_next_fp_reg(src_reg);
+			dst_reg = get_next_fp_reg(dst_reg);
+			emit_fmov(node, src_reg, dst_reg);
+		}
 	} else if (mode_is_data(mode)) {
 		be_emit_cstring("\tmov ");
-		sparc_emit_source_register(irn, 0);
+		sparc_emit_source_register(node, 0);
 		be_emit_cstring(", ");
-		sparc_emit_dest_register(irn, 0);
-		be_emit_finish_line_gas(irn);
+		sparc_emit_dest_register(node, 0);
+		be_emit_finish_line_gas(node);
 	} else {
-		panic("emit_be_Copy: move not supported for this mode");
+		panic("emit_be_Copy: invalid mode");
 	}
 }
 
-
-/**
- * dummy emitter for ignored nodes
- */
 static void emit_nothing(const ir_node *irn)
 {
 	(void) irn;
 }
 
-
-
-/**
- * type of emitter function
- */
 typedef void (*emit_func) (const ir_node *);
 
-/**
- * Set a node emitter. Make it a bit more type safe.
- */
 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
 {
 	op->ops.generic = (op_func)sparc_emit_node;
@@ -723,18 +998,17 @@ static void sparc_register_emitters(void)
 	set_emitter(op_be_MemPerm,      emit_be_MemPerm);
 	set_emitter(op_be_Perm,         emit_be_Perm);
 	set_emitter(op_be_Return,       emit_be_Return);
-	set_emitter(op_sparc_BXX,       emit_sparc_BXX);
+	set_emitter(op_sparc_Ba,        emit_sparc_Ba);
+	set_emitter(op_sparc_Bicc,      emit_sparc_Bicc);
 	set_emitter(op_sparc_Call,      emit_sparc_Call);
+	set_emitter(op_sparc_fbfcc,     emit_sparc_fbfcc);
 	set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
-	set_emitter(op_sparc_HiImm,     emit_sparc_HiImm);
-	set_emitter(op_sparc_Ba,        emit_sparc_Ba);
-	set_emitter(op_sparc_LoImm,     emit_sparc_LoImm);
 	set_emitter(op_sparc_Mulh,      emit_sparc_Mulh);
-	set_emitter(op_sparc_Save,      emit_sparc_Save);
-	set_emitter(op_sparc_SymConst,  emit_sparc_SymConst);
+	set_emitter(op_sparc_SDiv,      emit_sparc_SDiv);
+	set_emitter(op_sparc_SwitchJmp, emit_sparc_SwitchJmp);
+	set_emitter(op_sparc_UDiv,      emit_sparc_UDiv);
 
 	/* no need to emit anything for the following nodes */
-	set_emitter(op_be_Barrier, emit_nothing);
 	set_emitter(op_be_Keep,    emit_nothing);
 	set_emitter(op_be_Start,   emit_nothing);
 	set_emitter(op_Phi,        emit_nothing);
@@ -745,40 +1019,64 @@ static void sparc_register_emitters(void)
  */
 static void sparc_emit_node(const ir_node *node)
 {
-	ir_op               *op       = get_irn_op(node);
+	ir_op *op = get_irn_op(node);
 
 	if (op->ops.generic) {
 		emit_func func = (emit_func) op->ops.generic;
 		be_dbg_set_dbg_info(get_irn_dbg_info(node));
 		(*func) (node);
 	} else {
-		panic("Error: No emit handler for node %+F (graph %+F)\n",
-			node, current_ir_graph);
+		panic("No emit handler for node %+F (graph %+F)\n", node,
+		      current_ir_graph);
+	}
+}
+
+static ir_node *find_next_delay_slot(ir_node *from)
+{
+	ir_node *schedpoint = from;
+	while (!has_delay_slot(schedpoint)) {
+		if (!sched_has_next(schedpoint))
+			return NULL;
+		schedpoint = sched_next(schedpoint);
 	}
+	return schedpoint;
 }
 
 /**
  * Walks over the nodes in a block connected by scheduling edges
  * and emits code for each node.
  */
-static void sparc_gen_block(ir_node *block, void *data)
+static void sparc_emit_block(ir_node *block)
 {
 	ir_node *node;
-	(void) data;
+	ir_node *next_delay_slot;
 
-	if (! is_Block(block))
-		return;
+	assert(is_Block(block));
 
 	be_gas_emit_block_name(block);
 	be_emit_cstring(":\n");
 	be_emit_write_line();
 
+	next_delay_slot = find_next_delay_slot(sched_first(block));
+	if (next_delay_slot != NULL)
+		delay_slot_filler = pick_delay_slot_for(next_delay_slot);
+
 	sched_foreach(block, node) {
+		if (node == delay_slot_filler) {
+			continue;
+		}
+
 		sparc_emit_node(node);
+
+		if (node == next_delay_slot) {
+			assert(delay_slot_filler == NULL);
+			next_delay_slot = find_next_delay_slot(sched_next(node));
+			if (next_delay_slot != NULL)
+				delay_slot_filler = pick_delay_slot_for(next_delay_slot);
+		}
 	}
 }
 
-
 /**
  * Emits code for function start.
  */
@@ -804,11 +1102,6 @@ static void sparc_emit_func_epilog(ir_graph *irg)
 	be_emit_write_line();
 }
 
-/**
- * Block-walker:
- * TODO: Sets labels for control flow nodes (jump target).
- * Links control predecessors to there destination blocks.
- */
 static void sparc_gen_labels(ir_node *block, void *env)
 {
 	ir_node *pred;
@@ -821,51 +1114,47 @@ static void sparc_gen_labels(ir_node *block, void *env)
 	}
 }
 
-
-/**
- * Main driver
- */
-void sparc_gen_routine(const sparc_code_gen_t *cg, ir_graph *irg)
+void sparc_emit_routine(ir_graph *irg)
 {
-	ir_node **blk_sched;
-	ir_node *last_block = NULL;
-	ir_entity *entity     = get_irg_entity(irg);
-	int i, n;
-	(void) cg;
+	ir_entity  *entity = get_irg_entity(irg);
+	ir_node   **block_schedule;
+	size_t      i;
+	size_t      n;
 
-	be_gas_elf_type_char = '#';
+	be_gas_elf_type_char      = '#';
 	be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF_SPARC;
 
+	heights = heights_new(irg);
+
 	/* register all emitter functions */
 	sparc_register_emitters();
 	be_dbg_method_begin(entity);
 
 	/* create the block schedule. For now, we don't need it earlier. */
-	blk_sched = be_create_block_schedule(irg);
+	block_schedule = be_create_block_schedule(irg);
 
-	// emit function prolog
 	sparc_emit_func_prolog(irg);
-
-	// generate BLOCK labels
 	irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
 
-	// inject block scheduling links & emit code of each block
-	n = ARR_LEN(blk_sched);
-	for (i = 0; i < n;) {
-		ir_node *block, *next_bl;
-
-		block = blk_sched[i];
-		++i;
-		next_bl = i < n ? blk_sched[i] : NULL;
+	/* inject block scheduling links & emit code of each block */
+	n = ARR_LEN(block_schedule);
+	for (i = 0; i < n; ++i) {
+		ir_node *block      = block_schedule[i];
+		ir_node *next_block = i+1 < n ? block_schedule[i+1] : NULL;
+		set_irn_link(block, next_block);
+	}
 
-		/* set here the link. the emitter expects to find the next block here */
-		set_irn_link(block, next_bl);
-		sparc_gen_block(block, last_block);
-		last_block = block;
+	for (i = 0; i < n; ++i) {
+		ir_node *block = block_schedule[i];
+		if (block == get_irg_end_block(irg))
+			continue;
+		sparc_emit_block(block);
 	}
 
-	// emit function epilog
+	/* emit function epilog */
 	sparc_emit_func_epilog(irg);
+
+	heights_free(heights);
 }
 
 void sparc_init_emitter(void)