X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fscripts%2Fgenerate_new_opcodes.pl;h=8aedc397b4035aee59f80c2cc256e46c631bfc3f;hb=94f4a791ce59facde3a91d62c6cd6e4385843a1b;hp=ee29ed6963b7531b7f8d7f62632fc69921acf1ef;hpb=11107302f969142a3c0c833e970e8d8e434dd9be;p=libfirm diff --git a/ir/be/scripts/generate_new_opcodes.pl b/ir/be/scripts/generate_new_opcodes.pl index ee29ed696..8aedc397b 100755 --- a/ir/be/scripts/generate_new_opcodes.pl +++ b/ir/be/scripts/generate_new_opcodes.pl @@ -37,11 +37,15 @@ my $line_nr = 0; our $arch; our $additional_opcodes; our %nodes; +our %operands; our %cpu; our $default_attr_type; our $default_cmp_attr; +our $default_copy_attr; our %init_attr; our %compare_attr; +our %copy_attr; +our %reg_classes; # include spec file @@ -49,9 +53,9 @@ my $return; no strict "subs"; unless ($return = do $specfile) { - die "couldn't parse $specfile: $@" if $@; - die "couldn't do $specfile: $!" unless defined $return; - die "couldn't run $specfile" unless $return; + die "Fatal error: couldn't parse $specfile: $@" if $@; + die "Fatal error: couldn't do $specfile: $!" unless defined $return; + die "Fatal error: couldn't run $specfile" unless $return; } use strict "subs"; @@ -75,11 +79,37 @@ if(!defined(%compare_attr)) { ); } +# Operands are really just nodes with some special constraints, we check +# these and create new entries in the nodes hashmap +foreach my $op (keys(%operands)) { + my %operand = %{ $operands{"$op"} }; + my %op_node; + + # constraints + if(defined($operand{op_flags})) { die "Fatal error: operands can't have op_flags ($op)"; } + if(defined($operand{cmp_attr})) { die "Fatal error: cmp_attr not allowed for operands ($op)"; } + if(defined($operand{mode})) { die "Operand must not have a mode defined ($op)"; } + if(defined($operand{out_arity})) { die "operand must not have out_arity defined ($op)"; } + if(defined($nodes{$op})) { die "$op defined as operand and as node"; }; + + + foreach my $flag (keys(%operand)) { + $op_node{$flag} = $operand{$flag}; + } + $op_node{op_flags} = "O"; + $op_node{cmp_attr} = 'return 1;'; + $op_node{mode} = 'mode_ANY'; + + $nodes{$op} = \%op_node; +} + #print Dumper(%nodes); #print Dumper(%operands); # create c code file from specs +my @obst_limit_func; +my @obst_reg_reqs; my @obst_opvar; # stack for the "ir_op *op__ = NULL;" statements my @obst_get_opvar; # stack for the get_op__() functions my @obst_constructor; # stack for node constructor functions @@ -96,6 +126,32 @@ my $temp; my $n_opcodes = 0; # number of opcodes my $ARITY_VARIABLE = -1; my $ARITY_DYNAMIC = -2; +my %requirements = (); +my %limit_bitsets = (); +my %reg2class = (); +my %regclass2len = (); + +# build register->class hashes +foreach my $class_name (keys(%reg_classes)) { + my @class = @{ $reg_classes{"$class_name"} }; + my $old_classname = $class_name; + + pop(@class); + + $class_name = $arch."_".$class_name; + + my $idx = 0; + foreach (@class) { + $reg2class{$_->{name}} = { + "class" => $old_classname, + "index" => $idx + }; + $idx++; + } + + $regclass2len{$old_classname} = $idx; +} + # for registering additional opcodes $n_opcodes += $additional_opcodes if (defined($additional_opcodes)); @@ -150,7 +206,7 @@ foreach my $op (keys(%nodes)) { @outs = @{ $n{"outs"} }; if($out_arity >= 0 && scalar(@outs) != $out_arity) { - die "Op ${op} has different number of outs and out_arity\n"; + die "Fatal error: Op ${op} has different number of outs and out_arity\n"; } $num_outs = $#outs + 1; @@ -175,7 +231,7 @@ foreach my $op (keys(%nodes)) { @ins = @{ $n{"ins"} }; if($arity >= 0 && scalar(@ins) != $arity) { - die "Op ${op} has different number of ins and arity\n"; + die "Fatal error: Op ${op} has different number of ins and arity\n"; } push(@obst_proj, "\nenum n_$op {\n"); @@ -215,9 +271,13 @@ foreach my $op (keys(%nodes)) { push(@obst_cmp_attr, "static int cmp_attr_$op(ir_node *a, ir_node *b) {\n"); if($cmpcode =~ m/attr_a/) { push(@obst_cmp_attr, "\t${attr_type} *attr_a = get_irn_generic_attr(a);\n"); + } else { + push(@obst_cmp_attr, "\t(void) a;\n"); } if($cmpcode =~ m/attr_b/) { push(@obst_cmp_attr, "\t${attr_type} *attr_b = get_irn_generic_attr(b);\n"); + } else { + push(@obst_cmp_attr, "\t(void) b;\n"); } push(@obst_cmp_attr, "\t${cmpcode}\n"); push(@obst_cmp_attr, "}\n\n"); @@ -227,7 +287,7 @@ foreach my $op (keys(%nodes)) { if(defined($compare_attr{${attr_type}})) { $cmp_attr_func = $compare_attr{${attr_type}}; } else { - die "No compare function defined for ${attr_type} attributes."; + die "Fatal error: No compare function defined for ${attr_type} attributes."; } } @@ -345,38 +405,51 @@ foreach my $op (keys(%nodes)) { undef my @out; @out = @{ $req{"out"} } if exists(($req{"out"})); + for(my $idx = 0; $idx < $#in; $idx++) { + my $req = $in[$idx]; + generate_requirements($req, \%n, $op, $idx, 1); + } + for(my $idx = 0; $idx < $#out; $idx++) { + my $req = $out[$idx]; + generate_requirements($req, \%n, $op, $idx, 0); + } + if (@in) { if($arity >= 0 && scalar(@in) != $arity) { - die "Arity and number of in requirements don't match for ${op}\n"; + die "Fatal error: Arity and number of in requirements don't match for ${op}\n"; } $temp .= "\tstatic const arch_register_req_t *in_reqs[] =\n"; $temp .= "\t{\n"; for ($idx = 0; $idx <= $#in; $idx++) { - $temp .= "\t\t&".$op."_reg_req_in_".$idx.",\n"; + my $req = $in[$idx]; + my $reqstruct = generate_requirements($req, \%n, $op, $idx, 1); + $temp .= "\t\t& ${reqstruct},\n"; } $temp .= "\t};\n"; } else { if($arity > 0) { - die "need in requirements for ${op}\n"; + die "Fatal error: need in requirements for ${op}\n"; } $temp .= "\tstatic const arch_register_req_t **in_reqs = NULL;\n"; } if (@out) { if($out_arity >= 0 && scalar(@out) != $out_arity) { - die "Out-Arity and number of out requirements don't match for ${op}\n"; + die "Fatal error: Out-Arity and number of out requirements don't match for ${op}\n"; } $temp .= "\tstatic const arch_register_req_t *out_reqs[] =\n"; $temp .= "\t{\n"; for ($idx = 0; $idx <= $#out; $idx++) { - $temp .= "\t\t&".$op."_reg_req_out_".$idx.",\n"; + my $req = $out[$idx]; + my $reqstruct = generate_requirements($req, \%n, $op, $idx, 0); + $temp .= "\t\t& ${reqstruct},\n"; } $temp .= "\t};\n"; } else { if($out_arity > 0) { - die "need out requirements for ${op}\n"; + die "Fatal error: need out requirements for ${op}\n"; } $temp .= "\tstatic const arch_register_req_t **out_reqs = NULL;\n"; } @@ -430,7 +503,7 @@ foreach my $op (keys(%nodes)) { # lookup init function my $attr_init_code = $init_attr{$attr_type}; if(!defined($attr_init_code)) { - die "Couldn't find attribute initialisation code for type '${attr_type}'"; + die "Fatal error: Couldn't find attribute initialisation code for type '${attr_type}'"; } $temp .= "${attr_init_code}\n"; $temp .= "\n"; @@ -492,6 +565,13 @@ foreach my $op (keys(%nodes)) { if (defined($cmp_attr_func)) { push(@obst_new_irop, "\tops.node_cmp_attr = ${cmp_attr_func};\n"); } + my $copy_attr_func = $copy_attr{$attr_type}; + if (!defined($copy_attr_func)) { + $copy_attr_func = $default_copy_attr; + } + if (defined($copy_attr_func)) { + push(@obst_new_irop, "\tops.copy_attr = ${copy_attr_func};\n"); + } $n_opcodes++; my $n_res = $out_arity; @@ -513,9 +593,9 @@ push(@obst_enum_op, "\n} $arch\_opcodes;\n\n"); # emit the code -open(OUT, ">$target_c") || die("Could not open $target_c, reason: $!\n"); +open(OUT, ">$target_c") || die("Fatal error: Could not open $target_c, reason: $!\n"); -print OUT "#include \"gen_$arch\_regalloc_if_t.h\"\n\n"; +print OUT "#include \"gen_$arch\_regalloc_if.h\"\n\n"; print OUT @obst_cmp_attr; print OUT "\n"; print OUT @obst_opvar; @@ -583,6 +663,20 @@ int get_$arch\_irn_opcode(const ir_node *node) { ENDOFISIRN +print OUT <$target_h") || die("Could not open $target_h, reason: $!\n"); +open(OUT, ">$target_h") || die("Fatal error: Could not open $target_h, reason: $!\n"); my $creation_time = localtime(time()); my $tmp = uc($arch); @@ -688,7 +782,7 @@ sub translate_arity { } elsif ($arity == $ARITY_DYNAMIC) { return "oparity_dynamic"; } else { - die "Unknown arity $arity"; + die "Fatal error: Unknown arity $arity"; } } @@ -759,3 +853,356 @@ TP_SEARCH: foreach my $cur_type (keys(%cpu)) { return $ret; } + +sub mangle_requirements { + my $reqs = shift; + + my @alternatives = split(/ /, $reqs); + for(my $idx = 0; $idx < scalar(@alternatives); $idx++) { + $alternatives[$idx] =~ s/!/not_/g; + } + + @alternatives = sort @alternatives; + + my $name = join('_', @alternatives); + + return $name; +} + +### +# Determines whether $name is a specified register class or not. +# @return 1 if name is register class, 0 otherwise +### +sub is_reg_class { + my $name = shift; + return 1 if exists($reg_classes{"$name"}); + return 0; +} + +### +# Returns the register class for a given register. +# @return class or undef +### +sub get_reg_class { + my $reg = shift; + $reg = substr($reg, 1) if ($reg =~ /!.*/); + return $reg2class{"$reg"}{"class"} if (exists($reg2class{"$reg"})); + return undef; +} + +### +# Returns the index of a given register within it's register class. +# @return index or undef +### +sub get_reg_index { + my $reg = shift; + return $reg2class{"$reg"}{"index"} if (exists($reg2class{"$reg"})); + return undef; +} + +### +# Remember the register class for each index in the given requirements. +# We need this information for requirements like "in_sX" or "out_dX" +# @return array of classes corresponding to the requirement for each index +### +sub build_inout_idx_class { + my $n = shift; + my $op = shift; + my $is_in = shift; + my @idx_class; + + my $inout = ($is_in ? "in" : "out"); + + if (exists($n->{"reg_req"}{"$inout"})) { + my @reqs = @{ $n->{"reg_req"}{"$inout"} }; + + for (my $idx = 0; $idx <= $#reqs; $idx++) { + my $class = undef; + + if ($reqs[$idx] eq "none") { + $class = "none"; + } elsif (is_reg_class($reqs[$idx])) { + $class = $reqs[$idx]; + } else { + my @regs = split(/ /, $reqs[$idx]); +GET_CLASS: foreach my $reg (@regs) { + if ($reg =~ /!?(in|out)\_r\d+/ || $reg =~ /!in/) { + $class = "UNKNOWN_CLASS"; + } else { + $class = get_reg_class($reg); + if (!defined $class) { + die("Fatal error: Could not get ".uc($inout)." register class for '$op' pos $idx (reg $reg) ... exiting.\n"); + } else { + last GET_CLASS; + } # !defined class + } # if (reg =~ ... + } # foreach + } # if + + push(@idx_class, $class); + } # for + } # if + + return @idx_class; +} + +### +# Generates the function for a given $op and a given IN-index +# which returns a subset of possible register from a register class +# @return classname from which the subset is derived or undef and +# pos which corresponds to in/out reference position or undef +### +sub build_subset_class_func { + my $neg = undef; + my $class = undef; + my $has_limit = 0; + my $limit_name; + my $same_pos = undef; + my $different_pos = undef; + my $temp; + my @obst_init; + my @obst_limits; + my @obst_ignore; + my @limit_array; + my $limit_reqs; #used for name mangling + + # build function header + my $node = shift; + my $op = shift; + my $idx = shift; + my $is_in = shift; + my @regs = split(/ /, shift); + + my $outin = $is_in ? "out" : "in"; + + my @idx_class = build_inout_idx_class($node, $op, !$is_in); + + # set/unset registers +CHECK_REQS: foreach (@regs) { + if (/(!)?$outin\_r(\d+)/) { + if (($1 && defined($different_pos)) || (!$1 && defined($same_pos))) { + print STDERR "Multiple in/out references of same type in one requirement not allowed.\n"; + return (undef, undef, undef, undef); + } + + if ($1) { + $different_pos = $is_in ? -$2 : $2 - 1; + } else { + $same_pos = $is_in ? -$2 : $2 - 1; + } + + $class = $idx_class[$2 - 1]; + next CHECK_REQS; + } elsif (/!in/) { + $class = $idx_class[0]; + return ($class, "NULL", undef, 666); + } + + # check for negate + if (substr($_, 0, 1) eq "!") { + if (defined($neg) && $neg == 0) { + # we have seen a positiv constraint as first one but this one is negative + # this doesn't make sense + print STDERR "Mixed positive and negative constraints for the same slot are not allowed.\n"; + return (undef, undef, undef, undef); + } + + if (!defined($neg)) { + $has_limit = 1; + } + + $_ = substr($_, 1); # skip '!' + $neg = 1; + } else { + if (defined($neg) && $neg == 1) { + # we have seen a negative constraint as first one but this one is positive + # this doesn't make sense + print STDERR "Mixed positive and negative constraints for the same slot are not allowed.\n"; + return (undef, undef, undef, undef); + } + + $has_limit = 1; + $neg = 0; + } + + # check if register belongs to one of the given classes + $temp = get_reg_class($_); + if (!defined($temp)) { + print STDERR "Unknown register '$_'!\n"; + return (undef, undef, undef, undef); + } + + # set class + if (!defined($class)) { + $class = $temp; + } elsif ($class ne $temp) { + # all registers must belong to the same class + print STDERR "Registerclass mismatch. '$_' is not member of class '$class'.\n"; + return (undef, undef, undef, undef); + } + + # calculate position inside the initializer bitfield (only 32 bits per + # element) + my $regidx = get_reg_index($_); + my $arrayp = $regidx / 32; + push(@{$limit_array[$arrayp]}, $_); + $limit_reqs .= "$_ "; + } + + # don't allow ignore regs in negative constraints + if($neg) { + my @cur_class = @{ $reg_classes{"$class"} }; + for (my $idx = 0; $idx <= $#cur_class; $idx++) { + if (defined($cur_class[$idx]{"type"}) && ($cur_class[$idx]{"type"} & 4)) { + my $reg = $cur_class[$idx]{"name"}; + my $regix = get_reg_index($reg); + my $arrayp = $regix / 32; + push(@{$limit_array[$arrayp]}, $reg); + $limit_reqs .= "$reg "; + } + } + } + + if ($has_limit == 1) { + $limit_name = "${arch}_limit_".mangle_requirements($limit_reqs); + + if(defined($limit_bitsets{$limit_name})) { + return $limit_bitsets{$limit_name}; + } + + $limit_bitsets{$limit_name} = $limit_name; + + push(@obst_limit_func, "static const unsigned " . $limit_name . "[] = { "); + my $first = 1; + my $limitbitsetlen = $regclass2len{$class}; + my $limitarraylen = $limitbitsetlen / 32 + ($limitbitsetlen % 32 > 0 ? 1 : 0); + for(my $i = 0; $i < $limitarraylen; $i++) { + + my $limitarraypart = $limit_array[$i]; + if($first) { + $first = 0; + } else { + push(@obst_limit_func, ", "); + } + my $temp; + if($neg) { + $temp = "0xFFFFFFFF"; + } + foreach my $reg (@{$limitarraypart}) { + if($neg) { + $temp .= " & ~"; + } elsif(defined($temp)) { + $temp .= " | "; + } + $temp .= "BIT(REG_".uc(${reg}).")"; + } + if(defined($temp)) { + push(@obst_limit_func, "${temp}"); + } else { + push(@obst_limit_func, "0"); + } + } + push(@obst_limit_func, " };\n"); + } + + return ($class, $limit_name, $same_pos, $different_pos); +} + +### +# Generate register requirements structure +### +sub generate_requirements { + my $reqs = shift; + my $node = shift; + my $op = shift; + my $idx = shift; + my $is_in = shift; + + my $name = "${arch}_requirements_".mangle_requirements($reqs); + if(defined($requirements{$name})) { + return $name; + } + $requirements{$name} = $name; + + if ($reqs eq "none") { + push(@obst_reg_reqs, <