X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fscripts%2Fgenerate_new_opcodes.pl;h=836dc0da661e0208eb4099a62d414ce5fb703e4c;hb=2b1b974a2dda8a4dbc0716fbc8fb422fab6667ee;hp=8ac4163970ade4126e0f842385c27ead9599e4d9;hpb=e8d72d056f08154a28ce06671b893d3ad2e1fca0;p=libfirm diff --git a/ir/be/scripts/generate_new_opcodes.pl b/ir/be/scripts/generate_new_opcodes.pl index 8ac416397..836dc0da6 100755 --- a/ir/be/scripts/generate_new_opcodes.pl +++ b/ir/be/scripts/generate_new_opcodes.pl @@ -48,31 +48,38 @@ my $orig_op; my $arity; my $cmp_attr_func; my $temp; +my $n_opcodes = 2; # we have two additional border opcodes (lowest/highest) push(@obst_header, "void ".$arch."_create_opcodes(void);\n"); foreach my $op (keys(%nodes)) { my %n = %{ $nodes{"$op"} }; + # determine arity from in requirements + $arity = 0; + if (exists($n{"reg_req"}) && exists($n{"reg_req"}{"in"})) { + $arity = scalar(@{ $n{"reg_req"}{"in"} }); + } + $orig_op = $op; $op = $arch."_".$op; - $arity = $n{"arity"}; $temp = ""; push(@obst_opvar, "ir_op *op_$op = NULL;\n"); - push(@obst_get_opvar, "ir_op *get_op_$op(void) { return op_$op; }\n"); + push(@obst_get_opvar, "ir_op *get_op_$op(void) { return op_$op; }\n"); push(@obst_get_opvar, "int is_$op(const ir_node *n) { return get_irn_op(n) == op_$op; }\n\n"); push(@obst_is_archirn, "is_$op(node)"); + push(@obst_header, "ir_op *get_op_$op(void);\n"); push(@obst_header, "int is_$op(const ir_node *n);\n"); $cmp_attr_func = 0; # create compare attribute function if needed if (exists($n{"cmp_attr"})) { push(@obst_cmp_attr, "static int cmp_attr_$op(ir_node *a, ir_node *b) {\n"); - push(@obst_cmp_attr, " asmop_attr *attr_a = get_ia32_attr(a);\n"); - push(@obst_cmp_attr, " asmop_attr *attr_b = get_ia32_attr(b);\n"); + push(@obst_cmp_attr, " $arch\_attr_t *attr_a = get_$arch\_attr(a);\n"); + push(@obst_cmp_attr, " $arch\_attr_t *attr_b = get_$arch\_attr(b);\n"); push(@obst_cmp_attr, $n{"cmp_attr"}); push(@obst_cmp_attr, "}\n\n"); @@ -95,11 +102,11 @@ foreach my $op (keys(%nodes)) { $temp = "ir_node *new_rd_$op(dbg_info *db, ir_graph *irg, ir_node *block"; if (!exists($n{"args"}) || $n{"args"} =~ /^DEFAULT$/i) { # default args - if ($n{"arity"} !~ /^\d+$/) { + if ($arity !~ /^\d+$/) { print "DEFAULT args require numeric arity (0, 1, 2, ...)! Ignoring op $orig_op!\n"; next; } - for (my $i = 1; $i <= $n{"arity"}; $i++) { + for (my $i = 1; $i <= $arity; $i++) { $complete_args .= ", ir_node *op".$i; $arg_names .= ", op".$i; } @@ -120,13 +127,47 @@ foreach my $op (keys(%nodes)) { # emit constructor code if (!exists($n{"rd_constructor"}) || $n{"rd_constructor"} =~ /^DEFAULT$/i) { # default constructor - if ($n{"arity"} !~ /^\d+$/) { - print "DEFAULT rd_constructor requires arity 0,1,2 or 3! Ignoring op $orig_op!\n"; + if ($arity !~ /^\d+$/) { + print "DEFAULT rd_constructor requires numeric arity! Ignoring op $orig_op!\n"; next; } - $temp = " asmop_attr *attr;\n"; + $temp = " $arch\_attr_t *attr;\n"; $temp .= " ir_node *res;\n"; $temp .= " ir_node *in[$arity];\n" if ($arity > 0); + + undef my $in_req_var; + undef my $out_req_var; + + # set up static variables for requirements and registers + if (exists($n{"reg_req"})) { + my %req = %{ $n{"reg_req"} }; + my $idx; + + undef my @in; + @in = @{ $req{"in"} } if (exists($req{"in"})); + undef my @out; + @out = @{ $req{"out"} } if exists(($req{"out"})); + + if (@in) { + $in_req_var = "_in_req_$op"; + $temp .= " static const $arch\_register_req_t *".$in_req_var."[] =\n {\n"; + for ($idx = 0; $idx <= $#in; $idx++) { + $temp .= " ".$op."_reg_req_in_".$idx.",\n"; + } + $temp .= " };\n"; + } + + if (@out) { + $out_req_var = "_out_req_$op"; + + $temp .= " static const $arch\_register_req_t *".$out_req_var."[] =\n {\n"; + for ($idx = 0; $idx <= $#out; $idx++) { + $temp .= " ".$op."_reg_req_out_".$idx.",\n"; + } + $temp .= " };\n"; + } + } + $temp .= "\n"; $temp .= " if (!op_$op) {\n"; $temp .= " assert(0);\n"; @@ -136,49 +177,54 @@ foreach my $op (keys(%nodes)) { $temp .= " in[".($i - 1)."] = op".$i.";\n"; } $temp .= " res = new_ir_node(db, irg, block, op_$op, mode, $arity, ".($arity > 0 ? "in" : "NULL").");\n"; - $temp .= " set_ia32_pncode(res, -1);\n"; $temp .= " res = optimize_node(res);\n"; $temp .= " irn_vrfy_irg(res, irg);\n\n"; - # set register flags - $temp .= " attr = get_ia32_attr(res);\n\n"; + # set flags + $temp .= " attr = get_$arch\_attr(res);\n\n"; $temp .= " attr->flags = 0; /* clear flags */\n"; - if (!exists($n{"spill"}) || $n{"spill"} == 1) { - $temp .= " attr->flags |= arch_irn_flags_spillable; /* op is spillable */\n"; - } - if (exists($n{"remat"}) && $n{"remat"} == 1) { - $temp .= " attr->flags |= arch_irn_flags_rematerializable; /* op can be easily recalulated */\n"; + + if (exists($n{"irn_flags"})) { + foreach my $flag (split(/\|/, $n{"irn_flags"})) { + if ($flag eq "R") { + $temp .= " attr->flags |= arch_irn_flags_rematerializable; /* op can be easily recalulated */\n"; + } + elsif ($flag eq "N") { + $temp .= " attr->flags |= arch_irn_flags_dont_spill; /* op is NOT spillable */\n"; + } + elsif ($flag eq "I") { + $temp .= " attr->flags |= arch_irn_flags_ignore; /* ignore op for register allocation */\n"; + } + } } # allocate memory and set pointer to register requirements if (exists($n{"reg_req"})) { my %req = %{ $n{"reg_req"} }; - my $idx; undef my @in; @in = @{ $req{"in"} } if (exists($req{"in"})); undef my @out; @out = @{ $req{"out"} } if exists(($req{"out"})); + $temp .= "\n /* set IN register requirements */\n"; if (@in) { - $temp .= "\n /* allocate memory for IN register requirements and assigned registers */\n"; - $temp .= " attr->in_req = calloc(".($#in + 1).", sizeof(arch_register_req_t *)); /* space for in requirements */\n"; - for ($idx = 0; $idx <= $#in; $idx++) { - $temp .= " attr->in_req[$idx] = ".$op."_reg_req_in_".$idx.";\n"; - } + $temp .= " attr->in_req = ".$in_req_var.";\n"; + } + else { + $temp .= " attr->in_req = NULL;\n"; } + $temp .= "\n /* set OUT register requirements and get space for registers */\n"; if (@out) { - $temp .= "\n /* allocate memory for OUT register requirements and assigned registers */\n"; - $temp .= " attr->out_req = calloc(".($#out + 1).", sizeof(arch_register_req_t *)); /* space for out requirements */\n"; - $temp .= " attr->slots = calloc(".($#out + 1).", sizeof(arch_register_t *)); /* space for assigned registers */\n"; - for ($idx = 0; $idx <= $#out; $idx++) { - $temp .= " attr->out_req[$idx] = ".$op."_reg_req_out_".$idx.";\n"; - } - $temp .= " attr->n_res = ".($#out + 1).";\n"; + $temp .= " attr->out_req = ".$out_req_var.";\n"; + $temp .= " attr->slots = xcalloc(".($#out + 1).", sizeof(attr->slots[0]));\n"; + $temp .= " attr->n_res = ".($#out + 1).";\n"; } else { - $temp .= " attr->n_res = 0;\n"; + $temp .= " attr->out_req = NULL;\n"; + $temp .= " attr->slots = NULL;\n"; + $temp .= " attr->n_res = 0;\n"; } } @@ -196,7 +242,7 @@ foreach my $op (keys(%nodes)) { } # constructor creation # set default values for state and flags if not given - $n{"state"} = "pinned" if (! exists($n{"state"})); + $n{"state"} = "floats" if (! exists($n{"state"})); $n{"op_flags"} = "N" if (! exists($n{"op_flags"})); push(@obst_new_irop, "\n memset(&ops, 0, sizeof(ops));\n"); @@ -206,8 +252,9 @@ foreach my $op (keys(%nodes)) { push(@obst_new_irop, " ops.node_cmp_attr = cmp_attr_$op;\n"); } - $temp = " op_$op = new_ir_op(get_next_ir_opcode(), \"$op\", op_pin_state_".$n{"state"}.", ".$n{"op_flags"}; - $temp .= ", ".translate_arity($arity).", 0, sizeof(asmop_attr), &ops);\n"; + $n_opcodes++; + $temp = " op_$op = new_ir_op(cur_opcode++, \"$op\", op_pin_state_".$n{"state"}.", ".$n{"op_flags"}; + $temp .= ", ".translate_arity($arity).", 2, sizeof($arch\_attr_t), &ops);\n"; push(@obst_new_irop, $temp); } @@ -215,13 +262,33 @@ foreach my $op (keys(%nodes)) { open(OUT, ">$target_c") || die("Could not open $target_c, reason: $!\n"); +print OUT "#include \"gen_$arch\_regalloc_if_t.h\"\n\n"; print OUT @obst_cmp_attr; print OUT "\n"; print OUT @obst_opvar; print OUT "\n"; print OUT @obst_get_opvar; print OUT "\n"; -print OUT "int is_".$arch."_irn(const ir_node *node) {\n if (".join(" ||\n ", @obst_is_archirn).")\n return 1;\n else\n return 0;\n}\n\n"; + +print OUT< 0 && "missing opcode init"); + assert(ia32_opcode_end > 0 && "missing opcode init"); + + if (opc > ia32_opcode_start && opc < ia32_opcode_end) + return 1; + + return 0; +} + +ENDOFISIRN + print OUT @obst_constructor; print OUT<$target_h") || die("Could not open $target_h, reason: $!\n"); +print OUT "int is_$arch\_irn(const ir_node *node);\n"; print OUT @obst_header; close(OUT);