X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fscripts%2Fgenerate_new_opcodes.pl;h=1a634a6e37c5ba6b7623fdcf873022de63c0566a;hb=93da909d12b7bec51aa36ee5f05966c331f90fb9;hp=0b0680181012335bb26f045b8f970598d1c66727;hpb=590df14827a8ff5a5b53c506ac654876107bd8c9;p=libfirm

diff --git a/ir/be/scripts/generate_new_opcodes.pl b/ir/be/scripts/generate_new_opcodes.pl
index 0b0680181..1a634a6e3 100755
--- a/ir/be/scripts/generate_new_opcodes.pl
+++ b/ir/be/scripts/generate_new_opcodes.pl
@@ -1,7 +1,7 @@
 #!/usr/bin/perl -w
 
 #
-# Copyright (C) 1995-2007 University of Karlsruhe.  All right reserved.
+# Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
 #
 # This file is part of libFirm.
 #
@@ -158,7 +158,7 @@ foreach my $class_name (keys(%reg_classes)) {
 # for registering additional opcodes
 $n_opcodes += $additional_opcodes if (defined($additional_opcodes));
 
-push(@obst_header, "void ".$arch."_create_opcodes(void);\n");
+push(@obst_header, "void ".$arch."_create_opcodes(const arch_irn_ops_t *be_ops);\n");
 
 push(@obst_enum_op, "typedef enum _$arch\_opcodes {\n");
 foreach my $op (keys(%nodes)) {
@@ -265,6 +265,12 @@ foreach my $op (keys(%nodes)) {
 		$attr_type = $default_attr_type;
 	}
 
+	# determine hash function
+	my $hash_func;
+	if (exists($n{"hash_func"})) {
+		$hash_func = $n{"hash_func"};
+	}
+
 	# determine compare function
 	my $cmp_attr_func;
 	if (exists($n{"cmp_attr"})) {
@@ -562,6 +568,7 @@ foreach my $op (keys(%nodes)) {
 
 
 	push(@obst_new_irop, "\n\tmemset(&ops, 0, sizeof(ops));\n");
+	push(@obst_new_irop, "\tops.be_ops        = be_ops;\n");
 	push(@obst_new_irop, "\tops.dump_node     = $arch\_dump_node;\n");
 
 	if (defined($cmp_attr_func)) {
@@ -574,6 +581,9 @@ foreach my $op (keys(%nodes)) {
 	if (defined($copy_attr_func)) {
 		push(@obst_new_irop, "\tops.copy_attr = ${copy_attr_func};\n");
 	}
+	if (defined($hash_func)) {
+		push(@obst_new_irop, "\tops.hash = ${hash_func};\n");
+	}
 
 	$n_opcodes++;
 	my $n_res = $out_arity;
@@ -583,10 +593,9 @@ foreach my $op (keys(%nodes)) {
 	$temp  = "\top_$op = new_ir_op(cur_opcode + iro_$op, \"$op\", op_pin_state_".$n{"state"}.", ".$n{"op_flags"};
 	$temp .= "|M, ".translate_arity($arity).", 0, sizeof(${attr_type}), &ops);\n";
 	push(@obst_new_irop, $temp);
-	push(@obst_new_irop, "\tset_op_tag(op_$op, &$arch\_op_tag);\n");
+	push(@obst_new_irop, "\tset_op_tag(op_$op, $arch\_op_tag);\n");
 	if(defined($default_op_attr_type)) {
-		push(@obst_new_irop, "\tattr = ($default_op_attr_type *) xmalloc(sizeof(attr[0]));\n");
-		push(@obst_new_irop, "\tmemset(attr, 0, sizeof(attr[0]));\n");
+		push(@obst_new_irop, "\tattr = &attrs[iro_$op];\n");
 		if(defined($n{op_attr_init})) {
 			push(@obst_new_irop, "\t".$n{op_attr_init}."\n");
 		}
@@ -644,7 +653,7 @@ if (length($arch) >= 4) {
 print OUT<<ENDOFISIRN;
 
 /** A tag for the $arch opcodes. Note that the address is used as a tag value, NOT the FOURCC code. */
-static unsigned $arch\_op_tag = FOURCC('$a', '$b', '$c', '$d');
+#define $arch\_op_tag FOURCC('$a', '$b', '$c', '$d')
 
 /** Return the opcode number of the first $arch opcode. */
 int get_$arch\_opcode_first(void) {
@@ -658,7 +667,7 @@ int get_$arch\_opcode_last(void) {
 
 /** Return 1 if the given opcode is a $arch machine op, 0 otherwise */
 int is_$arch\_op(const ir_op *op) {
-	return get_op_tag(op) == &$arch\_op_tag;
+	return get_op_tag(op) == $arch\_op_tag;
 }
 
 /** Return 1 if the given node is a $arch machine node, 0 otherwise */
@@ -695,7 +704,7 @@ print OUT<<ENDOFMAIN;
  * Creates the $arch specific Firm machine operations
  * needed for the assembler irgs.
  */
-void $arch\_create_opcodes(void) {
+void $arch\_create_opcodes(const arch_irn_ops_t *be_ops) {
 #define N   irop_flag_none
 #define L   irop_flag_labeled
 #define C   irop_flag_commutative
@@ -708,15 +717,18 @@ void $arch\_create_opcodes(void) {
 #define K   irop_flag_keep
 #define M   irop_flag_machine
 #define O   irop_flag_machine_op
+#define NB  irop_flag_dump_noblock
+#define NI  irop_flag_dump_noinput
 #define R   (irop_flag_user << 0)
 
 	ir_op_ops  ops;
 	int        cur_opcode;
 	static int run_once = 0;
+	int        i;
 ENDOFMAIN
 
-	if(defined($default_op_attr_type)) {
-		print OUT "\t$default_op_attr_type *attr;\n";
+	if (defined($default_op_attr_type)) {
+		print OUT "\t$default_op_attr_type *attr, *attrs;\n";
 	}
 
 print OUT<<ENDOFMAIN;
@@ -725,11 +737,23 @@ print OUT<<ENDOFMAIN;
 		return;
 	run_once = 1;
 
+	/* we handle all middleend nodes as well that have no other handler */
+	for (i = 0; i <= iro_Last; ++i) {
+		ir_op *op      = get_irp_opcode(i);
+		if (op->ops.be_ops == NULL)
+			op->ops.be_ops = be_ops;
+	}
+
 	cur_opcode = get_next_ir_opcodes(iro_$arch\_last);
 
 	$arch\_opcode_start = cur_opcode;
 ENDOFMAIN
 
+	if (defined($default_op_attr_type)) {
+		print OUT "\tattrs = xmalloc(sizeof(attr[0]) * iro_$arch\_last);\n";
+		print OUT "\tmemset(attrs, 0, sizeof(attr[0]) * iro_$arch\_last);\n";
+	}
+
 print OUT @obst_new_irop;
 print OUT "\n";
 print OUT "\t$arch\_register_additional_opcodes(cur_opcode);\n" if (defined($additional_opcodes));
@@ -1160,21 +1184,6 @@ sub generate_requirements {
 	0                             /* different pos */
 };
 
-EOF
-	} elsif ($reqs =~ /^new_reg_(.*)$/) {
-		if(!is_reg_class($1)) {
-			die "$1 is not a register class in requirements for $op\n";
-		}
-		$class  = $1;
-		$result = <<EOF;
-{
-	arch_register_req_type_should_be_different_from_all,
-	& ${arch}_reg_classes[CLASS_${arch}_${class}],
-	NULL,        /* limit bitset */
-	0,           /* same pos */
-	0            /* different pos */
-};
-
 EOF
 	} elsif (is_reg_class($reqs)) {
 		$class  = $reqs;
@@ -1205,7 +1214,7 @@ EOF
 			push(@req_type_mask, "arch_register_req_type_should_be_same");
 		}
 		if ($different_pos != 0) {
-			push(@req_type_mask, "arch_register_req_type_should_be_different");
+			push(@req_type_mask, "arch_register_req_type_must_be_different");
 		}
 		my $reqtype      = join(" | ", @req_type_mask);