X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fmips%2Fmips_new_nodes.c;h=2f8f1913d019a1a0f9b6a80b1edb3dea87d733ed;hb=aebc3c0c980bcc0536ffdc4cb2a545961b5a8b81;hp=fccfa47c4d12bb06823bf016994bef7a04fd14b8;hpb=1d30ae688facad1bdd42c9dee802201c1e68ee8c;p=libfirm diff --git a/ir/be/mips/mips_new_nodes.c b/ir/be/mips/mips_new_nodes.c index fccfa47c4..2f8f1913d 100644 --- a/ir/be/mips/mips_new_nodes.c +++ b/ir/be/mips/mips_new_nodes.c @@ -1,18 +1,34 @@ +/* + * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved. + * + * This file is part of libFirm. + * + * This file may be distributed and/or modified under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation and appearing in the file LICENSE.GPL included in the + * packaging of this file. + * + * Licensees holding valid libFirm Professional Edition licenses may use + * this file in accordance with the libFirm Commercial License. + * Agreement provided with the Software. + * + * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE + * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE. + */ + /** - * This file implements the creation of the achitecture specific firm opcodes - * and the coresponding node constructors for the mips assembler irg. - * $Id$ + * @file + * @brief This file implements the creation of the achitecture specific firm + * opcodes and the coresponding node constructors for the mips + * assembler irg. + * @author Matthias Braun, Mehdi + * @version $Id$ */ #ifdef HAVE_CONFIG_H #include "config.h" #endif -#ifdef _WIN32 -#include -#else -#include -#endif - #include #include "irprog_t.h" @@ -25,8 +41,9 @@ #include "firm_common_t.h" #include "irvrfy_t.h" #include "irprintf.h" +#include "xmalloc.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "mips_nodes_attr.h" #include "mips_new_nodes.h" @@ -45,77 +62,47 @@ * |_| ***********************************************************************************/ -/** - * Returns a string containing the names of all registers within the limited bitset - */ -static char *get_limited_regs(const arch_register_req_t *req, char *buf, int max) { - bitset_t *bs = bitset_alloca(req->cls->n_regs); - char *p = buf; - int size = 0; - int i, cnt; - - req->limited(NULL, bs); - - for (i = 0; i < req->cls->n_regs; i++) { - if (bitset_is_set(bs, i)) { - cnt = snprintf(p, max - size, " %s", req->cls->regs[i].name); - if (cnt < 0) { - fprintf(stderr, "dumper problem, exiting\n"); - exit(1); - } - - p += cnt; - size += cnt; - - if (size >= max) - break; - } - } - - return buf; -} - /** * Dumps the register requirements for either in or out. */ -static void dump_reg_req(FILE *F, ir_node *n, const mips_register_req_t **reqs, int inout) { +static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs, int inout) { char *dir = inout ? "out" : "in"; int max = inout ? get_mips_n_res(n) : get_irn_arity(n); - char *buf = alloca(1024); + char buf[1024]; int i; - memset(buf, 0, 1024); + memset(buf, 0, sizeof(buf)); if (reqs) { for (i = 0; i < max; i++) { fprintf(F, "%sreq #%d =", dir, i); - if (reqs[i]->req.type == arch_register_req_type_none) { + if (reqs[i]->type == arch_register_req_type_none) { fprintf(F, " n/a"); } - if (reqs[i]->req.type & arch_register_req_type_normal) { - fprintf(F, " %s", reqs[i]->req.cls->name); + if (reqs[i]->type & arch_register_req_type_normal) { + fprintf(F, " %s", reqs[i]->cls->name); } - if (reqs[i]->req.type & arch_register_req_type_limited) { - fprintf(F, " %s", get_limited_regs(&reqs[i]->req, buf, 1024)); + if (reqs[i]->type & arch_register_req_type_limited) { + fprintf(F, " %s", + arch_register_req_format(buf, sizeof(buf), reqs[i], n)); } - if (reqs[i]->req.type & arch_register_req_type_should_be_same) { - ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->same_pos)); + if (reqs[i]->type & arch_register_req_type_should_be_same) { + ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same)); } - if (reqs[i]->req.type & arch_register_req_type_should_be_different) { - ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->different_pos)); + if (reqs[i]->type & arch_register_req_type_should_be_different) { + ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different)); } fprintf(F, "\n"); } fprintf(F, "\n"); - } - else { + } else { fprintf(F, "%sreq = N/A\n", dir); } } @@ -134,7 +121,7 @@ static int mips_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { int i; mips_attr_t *attr; char buf[64]; - const mips_register_req_t **reqs; + const arch_register_req_t **reqs; const arch_register_t **slots; switch (reason) { @@ -259,7 +246,7 @@ mips_attr_t *get_mips_attr(const ir_node *node) { /** * Returns the argument register requirements of a mips node. */ -const mips_register_req_t **get_mips_in_req_all(const ir_node *node) { +const arch_register_req_t **get_mips_in_req_all(const ir_node *node) { mips_attr_t *attr = get_mips_attr(node); return attr->in_req; } @@ -267,7 +254,7 @@ const mips_register_req_t **get_mips_in_req_all(const ir_node *node) { /** * Returns the result register requirements of an mips node. */ -const mips_register_req_t **get_mips_out_req_all(const ir_node *node) { +const arch_register_req_t **get_mips_out_req_all(const ir_node *node) { mips_attr_t *attr = get_mips_attr(node); return attr->out_req; } @@ -275,7 +262,7 @@ const mips_register_req_t **get_mips_out_req_all(const ir_node *node) { /** * Returns the argument register requirement at position pos of an mips node. */ -const mips_register_req_t *get_mips_in_req(const ir_node *node, int pos) { +const arch_register_req_t *get_mips_in_req(const ir_node *node, int pos) { mips_attr_t *attr = get_mips_attr(node); return attr->in_req[pos]; } @@ -283,7 +270,7 @@ const mips_register_req_t *get_mips_in_req(const ir_node *node, int pos) { /** * Returns the result register requirement at position pos of an mips node. */ -const mips_register_req_t *get_mips_out_req(const ir_node *node, int pos) { +const arch_register_req_t *get_mips_out_req(const ir_node *node, int pos) { mips_attr_t *attr = get_mips_attr(node); return attr->out_req[pos]; } @@ -291,7 +278,7 @@ const mips_register_req_t *get_mips_out_req(const ir_node *node, int pos) { /** * Sets the OUT register requirements at position pos. */ -void set_mips_req_out(ir_node *node, const mips_register_req_t *req, int pos) { +void set_mips_req_out(ir_node *node, const arch_register_req_t *req, int pos) { mips_attr_t *attr = get_mips_attr(node); attr->out_req[pos] = req; } @@ -299,7 +286,7 @@ void set_mips_req_out(ir_node *node, const mips_register_req_t *req, int pos) { /** * Sets the IN register requirements at position pos. */ -void set_mips_req_in(ir_node *node, const mips_register_req_t *req, int pos) { +void set_mips_req_in(ir_node *node, const arch_register_req_t *req, int pos) { mips_attr_t *attr = get_mips_attr(node); attr->in_req[pos] = req; } @@ -386,8 +373,10 @@ int get_mips_n_res(const ir_node *node) { /** * Initializes the nodes attributes. */ -void init_mips_attributes(ir_node *node, arch_irn_flags_t flags, const mips_register_req_t **in_reqs, - const mips_register_req_t **out_reqs, int n_res) +void init_mips_attributes(ir_node *node, arch_irn_flags_t flags, const arch_register_req_t **in_reqs, + const arch_register_req_t **out_reqs, + const be_execution_unit_t ***execution_units, + int n_res, unsigned latency) { mips_attr_t *attr = get_mips_attr(node); @@ -440,7 +429,7 @@ ir_node *mips_transform_##srcnode(ir_node* node) \ mips_attr_t *attr, *op_attr = get_mips_attr(op2); \ long val = get_tarval_long(op_attr->tv); \ result = new_rd_mips_##inode(get_irn_dbg_info(node), get_irn_irg(node), get_nodes_block(node), \ - op1, get_irn_mode(node)); \ + op1); \ attr = get_mips_attr(result); \ attr->tv = new_tarval_from_long(val, get_mode_sign(get_irn_mode(node)) ? mode_Hs : mode_Hu); \ return result; \ @@ -450,7 +439,7 @@ ir_node *mips_transform_##srcnode(ir_node* node) \ mips_attr_t *attr, *op_attr = get_mips_attr(op1); \ long val = get_tarval_long(op_attr->tv); \ result = new_rd_mips_##inode(get_irn_dbg_info(node), get_irn_irg(node), get_nodes_block(node), \ - op2, get_irn_mode(node)); \ + op2); \ attr = get_mips_attr(result); \ attr->tv = new_tarval_from_long(val, get_mode_sign(get_irn_mode(node)) ? mode_Hs : mode_Hu); \ return result; \ @@ -459,7 +448,7 @@ ir_node *mips_transform_##srcnode(ir_node* node) \ return node; \ } -MIPS_MAKE_IFOLDING_TRANSFORM(add, addi, 1) +MIPS_MAKE_IFOLDING_TRANSFORM(addu, addiu, 1) MIPS_MAKE_IFOLDING_TRANSFORM(and, andi, 1) MIPS_MAKE_IFOLDING_TRANSFORM(or, ori, 1) MIPS_MAKE_IFOLDING_TRANSFORM(sra, srai, 0) @@ -469,7 +458,7 @@ MIPS_MAKE_IFOLDING_TRANSFORM(sr, sri, 0) MIPS_MAKE_IFOLDING_TRANSFORM(slt, slti, 0) void mips_init_opcode_transforms(void) { - op_mips_add->ops.transform_node = mips_transform_add; + op_mips_addu->ops.transform_node = mips_transform_addu; op_mips_and->ops.transform_node = mips_transform_and; op_mips_or->ops.transform_node = mips_transform_or; op_mips_sra->ops.transform_node = mips_transform_sra;