X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fmips%2Fbearch_mips.c;h=cf90a8048e24c67a1618c0188558a125a331b9db;hb=208809bd4713035389ccb0575b2592f52db6816b;hp=6371ec8145cd141bb88118843bc7fd1f4e8765c3;hpb=21ae21f548b3d01d84d48820bee9429a608c621e;p=libfirm

diff --git a/ir/be/mips/bearch_mips.c b/ir/be/mips/bearch_mips.c
index 6371ec814..cf90a8048 100644
--- a/ir/be/mips/bearch_mips.c
+++ b/ir/be/mips/bearch_mips.c
@@ -26,6 +26,7 @@
 #include "../besched_t.h"
 #include "../be.h"
 #include "../beabi.h"
+#include "../bemachine.h"
 
 #include "bearch_mips_t.h"
 
@@ -227,7 +228,7 @@ static arch_irn_flags_t mips_get_flags(const void *self, const ir_node *irn) {
 	return 0;
 }
 
-static entity *mips_get_frame_entity(const void *self, const ir_node *irn) {
+static ir_entity *mips_get_frame_entity(const void *self, const ir_node *irn) {
 	if(is_mips_load_r(irn) || is_mips_store_r(irn)) {
 		mips_attr_t *attr = get_mips_attr(irn);
 
@@ -237,6 +238,12 @@ static entity *mips_get_frame_entity(const void *self, const ir_node *irn) {
 	return NULL;
 }
 
+static void mips_set_frame_entity(const void *self, ir_node *irn, ir_entity *ent) {
+	mips_attr_t *attr  = get_mips_attr(irn);
+	assert(is_mips_load_r(irn) || is_mips_store_r(irn));
+	attr->stack_entity = ent;
+}
+
 /**
  * This function is called by the generic backend to correct offsets for
  * nodes accessing the stack.
@@ -248,6 +255,10 @@ static void mips_set_frame_offset(const void *self, ir_node *irn, int offset) {
 	attr->stack_entity_offset = offset;
 }
 
+static int mips_get_sp_bias(const void *self, const ir_node *irn) {
+	return 0;
+}
+
 /* fill register allocator interface */
 
 static const arch_irn_ops_if_t mips_irn_ops_if = {
@@ -257,7 +268,13 @@ static const arch_irn_ops_if_t mips_irn_ops_if = {
 	mips_classify,
 	mips_get_flags,
 	mips_get_frame_entity,
-	mips_set_frame_offset
+	mips_set_frame_entity,
+	mips_set_frame_offset,
+	mips_get_sp_bias,
+	NULL,    /* get_inverse             */
+	NULL,    /* get_op_estimated_cost   */
+	NULL,    /* possible_memory_operand */
+	NULL,    /* perform_memory_operand  */
 };
 
 mips_irn_ops_t mips_irn_ops = {
@@ -447,10 +464,11 @@ static void mips_prepare_graph(void *self) {
 /**
  * Called immediately before emit phase.
  */
-static void mips_finish_irg(ir_graph *irg, mips_code_gen_t *cg) {
-	/* TODO: - fix offsets for nodes accessing stack
-			 - ...
-	*/
+static void mips_finish_irg(void *self) {
+	mips_code_gen_t *cg = self;
+	ir_graph        *irg = cg->irg;
+
+	dump_ir_block_graph_sched(irg, "-mips-finished");
 }
 
 
@@ -486,8 +504,6 @@ static void mips_emit_and_done(void *self) {
 		cg->emit_decls = 0;
 	}
 
-	mips_finish_irg(irg, cg);
-	dump_ir_block_graph_sched(irg, "-mips-finished");
 	mips_gen_routine(out, irg, cg);
 
 	cur_reg_set = NULL;
@@ -501,22 +517,24 @@ static void mips_emit_and_done(void *self) {
 	free(cg);
 }
 
-static void *mips_cg_init(const be_irg_t *birg);
+static void *mips_cg_init(be_irg_t *birg);
 
 static const arch_code_generator_if_t mips_code_gen_if = {
 	mips_cg_init,
 	NULL,                /* before abi introduce */
 	mips_prepare_graph,
+	NULL,                /* spill */
 	mips_before_sched,   /* before scheduling hook */
 	mips_before_ra,      /* before register allocation hook */
 	mips_after_ra,
+	mips_finish_irg,
 	mips_emit_and_done
 };
 
 /**
  * Initializes the code generator.
  */
-static void *mips_cg_init(const be_irg_t *birg) {
+static void *mips_cg_init(be_irg_t *birg) {
 	mips_isa_t      *isa = (mips_isa_t *)birg->main_env->arch_env->isa;
 	mips_code_gen_t *cg  = xmalloc(sizeof(*cg));
 
@@ -750,9 +768,6 @@ static void mips_abi_epilogue(void *self, ir_node *block, ir_node **mem, pmap *r
 	int initial_frame_size = env->debug ? 24 : 4;
 	int fp_save_offset = env->debug ? 16 : 0;
 
-	// restore sp
-	//sp = be_new_IncSP(&mips_gp_regs[REG_SP], irg, block, sp, *mem, BE_STACK_FRAME_SIZE, be_stack_dir_against);
-
 	// copy fp to sp
 	sp = new_rd_mips_move(dbg, irg, block, fp, mode_Iu);
 	mips_set_irn_reg(NULL, sp, &mips_gp_regs[REG_SP]);
@@ -783,11 +798,11 @@ static ir_type *mips_abi_get_between_type(void *self) {
 
 	static ir_type *debug_between_type = NULL;
 	static ir_type *opt_between_type = NULL;
-	static entity *old_fp_ent    = NULL;
+	static ir_entity *old_fp_ent    = NULL;
 
 	if(env->debug && debug_between_type == NULL) {
-		entity *a0_ent, *a1_ent, *a2_ent, *a3_ent;
-		entity *ret_addr_ent;
+		ir_entity *a0_ent, *a1_ent, *a2_ent, *a3_ent;
+		ir_entity *ret_addr_ent;
 		ir_type *ret_addr_type = new_type_primitive(new_id_from_str("return_addr"), mode_P);
 		ir_type *old_fp_type   = new_type_primitive(new_id_from_str("fp"), mode_P);
 		ir_type *old_param_type = new_type_primitive(new_id_from_str("param"), mode_Iu);
@@ -800,21 +815,21 @@ static ir_type *mips_abi_get_between_type(void *self) {
 		old_fp_ent             = new_entity(debug_between_type, new_id_from_str("old_fp"), old_fp_type);
 		ret_addr_ent           = new_entity(debug_between_type, new_id_from_str("ret_addr"), ret_addr_type);
 
-		set_entity_offset_bytes(a0_ent, 0);
-		set_entity_offset_bytes(a1_ent, 4);
-		set_entity_offset_bytes(a2_ent, 8);
-		set_entity_offset_bytes(a3_ent, 12);
-		set_entity_offset_bytes(old_fp_ent, 16);
-		set_entity_offset_bytes(ret_addr_ent, 20);
+		set_entity_offset(a0_ent, 0);
+		set_entity_offset(a1_ent, 4);
+		set_entity_offset(a2_ent, 8);
+		set_entity_offset(a3_ent, 12);
+		set_entity_offset(old_fp_ent, 16);
+		set_entity_offset(ret_addr_ent, 20);
 
 		set_type_size_bytes(debug_between_type, 24);
 	} else if(!env->debug && opt_between_type == NULL) {
 		ir_type *old_fp_type   = new_type_primitive(new_id_from_str("fp"), mode_P);
-		entity *old_fp_ent;
+		ir_entity *old_fp_ent;
 
 		opt_between_type       = new_type_class(new_id_from_str("mips_between_type"));
 		old_fp_ent             = new_entity(opt_between_type, new_id_from_str("old_fp"), old_fp_type);
-		set_entity_offset_bytes(old_fp_ent, 0);
+		set_entity_offset(old_fp_ent, 0);
 		set_type_size_bytes(opt_between_type, 4);
 	}
 
@@ -917,6 +932,42 @@ static int mips_get_reg_class_alignment(const void *self, const arch_register_cl
 	return get_mode_size_bytes(mode);
 }
 
+static const be_execution_unit_t ***mips_get_allowed_execution_units(const void *self, const ir_node *irn) {
+	/* TODO */
+	assert(0);
+	return NULL;
+}
+
+static const be_machine_t *mips_get_machine(const void *self) {
+	/* TODO */
+	assert(0);
+	return NULL;
+}
+
+/**
+ * Returns the libFirm configuration parameter for this backend.
+ */
+static const backend_params *mips_get_libfirm_params(void) {
+	static arch_dep_params_t ad = {
+		1,  /* allow subs */
+		0,	/* Muls are fast enough on Mips */
+		31, /* shift would be ok */
+		0,  /* no Mulhs */
+		0,  /* no Mulhu */
+		32, /* Mulhs & Mulhu available for 32 bit */
+	};
+	static backend_params p = {
+		NULL,  /* no additional opcodes */
+		NULL,  /* will be set later */
+		1,     /* need dword lowering */
+		NULL,  /* but yet no creator function */
+		NULL,  /* context for create_intrinsic_fkt */
+	};
+
+	p.dep_param = &ad;
+	return &p;
+}
+
 #ifdef WITH_LIBCORE
 static void mips_register_options(lc_opt_entry_t *ent)
 {
@@ -933,7 +984,11 @@ const arch_isa_if_t mips_isa_if = {
 	mips_get_irn_handler,
 	mips_get_code_generator_if,
 	mips_get_list_sched_selector,
+	mips_get_ilp_sched_selector,
 	mips_get_reg_class_alignment,
+	mips_get_libfirm_params,
+	mips_get_allowed_execution_units,
+	mips_get_machine,
 #ifdef WITH_LIBCORE
 	mips_register_options
 #endif