X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fmips%2Fbearch_mips.c;h=585d68c0aeb9cb9d1f363d21a8c3e7de904a5900;hb=64723d1bd8ace74ca5f0018db8655f2a1f443532;hp=4346ffb0d4dcc18b0acbcd28dd08ead891cc1b8c;hpb=6d660d16232bfc516269d34a21fed1a08fb6e898;p=libfirm diff --git a/ir/be/mips/bearch_mips.c b/ir/be/mips/bearch_mips.c index 4346ffb0d..585d68c0a 100644 --- a/ir/be/mips/bearch_mips.c +++ b/ir/be/mips/bearch_mips.c @@ -42,12 +42,12 @@ #include "bitset.h" #include "debug.h" -#include "../bearch_t.h" -#include "../benode_t.h" +#include "../bearch.h" +#include "../benode.h" #include "../belower.h" -#include "../besched_t.h" +#include "../besched.h" #include "../beblocksched.h" -#include "../beirg_t.h" +#include "../beirg.h" #include "be.h" #include "../beabi.h" #include "../bemachine.h" @@ -82,89 +82,9 @@ static set *cur_reg_set = NULL; * |___/ **************************************************/ -/** - * Return register requirements for a mips node. - * If the node returns a tuple (mode_T) then the proj's - * will be asked for this information. - */ -static const -arch_register_req_t *mips_get_irn_reg_req(const ir_node *node, int pos) -{ - long node_pos = pos == -1 ? 0 : pos; - ir_mode *mode = get_irn_mode(node); - - if (is_Block(node) || mode == mode_X || mode == mode_M) { - return arch_no_register_req; - } - - if (mode == mode_T && pos < 0) { - return arch_no_register_req; - } - - if (is_Proj(node)) { - /* in case of a proj, we need to get the correct OUT slot */ - /* of the node corresponding to the proj number */ - if (pos == -1) { - node_pos = mips_translate_proj_pos(node); - } - else { - node_pos = pos; - } - - node = skip_Proj_const(node); - } - - /* get requirements for our own nodes */ - if (is_mips_irn(node)) { - const arch_register_req_t *req; - if (pos >= 0) { - req = get_mips_in_req(node, pos); - } else { - req = get_mips_out_req(node, node_pos); - } - - return req; - } - - /* unknown should be translated by now */ - assert(!is_Unknown(node)); - - return arch_no_register_req; -} - -static void mips_set_irn_reg(ir_node *irn, const arch_register_t *reg) -{ - int pos = 0; - - if (is_Proj(irn)) { - - if (get_irn_mode(irn) == mode_X) { - return; - } - - pos = mips_translate_proj_pos(irn); - irn = skip_Proj(irn); - } - - if (is_mips_irn(irn)) { - const arch_register_t **slots; - - slots = get_mips_slots(irn); - slots[pos] = reg; - } else { - /* here we set the registers for the Phi nodes */ - mips_set_firm_reg(irn, reg, cur_reg_set); - } -} - static arch_irn_class_t mips_classify(const ir_node *irn) { - irn = skip_Proj_const(irn); - - if (is_cfop(irn)) { - return arch_irn_class_branch; - } - + (void) irn; return 0; } @@ -239,7 +159,7 @@ static int mips_get_sp_bias(const ir_node *irn) /* fill register allocator interface */ static const arch_irn_ops_t mips_irn_ops = { - mips_get_irn_reg_req, + get_mips_in_req, mips_classify, mips_get_frame_entity, mips_set_frame_entity, @@ -391,6 +311,7 @@ static mips_isa_t mips_isa_template = { &mips_isa_if, &mips_gp_regs[REG_SP], &mips_gp_regs[REG_FP], + &mips_reg_classes[CLASS_mips_gp], -1, /* stack direction */ 2, /* power of two stack alignment for calls, 2^2 == 4 */ NULL, /* main environment */ @@ -420,12 +341,6 @@ static arch_env_t *mips_init(FILE *file_handle) { mips_create_opcodes(&mips_irn_ops); // mips_init_opcode_transforms(); - /* we mark referenced global entities, so we can only emit those which - * are actually referenced. (Note: you mustn't use the type visited flag - * elsewhere in the backend) - */ - inc_master_type_visited(); - return &isa->arch_env; } @@ -436,22 +351,19 @@ static void mips_done(void *self) { mips_isa_t *isa = self; - be_gas_emit_decls(isa->arch_env.main_env, 1); + be_gas_emit_decls(isa->arch_env.main_env); be_emit_exit(); free(isa); } -static unsigned mips_get_n_reg_class(const void *self) +static unsigned mips_get_n_reg_class(void) { - (void) self; return N_CLASSES; } -static const arch_register_class_t *mips_get_reg_class(const void *self, - unsigned i) +static const arch_register_class_t *mips_get_reg_class(unsigned i) { - (void) self; assert(i < N_CLASSES); return &mips_reg_classes[i]; } @@ -464,10 +376,8 @@ static const arch_register_class_t *mips_get_reg_class(const void *self, * @param mode The mode in question. * @return A register class which can hold values of the given mode. */ -const arch_register_class_t *mips_get_reg_class_for_mode(const void *self, - const ir_mode *mode) +const arch_register_class_t *mips_get_reg_class_for_mode(const ir_mode *mode) { - (void) self; (void) mode; ASSERT_NO_FLOAT(mode); return &mips_reg_classes[CLASS_mips_gp]; @@ -517,7 +427,7 @@ static const arch_register_t *mips_abi_prologue(void *self, ir_node** mem, pmap // - setup first part of stackframe sp = new_bd_mips_addu(NULL, block, sp, mips_create_Immediate(initialstackframesize)); - mips_set_irn_reg(sp, &mips_gp_regs[REG_SP]); + arch_set_irn_register(sp, &mips_gp_regs[REG_SP]); panic("FIXME Use IncSP or set register requirement with ignore"); /* TODO: where to get an edge with a0-a3 @@ -546,7 +456,7 @@ static const arch_register_t *mips_abi_prologue(void *self, ir_node** mem, pmap /* Note: ideally we would route these mem edges directly towards the * epilogue, but this is currently not supported so we sync all mems * together */ - sync = new_r_Sync(irg, block, 2, mm+4); + sync = new_r_Sync(block, 2, mm+4); *mem = sync; } else { ir_node *reg, *store; @@ -555,7 +465,7 @@ static const arch_register_t *mips_abi_prologue(void *self, ir_node** mem, pmap // save old framepointer sp = new_bd_mips_addu(NULL, block, sp, mips_create_Immediate(-initialstackframesize)); - mips_set_irn_reg(sp, &mips_gp_regs[REG_SP]); + arch_set_irn_register(sp, &mips_gp_regs[REG_SP]); panic("FIXME Use IncSP or set register requirement with ignore"); reg = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_FP]); @@ -567,7 +477,7 @@ static const arch_register_t *mips_abi_prologue(void *self, ir_node** mem, pmap // setup framepointer fp = new_bd_mips_addu(NULL, block, sp, mips_create_Immediate(-initialstackframesize)); - mips_set_irn_reg(fp, &mips_gp_regs[REG_FP]); + arch_set_irn_register(fp, &mips_gp_regs[REG_FP]); panic("FIXME Use IncSP or set register requirement with ignore"); be_abi_reg_map_set(reg_map, &mips_gp_regs[REG_FP], fp); @@ -580,7 +490,6 @@ static void mips_abi_epilogue(void *self, ir_node *block, ir_node **mem, pmap *r { mips_abi_env_t *env = self; - ir_graph *irg = env->irg; ir_node *sp = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_SP]); ir_node *fp = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_FP]); ir_node *load; @@ -589,7 +498,7 @@ static void mips_abi_epilogue(void *self, ir_node *block, ir_node **mem, pmap *r // copy fp to sp sp = new_bd_mips_or(NULL, block, fp, mips_create_zero()); - mips_set_irn_reg(sp, &mips_gp_regs[REG_SP]); + arch_set_irn_register(sp, &mips_gp_regs[REG_SP]); panic("FIXME Use be_Copy or set register requirement with ignore"); // 1. restore fp @@ -597,8 +506,8 @@ static void mips_abi_epilogue(void *self, ir_node *block, ir_node **mem, pmap *r fp_save_offset - initial_frame_size); panic("FIXME register requirement with ignore"); - fp = new_r_Proj(irg, block, load, mode_Iu, pn_mips_lw_res); - *mem = new_r_Proj(irg, block, load, mode_Iu, pn_mips_lw_M); + fp = new_r_Proj(block, load, mode_Iu, pn_mips_lw_res); + *mem = new_r_Proj(block, load, mode_Iu, pn_mips_lw_M); arch_set_irn_register(fp, &mips_gp_regs[REG_FP]); be_abi_reg_map_set(reg_map, &mips_gp_regs[REG_FP], fp); @@ -620,9 +529,9 @@ static ir_type *mips_abi_get_between_type(void *self) { if(env->debug && debug_between_type == NULL) { ir_entity *a0_ent, *a1_ent, *a2_ent, *a3_ent; ir_entity *ret_addr_ent; - ir_type *ret_addr_type = new_type_primitive(new_id_from_str("return_addr"), mode_P); - ir_type *old_fp_type = new_type_primitive(new_id_from_str("fp"), mode_P); - ir_type *old_param_type = new_type_primitive(new_id_from_str("param"), mode_Iu); + ir_type *ret_addr_type = new_type_primitive(mode_P); + ir_type *old_fp_type = new_type_primitive(mode_P); + ir_type *old_param_type = new_type_primitive(mode_Iu); debug_between_type = new_type_class(new_id_from_str("mips_between_type")); a0_ent = new_entity(debug_between_type, new_id_from_str("a0_ent"), old_param_type); @@ -641,7 +550,7 @@ static ir_type *mips_abi_get_between_type(void *self) { set_type_size_bytes(debug_between_type, 24); } else if(!env->debug && opt_between_type == NULL) { - ir_type *old_fp_type = new_type_primitive(new_id_from_str("fp"), mode_P); + ir_type *old_fp_type = new_type_primitive(mode_P); ir_entity *old_fp_ent; opt_between_type = new_type_class(new_id_from_str("mips_between_type")); @@ -736,18 +645,15 @@ static const arch_code_generator_if_t *mips_get_code_generator_if(void *self) /** * Returns the necessary byte alignment for storing a register of given class. */ -static int mips_get_reg_class_alignment(const void *self, - const arch_register_class_t *cls) +static int mips_get_reg_class_alignment(const arch_register_class_t *cls) { ir_mode *mode = arch_register_class_mode(cls); - (void) self; return get_mode_size_bytes(mode); } static const be_execution_unit_t ***mips_get_allowed_execution_units( - const void *self, const ir_node *irn) + const ir_node *irn) { - (void) self; (void) irn; /* TODO */ panic("Unimplemented mips_get_allowed_execution_units()"); @@ -777,29 +683,28 @@ static const backend_params *mips_get_libfirm_params(void) { static backend_params p = { 1, /* need dword lowering */ 0, /* don't support inline assembler yet */ - 0, /* no immediate floating point mode. */ - NULL, /* no additional opcodes */ NULL, /* will be set later */ NULL, /* but yet no creator function */ NULL, /* context for create_intrinsic_fkt */ NULL, /* no if conversion settings */ - NULL /* no immediate fp mode */ + NULL, /* float arithmetic mode (TODO) */ + 0, /* no trampoline support: size 0 */ + 0, /* no trampoline support: align 0 */ + NULL, /* no trampoline support: no trampoline builder */ + 4 /* alignment of stack parameter */ }; return &p; } -static asm_constraint_flags_t mips_parse_asm_constraint(const void *self, - const char **c) +static asm_constraint_flags_t mips_parse_asm_constraint(const char **c) { - (void) self; (void) c; return ASM_CONSTRAINT_FLAG_INVALID; } -static int mips_is_valid_clobber(const void *self, const char *clobber) +static int mips_is_valid_clobber(const char *clobber) { - (void) self; (void) clobber; return 0; }