X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_x87.c;h=4019e5cf1eb3281c4938aa7e64ac941e010bbed5;hb=8057f671ea7f286a27e40bfe1aa45d85e0990cbe;hp=dbaa2f25a00a89de3356f9ccba3fd724afb201b1;hpb=2b31fff481c9cb3a16ca4a0dc3b15bad3e19e5ec;p=libfirm diff --git a/ir/be/ia32/ia32_x87.c b/ir/be/ia32/ia32_x87.c index dbaa2f25a..4019e5cf1 100644 --- a/ir/be/ia32/ia32_x87.c +++ b/ir/be/ia32/ia32_x87.c @@ -138,7 +138,6 @@ struct x87_simulator { vfp_liveness *live; /**< Liveness information. */ unsigned n_idx; /**< The cached get_irg_last_idx() result. */ waitq *worklist; /**< Worklist of blocks that must be processed. */ - ia32_isa_t *isa; /**< the ISA object */ }; /** @@ -153,6 +152,12 @@ static int x87_get_depth(const x87_state *state) return state->depth; } +static st_entry *x87_get_entry(x87_state *const state, int const pos) +{ + assert(0 <= pos && pos < state->depth); + return &state->st[MASK_TOS(state->tos + pos)]; +} + /** * Return the virtual register index at st(pos). * @@ -163,25 +168,10 @@ static int x87_get_depth(const x87_state *state) */ static int x87_get_st_reg(const x87_state *state, int pos) { - assert(pos < state->depth); - return state->st[MASK_TOS(state->tos + pos)].reg_idx; + return x87_get_entry((x87_state*)state, pos)->reg_idx; } #ifdef DEBUG_libfirm -/** - * Return the node at st(pos). - * - * @param state the x87 state - * @param pos a stack position - * - * @return the IR node that produced the value at st(pos) - */ -static ir_node *x87_get_st_node(const x87_state *state, int pos) -{ - assert(pos < state->depth); - return state->st[MASK_TOS(state->tos + pos)].node; -} - /** * Dump the stack for debugging. * @@ -189,11 +179,9 @@ static ir_node *x87_get_st_node(const x87_state *state, int pos) */ static void x87_dump_stack(const x87_state *state) { - int i; - - for (i = state->depth - 1; i >= 0; --i) { - DB((dbg, LEVEL_2, "vf%d(%+F) ", x87_get_st_reg(state, i), - x87_get_st_node(state, i))); + for (int i = state->depth; i-- != 0;) { + st_entry const *const entry = x87_get_entry((x87_state*)state, i); + DB((dbg, LEVEL_2, "vf%d(%+F) ", entry->reg_idx, entry->node)); } DB((dbg, LEVEL_2, "<-- TOS\n")); } @@ -209,9 +197,9 @@ static void x87_dump_stack(const x87_state *state) */ static void x87_set_st(x87_state *state, int reg_idx, ir_node *node, int pos) { - assert(0 < state->depth); - state->st[MASK_TOS(state->tos + pos)].reg_idx = reg_idx; - state->st[MASK_TOS(state->tos + pos)].node = node; + st_entry *const entry = x87_get_entry(state, pos); + entry->reg_idx = reg_idx; + entry->node = node; DB((dbg, LEVEL_2, "After SET_REG: ")); DEBUG_ONLY(x87_dump_stack(state);) @@ -237,12 +225,11 @@ static void x87_set_tos(x87_state *state, int reg_idx, ir_node *node) */ static void x87_fxch(x87_state *state, int pos) { - st_entry entry; - assert(pos < state->depth); - - entry = state->st[MASK_TOS(state->tos + pos)]; - state->st[MASK_TOS(state->tos + pos)] = state->st[MASK_TOS(state->tos)]; - state->st[MASK_TOS(state->tos)] = entry; + st_entry *const a = x87_get_entry(state, pos); + st_entry *const b = x87_get_entry(state, 0); + st_entry const t = *a; + *a = *b; + *b = t; DB((dbg, LEVEL_2, "After FXCH: ")); DEBUG_ONLY(x87_dump_stack(state);) @@ -259,11 +246,10 @@ static void x87_fxch(x87_state *state, int pos) */ static int x87_on_stack(const x87_state *state, int reg_idx) { - int i, tos = state->tos; - - for (i = 0; i < state->depth; ++i) - if (state->st[MASK_TOS(tos + i)].reg_idx == reg_idx) + for (int i = 0; i < state->depth; ++i) { + if (x87_get_st_reg(state, i) == reg_idx) return i; + } return -1; } @@ -280,8 +266,9 @@ static void x87_push_dbl(x87_state *state, int reg_idx, ir_node *node) ++state->depth; state->tos = MASK_TOS(state->tos - 1); - state->st[state->tos].reg_idx = reg_idx; - state->st[state->tos].node = node; + st_entry *const entry = x87_get_entry(state, 0); + entry->reg_idx = reg_idx; + entry->node = node; DB((dbg, LEVEL_2, "After PUSH: ")); DEBUG_ONLY(x87_dump_stack(state);) } @@ -292,7 +279,6 @@ static void x87_push_dbl(x87_state *state, int reg_idx, ir_node *node) * @param state the x87 state * @param reg_idx the register vfp index * @param node the node that produces the value of the vfp register - * @param dbl_push if != 0 double pushes are allowed */ static void x87_push(x87_state *state, int reg_idx, ir_node *node) { @@ -496,24 +482,18 @@ static ir_node *x87_fxch_shuffle(x87_state *state, int pos, ir_node *block) * Note that critical edges are removed here, so we need only * a shuffle if the current block has only one successor. * - * @param sim the simulator handle * @param block the current block * @param state the current x87 stack state, might be modified - * @param dst_block the destination block * @param dst_state destination state * * @return state */ -static x87_state *x87_shuffle(x87_simulator *sim, ir_node *block, - x87_state *state, ir_node *dst_block, - const x87_state *dst_state) +static x87_state *x87_shuffle(ir_node *block, x87_state *state, const x87_state *dst_state) { int i, n_cycles, k, ri; unsigned cycles[4], all_mask; char cycle_idx[4][8]; ir_node *fxch, *before, *after; - (void) sim; - (void) dst_block; assert(state->depth == dst_state->depth); @@ -765,7 +745,6 @@ static vfp_liveness vfp_liveness_transfer(ir_node *irn, vfp_liveness live) * Put all live virtual registers at the end of a block into a bitset. * * @param sim the simulator handle - * @param lv the liveness information * @param bl the block * * @return The live bitset at the end of this block @@ -812,7 +791,6 @@ static unsigned vfp_live_args_after(x87_simulator *sim, const ir_node *pos, unsi * Calculate the liveness for a whole block and cache it. * * @param sim the simulator handle - * @param lv the liveness handle * @param block the block */ static void update_liveness(x87_simulator *sim, ir_node *block) @@ -1050,7 +1028,6 @@ static int sim_binop(x87_state *state, ir_node *n, const exchange_tmpl *tmpl) */ static int sim_unop(x87_state *state, ir_node *n, ir_op *op) { - int op1_idx; x87_simulator *sim = state->sim; const arch_register_t *op1 = x87_get_irn_register(get_irn_n(n, 0)); const arch_register_t *out = x87_get_irn_register(n); @@ -1060,18 +1037,16 @@ static int sim_unop(x87_state *state, ir_node *n, ir_op *op) DB((dbg, LEVEL_1, ">>> %+F -> %s\n", n, out->name)); DEBUG_ONLY(vfp_dump_live(live);) - op1_idx = x87_on_stack(state, arch_register_get_index(op1)); + int op1_idx = x87_on_stack(state, arch_register_get_index(op1)); if (is_vfp_live(arch_register_get_index(op1), live)) { /* push the operand here */ x87_create_fpush(state, n, op1_idx, 0); op1_idx = 0; - } - else { + } else { /* operand is dead, bring it to tos */ if (op1_idx != 0) { x87_create_fxch(state, n, op1_idx); - op1_idx = 0; } } @@ -1756,7 +1731,7 @@ static int sim_Copy(x87_state *state, ir_node *n) if (cls != &ia32_reg_classes[CLASS_ia32_vfp]) return 0; - pred = get_irn_n(n, 0); + pred = be_get_Copy_op(n); out = x87_get_irn_register(n); op1 = x87_get_irn_register(pred); live = vfp_live_args_after(state->sim, n, REGMASK(out)); @@ -1824,13 +1799,13 @@ static int sim_Copy(x87_state *state, ir_node *n) #endif } else { /* just a virtual copy */ - x87_set_st(state, arch_register_get_index(out), get_unop_op(n), op1_idx); + x87_set_st(state, arch_register_get_index(out), pred, op1_idx); /* don't remove the node to keep the verifier quiet :), the emitter won't emit any code for the node */ #if 0 sched_remove(n); DB((dbg, LEVEL_1, "<<< KILLED %s\n", get_irn_opname(n))); - exchange(n, get_unop_op(n)); + exchange(n, pred); #endif } } @@ -1856,6 +1831,25 @@ static ir_node *get_call_result_proj(ir_node *call) return NULL; } +static int sim_Asm(x87_state *const state, ir_node *const n) +{ + (void)state; + + for (size_t i = get_irn_arity(n); i-- != 0;) { + arch_register_req_t const *const req = arch_get_irn_register_req_in(n, i); + if (req->cls == &ia32_reg_classes[CLASS_ia32_vfp]) + panic("cannot handle %+F with x87 constraints", n); + } + + for (size_t i = arch_get_irn_n_outs(n); i-- != 0;) { + arch_register_req_t const *const req = arch_get_irn_register_req_out(n, i); + if (req->cls == &ia32_reg_classes[CLASS_ia32_vfp]) + panic("cannot handle %+F with x87 constraints", n); + } + + return NO_NODE_ADDED; +} + /** * Simulate a ia32_Call. * @@ -1914,30 +1908,23 @@ end_call: */ static int sim_Return(x87_state *state, ir_node *n) { - int n_res = be_Return_get_n_rets(n); - int i, n_float_res = 0; - +#ifdef DEBUG_libfirm /* only floating point return values must reside on stack */ - for (i = 0; i < n_res; ++i) { - ir_node *res = get_irn_n(n, n_be_Return_val + i); - + int n_float_res = 0; + int const n_res = be_Return_get_n_rets(n); + for (int i = 0; i < n_res; ++i) { + ir_node *const res = get_irn_n(n, n_be_Return_val + i); if (mode_is_float(get_irn_mode(res))) ++n_float_res; } assert(x87_get_depth(state) == n_float_res); +#endif /* pop them virtually */ - for (i = n_float_res - 1; i >= 0; --i) - x87_pop(state); - + x87_emms(state); return NO_NODE_ADDED; } -typedef struct perm_data_t { - const arch_register_t *in; - const arch_register_t *out; -} perm_data_t; - /** * Simulate a be_Perm. * @@ -1991,15 +1978,12 @@ static int sim_Perm(x87_state *state, ir_node *irn) /** * Kill any dead registers at block start by popping them from the stack. * - * @param sim the simulator handle - * @param block the current block - * @param start_state the x87 state at the begin of the block - * - * @return the x87 state after dead register killed + * @param sim the simulator handle + * @param block the current block + * @param state the x87 state at the begin of the block */ -static x87_state *x87_kill_deads(x87_simulator *sim, ir_node *block, x87_state *start_state) +static void x87_kill_deads(x87_simulator *const sim, ir_node *const block, x87_state *const state) { - x87_state *state = start_state; ir_node *first_insn = sched_first(block); ir_node *keep = NULL; unsigned live = vfp_live_args_after(sim, block, 0); @@ -2016,9 +2000,6 @@ static x87_state *x87_kill_deads(x87_simulator *sim, ir_node *block, x87_state * } if (kill_mask) { - /* create a new state, will be changed */ - state = x87_clone_state(sim, state); - DB((dbg, LEVEL_1, "Killing deads:\n")); DEBUG_ONLY(vfp_dump_live(live);) DEBUG_ONLY(x87_dump_stack(state);) @@ -2036,7 +2017,7 @@ static x87_state *x87_kill_deads(x87_simulator *sim, ir_node *block, x87_state * sched_add_before(first_insn, keep); keep_alive(keep); x87_emms(state); - return state; + return; } } /* now kill registers */ @@ -2072,7 +2053,6 @@ static x87_state *x87_kill_deads(x87_simulator *sim, ir_node *block, x87_state * } keep_alive(keep); } - return state; } /** @@ -2097,10 +2077,10 @@ static void x87_simulate_block(x87_simulator *sim, ir_node *block) DB((dbg, LEVEL_2, "State at Block begin:\n ")); DEBUG_ONLY(x87_dump_stack(state);) - /* at block begin, kill all dead registers */ - state = x87_kill_deads(sim, block, state); /* create a new state, will be changed */ state = x87_clone_state(sim, state); + /* at block begin, kill all dead registers */ + x87_kill_deads(sim, block, state); /* beware, n might change */ for (n = sched_first(block); !sched_is_end(n); n = next) { @@ -2158,7 +2138,7 @@ static void x87_simulate_block(x87_simulator *sim, ir_node *block) If the successor has more than one possible input, then it must be the only one. */ - x87_shuffle(sim, block, state, succ, succ_state->begin); + x87_shuffle(block, state, succ_state->begin); } } bl_state->end = state; @@ -2195,6 +2175,7 @@ static void x87_init_simulator(x87_simulator *sim, ir_graph *irg) /* set the generic function pointer of instruction we must simulate */ ir_clear_opcodes_generic_func(); + register_sim(op_ia32_Asm, sim_Asm); register_sim(op_ia32_Call, sim_Call); register_sim(op_ia32_vfld, sim_fld); register_sim(op_ia32_vfild, sim_fild);