X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_transform.c;h=ad57fed1fb4b9c79abd7811cfa9f9e1525742b5a;hb=3619ae08c1d392ab6e88a0471bc9631bb20027c8;hp=9650aaca97ea804be68508af4ecf7d146c4c34ee;hpb=b0eee6420fe5f4e5787f8767b3bd9325ee350f26;p=libfirm

diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c
index 9650aaca9..ad57fed1f 100644
--- a/ir/be/ia32/ia32_transform.c
+++ b/ir/be/ia32/ia32_transform.c
@@ -1099,7 +1099,10 @@ static ir_node *gen_shift_binop(ir_node *node, ir_node *op1, ir_node *op2,
 	/* the shift amount can be any mode that is bigger than 5 bits, since all
 	 * other bits are ignored anyway */
 	while (is_Conv(op2) && get_irn_n_edges(op2) == 1) {
-		op2 = get_Conv_op(op2);
+		ir_node *const op = get_Conv_op(op2);
+		if (mode_is_float(get_irn_mode(op)))
+			break;
+		op2 = op;
 		assert(get_mode_size_bits(get_irn_mode(op2)) >= 5);
 	}
 	new_op2 = create_immediate_or_transform(op2, 0);
@@ -2374,6 +2377,10 @@ static int is_float_to_int32_conv(const ir_node *node)
 
 	if(get_mode_size_bits(mode) != 32 || !ia32_mode_needs_gp_reg(mode))
 		return 0;
+	/* don't report unsigned as conv to 32bit, because we really need to do
+	 * a vfist with 64bit signed in this case */
+	if(!mode_is_signed(mode))
+		return 0;
 
 	if(!is_Conv(node))
 		return 0;
@@ -3189,7 +3196,7 @@ static ir_node *gen_x87_fp_to_gp(ir_node *node) {
 }
 
 /**
- * Creates a x87 strict Conv by placing a Sore and a Load
+ * Creates a x87 strict Conv by placing a Store and a Load
  */
 static ir_node *gen_x87_strict_conv(ir_mode *tgt_mode, ir_node *node)
 {