X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_transform.c;h=9f789d9f20ff773c3a909b7eb0ad57d58bccb129;hb=09480efeccb17e980766b3ca092bb0f6ebc0a44f;hp=9ce22742d7169e9e1158df7fa94e4f124594d409;hpb=5a840be89d3e0a2af317626671bf1c8974a40da7;p=libfirm

diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c
index 9ce22742d..9f789d9f2 100644
--- a/ir/be/ia32/ia32_transform.c
+++ b/ir/be/ia32/ia32_transform.c
@@ -967,11 +967,11 @@ static ir_node *generate_DivMod(ia32_transform_env_t *env, ir_node *dividend, ir
 
 		if (get_irn_op(irn) == op_Div) {
 			set_Proj_proj(proj, pn_DivMod_res_div);
-			in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode_Is, pn_DivMod_res_mod);
+			in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode, pn_DivMod_res_mod);
 		}
 		else {
 			set_Proj_proj(proj, pn_DivMod_res_mod);
-			in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode_Is, pn_DivMod_res_div);
+			in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode, pn_DivMod_res_div);
 		}
 
 		be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], irg, block, 1, in_keep);
@@ -979,7 +979,7 @@ static ir_node *generate_DivMod(ia32_transform_env_t *env, ir_node *dividend, ir
 
 	SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env->cg, env->irn));
 
-	set_ia32_res_mode(res, mode_Is);
+	set_ia32_res_mode(res, mode);
 
 	return res;
 }
@@ -1487,7 +1487,9 @@ static ir_node *gen_Cond(ia32_transform_env_t *env) {
 			pn_Cmp pnc = get_Proj_proj(sel);
 
 			if ((pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) && mode_is_int(get_irn_mode(expr))) {
-				if (classify_tarval(get_ia32_Immop_tarval(cnst)) == TV_CLASSIFY_NULL) {
+				if (get_ia32_op_type(cnst) == ia32_Const &&
+					classify_tarval(get_ia32_Immop_tarval(cnst)) == TV_CLASSIFY_NULL)
+				{
 					/* a Cmp A =/!= 0 */
 					ir_node    *op1  = expr;
 					ir_node    *op2  = expr;
@@ -2299,9 +2301,10 @@ static ir_node *gen_lowered_Load(ia32_transform_env_t *env, construct_load_func
 			FORCE_x87(env->cg);
 	}
 
-	new_op = func(env->dbg, env->irg, env->block, get_irn_n(node, 0), noreg, get_irn_n(node, 1));
+	new_op  = func(env->dbg, env->irg, env->block, get_irn_n(node, 0), noreg, get_irn_n(node, 1));
+	am_offs = get_ia32_am_offs(node);
 
-	if (am_offs = get_ia32_am_offs(node)) {
+	if (am_offs) {
 		am_flav |= ia32_O;
 		add_ia32_am_offs(new_op, am_offs);
 	}
@@ -2430,7 +2433,13 @@ static ir_node *gen_ia32_l_MulS(ia32_transform_env_t *env) {
 	/* and then skip the result Proj, because all needed Projs are already there. */
 
 	ir_node *new_op = gen_binop(env, get_binop_left(env->irn), get_binop_right(env->irn), new_rd_ia32_MulS);
-	return get_Proj_pred(new_op);
+	ir_node *muls   = get_Proj_pred(new_op);
+
+	/* MulS cannot have AM for destination */
+	if (get_ia32_am_support(muls) != ia32_am_None)
+		set_ia32_am_support(muls, ia32_am_Source);
+
+	return muls;
 }
 
 GEN_LOWERED_SHIFT_OP(Shl)