X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_transform.c;h=90d6993ab36ac2dce04f6a3ea1c56c320a67d732;hb=f9a010d893d700bd120cf8b96c1772e7c6f4d92e;hp=bb8c5ce0d76c0f987ff5f3f75110fe034b9ca5cd;hpb=9d5d214cc32dceffd2e4ddd652760a6b916c5201;p=libfirm diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c index bb8c5ce0d..90d6993ab 100644 --- a/ir/be/ia32/ia32_transform.c +++ b/ir/be/ia32/ia32_transform.c @@ -25,6 +25,8 @@ #include "irprintf.h" #include "debug.h" #include "irdom.h" +#include "type.h" +#include "entity.h" #include "archop.h" /* we need this for Min and Max nodes */ #include "../benode_t.h" @@ -2322,6 +2324,62 @@ static ir_node *gen_be_Call(ia32_transform_env_t *env) { return NULL; } +/** + * In case SSE is used we need to copy the result from XMM0 to FPU TOS before return. + */ +static ir_node *gen_be_Return(ia32_transform_env_t *env) { + ir_node *ret_val = get_irn_n(env->irn, be_pos_Return_val); + ir_node *ret_mem = get_irn_n(env->irn, be_pos_Return_mem); + entity *ent = get_irg_entity(get_irn_irg(ret_val)); + ir_type *tp = get_entity_type(ent); + + if (be_Return_get_n_rets(env->irn) < 1 || ! ret_val || ! USE_SSE2(env->cg)) + return NULL; + + + if (get_method_n_ress(tp) == 1) { + ir_type *res_type = get_method_res_type(tp, 0); + ir_mode *mode; + + if(is_Primitive_type(res_type)) { + mode = get_type_mode(res_type); + if(mode_is_float(mode)) { + ir_node *frame = get_irg_frame(env->irg); + entity *ent = frame_alloc_area(get_irg_frame_type(env->irg), get_mode_size_bytes(mode), 16, 0); + ir_node *sse_store, *fld, *mproj; + + /* store xmm0 onto stack */ + sse_store = new_rd_ia32_xStoreSimple(env->dbg, env->irg, env->block, frame, ret_val, ret_mem); + set_ia32_ls_mode(sse_store, mode); + set_ia32_op_type(sse_store, ia32_AddrModeD); + set_ia32_use_frame(sse_store); + set_ia32_frame_ent(sse_store, ent); + set_ia32_am_flavour(sse_store, ia32_B); + set_ia32_am_support(sse_store, ia32_am_Dest); + sse_store = new_r_Proj(env->irg, env->block, sse_store, mode_M, pn_ia32_xStore_M); + + /* load into st0 */ + fld = new_rd_ia32_SetST0(env->dbg, env->irg, env->block, frame, sse_store); + set_ia32_ls_mode(fld, mode); + set_ia32_op_type(fld, ia32_AddrModeS); + set_ia32_use_frame(fld); + set_ia32_frame_ent(fld, ent); + set_ia32_am_flavour(fld, ia32_B); + set_ia32_am_support(fld, ia32_am_Source); + mproj = new_r_Proj(env->irg, env->block, fld, mode_M, pn_ia32_SetST0_M); + fld = new_r_Proj(env->irg, env->block, fld, mode, pn_ia32_SetST0_res); + + /* set new return value */ + set_irn_n(env->irn, be_pos_Return_val, fld); + set_irn_n(env->irn, be_pos_Return_mem, mproj); + } + } + } + + return NULL; +} + + /** * This function just sets the register for the Unknown node * as this is not done during register allocation because Unknown @@ -2817,6 +2875,7 @@ void ia32_register_transformers(void) { /* handle generic backend nodes */ GEN(be_FrameAddr); GEN(be_Call); + GEN(be_Return); GEN(be_FrameLoad); GEN(be_FrameStore); GEN(be_StackParam);