X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_transform.c;h=6b603efcd7aec84477dfab593f725b342d4408e3;hb=a1a465eb2b3f54027b29f829423fffd0396937f4;hp=79a46bec7013502fece38be2c908dccb90cb662b;hpb=7c87658266cf3d3f0b11fdbed065b3e87abc29ec;p=libfirm diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c index 79a46bec7..6b603efcd 100644 --- a/ir/be/ia32/ia32_transform.c +++ b/ir/be/ia32/ia32_transform.c @@ -132,6 +132,34 @@ static ir_node *get_proj_for_pn(const ir_node *irn, long pn) { return NULL; } +/** + * Collects all Projs of a node into the node array. Index is the projnum. + * BEWARE: The caller has to assure the appropriate array size! + */ +static void ia32_collect_Projs(ir_node *irn, ir_node **projs, int size) { + const ir_edge_t *edge; + ir_node *proj; + assert(get_irn_mode(irn) == mode_T && "need mode_T"); + + memset(projs, 0, size * sizeof(projs[0])); + + foreach_out_edge(irn, edge) { + proj = get_edge_src_irn(edge); + projs[get_Proj_proj(proj)] = proj; + } +} + +/** + * Renumbers the proj having pn_old in the array tp pn_new + * and removes the proj from the array. + */ +static INLINE void ia32_renumber_Proj(ir_node **projs, long pn_old, long pn_new) { + if (projs[pn_old]) { + set_Proj_proj(projs[pn_old], pn_new); + projs[pn_old] = NULL; + } +} + /** * SSE convert of an integer node into a floating point node. */ @@ -180,7 +208,7 @@ static ident *gen_fp_known_const(ia32_known_const_t kct) { { TP_SFP_ABS, ENT_SFP_ABS, SFP_ABS }, /* ia32_SABS */ { TP_DFP_ABS, ENT_DFP_ABS, DFP_ABS } /* ia32_DABS */ }; - static struct entity *ent_cache[ia32_known_const_max]; + static entity *ent_cache[ia32_known_const_max]; const char *tp_name, *ent_name, *cnst_str; ir_type *tp; @@ -393,7 +421,7 @@ static ir_node *gen_shift_binop(ia32_transform_env_t *env, ir_node *op1, ir_node tv = get_ia32_Immop_tarval(imm_op); if (tv) { - tv = tarval_mod(tv, new_tarval_from_long(32, mode_Iu)); + tv = tarval_mod(tv, new_tarval_from_long(32, get_tarval_mode(tv))); set_ia32_Immop_tarval(imm_op, tv); } else { @@ -487,7 +515,7 @@ static ir_node *gen_imm_Add(ia32_transform_env_t *env, ir_node *expr_op, ir_node DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;) /* try to optimize to inc/dec */ - if ((env->cg->opt & IA32_OPT_INCDEC) && (get_ia32_op_type(const_op) == ia32_Const)) { + if ((env->cg->opt & IA32_OPT_INCDEC) && tv && (get_ia32_op_type(const_op) == ia32_Const)) { /* optimize tarvals */ class_tv = classify_tarval(tv); class_negtv = classify_tarval(tarval_neg(tv)); @@ -811,7 +839,7 @@ static ir_node *gen_imm_Sub(ia32_transform_env_t *env, ir_node *expr_op, ir_node DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;) /* try to optimize to inc/dec */ - if ((env->cg->opt & IA32_OPT_INCDEC) && tv) { + if ((env->cg->opt & IA32_OPT_INCDEC) && tv && (get_ia32_op_type(const_op) == ia32_Const)) { /* optimize tarvals */ class_tv = classify_tarval(tv); class_negtv = classify_tarval(tarval_neg(tv)); @@ -949,7 +977,7 @@ static ir_node *gen_Sub(ia32_transform_env_t *env) { * @return The created ia32 DivMod node */ static ir_node *generate_DivMod(ia32_transform_env_t *env, ir_node *dividend, ir_node *divisor, ia32_op_flavour_t dm_flav) { - ir_node *res, *proj; + ir_node *res, *proj_div, *proj_mod; ir_node *edx_node, *cltd; ir_node *in_keep[1]; dbg_info *dbg = env->dbg; @@ -958,7 +986,9 @@ static ir_node *generate_DivMod(ia32_transform_env_t *env, ir_node *dividend, ir ir_mode *mode = env->mode; ir_node *irn = env->irn; ir_node *mem; - int n; + ir_node *projs[pn_DivMod_max]; + + ia32_collect_Projs(irn, projs, pn_DivMod_max); switch (dm_flav) { case flavour_Div: @@ -970,8 +1000,10 @@ static ir_node *generate_DivMod(ia32_transform_env_t *env, ir_node *dividend, ir mode = get_irn_mode(get_proj_for_pn(irn, pn_Mod_res)); break; case flavour_DivMod: - mem = get_DivMod_mem(irn); - mode = get_irn_mode(get_proj_for_pn(irn, pn_DivMod_res_div)); + mem = get_DivMod_mem(irn); + proj_div = get_proj_for_pn(irn, pn_DivMod_res_div); + proj_mod = get_proj_for_pn(irn, pn_DivMod_res_mod); + mode = proj_div ? get_irn_mode(proj_div) : get_irn_mode(proj_mod); break; default: assert(0); @@ -984,42 +1016,70 @@ static ir_node *generate_DivMod(ia32_transform_env_t *env, ir_node *dividend, ir edx_node = new_rd_Proj(dbg, irg, block, cltd, mode_Is, pn_ia32_Cdq_EDX); } else { - edx_node = new_rd_ia32_Const(dbg, irg, block, get_irg_no_mem(irg), mode_Iu); + edx_node = new_rd_ia32_Const(dbg, irg, block, mode_Iu); + add_irn_dep(edx_node, be_abi_get_start_barrier(env->cg->birg->abi)); set_ia32_Const_type(edx_node, ia32_Const); set_ia32_Immop_tarval(edx_node, get_tarval_null(mode_Iu)); } res = new_rd_ia32_DivMod(dbg, irg, block, dividend, divisor, edx_node, mem, dm_flav); - set_ia32_n_res(res, 2); /* Only one proj is used -> We must add a second proj and */ /* connect this one to a Keep node to eat up the second */ /* destroyed register. */ - n = get_irn_n_edges(irn); - proj = NULL; - if (n == 2) - proj = ia32_get_proj_for_mode(irn, mode_M); - - /* in case of two projs, one must be the memory proj */ - if (n == 1 || (n == 2 && proj)) { - proj = ia32_get_res_proj(irn); - assert(proj && "Result proj expected"); - - if (get_irn_op(irn) == op_Div) { - set_Proj_proj(proj, pn_DivMod_res_div); - in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode, pn_DivMod_res_mod); - } - else { - set_Proj_proj(proj, pn_DivMod_res_mod); - in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode, pn_DivMod_res_div); - } - - be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], irg, block, 1, in_keep); + /* We also renumber the Firm projs into ia32 projs. */ + + switch (get_irn_opcode(irn)) { + case iro_Div: + ia32_renumber_Proj(projs, pn_Div_M, pn_ia32_DivMod_M); + ia32_renumber_Proj(projs, pn_Div_res, pn_ia32_DivMod_div_res); + /* add Proj-Keep for mod res */ + in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode, pn_ia32_DivMod_mod_res); + be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], irg, block, 1, in_keep); + break; + case iro_Mod: + ia32_renumber_Proj(projs, pn_Mod_M, pn_ia32_DivMod_M); + ia32_renumber_Proj(projs, pn_Mod_res, pn_ia32_DivMod_mod_res); + /* add Proj-Keep for div res */ + in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode, pn_ia32_DivMod_div_res); + be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], irg, block, 1, in_keep); + break; + case iro_DivMod: + /* check, which Proj-Keep, we need to add */ + proj_div = get_proj_for_pn(irn, pn_DivMod_res_div); + proj_mod = get_proj_for_pn(irn, pn_DivMod_res_mod); + + /* BEWARE: renumber after getting original projs */ + ia32_renumber_Proj(projs, pn_DivMod_M, pn_ia32_DivMod_M); + + if (proj_div && proj_mod) { + /* we have both results used: simply renumber */ + ia32_renumber_Proj(projs, pn_DivMod_res_div, pn_ia32_DivMod_div_res); + ia32_renumber_Proj(projs, pn_DivMod_res_mod, pn_ia32_DivMod_mod_res); + } + else if (! proj_div && ! proj_mod) { + assert(0 && "Missing DivMod result proj"); + } + else if (! proj_div) { + /* We have only mod result: add div res Proj-Keep */ + ia32_renumber_Proj(projs, pn_DivMod_res_mod, pn_ia32_DivMod_mod_res); + in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode, pn_ia32_DivMod_div_res); + be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], irg, block, 1, in_keep); + } + else { + /* We have only div result: add mod res Proj-Keep */ + ia32_renumber_Proj(projs, pn_DivMod_res_div, pn_ia32_DivMod_div_res); + in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode, pn_ia32_DivMod_mod_res); + be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], irg, block, 1, in_keep); + } + break; + default: + assert(0 && "Div, Mod, or DivMod expected."); + break; } SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env->cg, env->irn)); - set_ia32_res_mode(res, mode); return res; @@ -1065,6 +1125,11 @@ static ir_node *gen_Quot(ia32_transform_env_t *env) { ir_node *nomem = new_rd_NoMem(env->irg); ir_node *op1 = get_Quot_left(env->irn); ir_node *op2 = get_Quot_right(env->irn); + ir_mode *mode = get_irn_mode(get_proj_for_pn(env->irn, pn_Quot_res)); + ir_node *projs[pn_Quot_max]; + /* BEWARE: Projs will be renumbered, so retrieve res Proj here */ + + ia32_collect_Projs(env->irn, projs, pn_Quot_max); FP_USED(env->cg); if (USE_SSE2(env->cg)) { @@ -1077,14 +1142,17 @@ static ir_node *gen_Quot(ia32_transform_env_t *env) { new_op = new_rd_ia32_xDiv(env->dbg, env->irg, env->block, noreg, noreg, op1, op2, nomem); set_ia32_am_support(new_op, ia32_am_Source); } + ia32_renumber_Proj(projs, pn_Quot_M, pn_ia32_xDiv_M); + ia32_renumber_Proj(projs, pn_Quot_res, pn_ia32_xDiv_res); } else { new_op = new_rd_ia32_vfdiv(env->dbg, env->irg, env->block, noreg, noreg, op1, op2, nomem); set_ia32_am_support(new_op, ia32_am_Source); + ia32_renumber_Proj(projs, pn_Quot_M, pn_ia32_vfdiv_M); + ia32_renumber_Proj(projs, pn_Quot_res, pn_ia32_vfdiv_res); } - set_ia32_res_mode(new_op, get_irn_mode(get_proj_for_pn(env->irn, pn_Quot_res))); + set_ia32_res_mode(new_op, mode); SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env->cg, env->irn)); - return new_op; } @@ -1356,6 +1424,19 @@ static ir_node *gen_Load(ia32_transform_env_t *env) { int is_imm = 0; ir_node *new_op; ia32_am_flavour_t am_flav = ia32_am_B; + ir_node *projs[pn_Load_max]; + + ia32_collect_Projs(env->irn, projs, pn_Load_max); + + /* + check for special case: the loaded value might not be used (optimized, volatile, ...) + we add a Proj + Keep for volatile loads and ignore all other cases + */ + if (! get_proj_for_pn(node, pn_Load_res) && get_Load_volatility(node) == volatility_is_volatile) { + /* add a result proj and a Keep to produce a pseudo use */ + ir_node *proj = new_r_Proj(env->irg, env->block, node, mode, pn_ia32_Load_res); + be_new_Keep(arch_get_irn_reg_class(env->cg->arch_env, proj, -1), env->irg, env->block, 1, &proj); + } /* address might be a constant (symconst or absolute address) */ if (is_ia32_Const(ptr)) { @@ -1365,13 +1446,21 @@ static ir_node *gen_Load(ia32_transform_env_t *env) { if (mode_is_float(mode)) { FP_USED(env->cg); - if (USE_SSE2(env->cg)) + if (USE_SSE2(env->cg)) { new_op = new_rd_ia32_xLoad(env->dbg, env->irg, env->block, lptr, noreg, get_Load_mem(node)); - else + ia32_renumber_Proj(projs, pn_Load_M, pn_ia32_xLoad_M); + ia32_renumber_Proj(projs, pn_Load_res, pn_ia32_xLoad_res); + } + else { new_op = new_rd_ia32_vfld(env->dbg, env->irg, env->block, lptr, noreg, get_Load_mem(node)); + ia32_renumber_Proj(projs, pn_Load_M, pn_ia32_vfld_M); + ia32_renumber_Proj(projs, pn_Load_res, pn_ia32_vfld_res); + } } else { new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, lptr, noreg, get_Load_mem(node)); + ia32_renumber_Proj(projs, pn_Load_M, pn_ia32_Load_M); + ia32_renumber_Proj(projs, pn_Load_res, pn_ia32_Load_res); } /* base is an constant address */ @@ -1384,6 +1473,9 @@ static ir_node *gen_Load(ia32_transform_env_t *env) { add_ia32_am_offs(new_op, get_ia32_cnst(ptr)); am_flav = ia32_am_O; } + /* add dependency to barrier, if we are in start block */ + if (get_irg_start_block(env->irg) == env->block) + add_irn_dep(new_op, be_abi_get_start_barrier(env->cg->birg->abi)); } set_ia32_am_support(new_op, ia32_am_Source); @@ -1391,16 +1483,6 @@ static ir_node *gen_Load(ia32_transform_env_t *env) { set_ia32_am_flavour(new_op, am_flav); set_ia32_ls_mode(new_op, mode); - /* - check for special case: the loaded value might not be used (optimized, volatile, ...) - we add a Proj + Keep for volatile loads and ignore all other cases - */ - if (! get_proj_for_pn(node, pn_Load_res) && get_Load_volatility(node) == volatility_is_volatile) { - /* add a result proj and a Keep to produce a pseudo use */ - ir_node *proj = new_r_Proj(env->irg, env->block, new_op, mode, pn_ia32_Load_res); - be_new_Keep(arch_get_irn_reg_class(env->cg->arch_env, proj, -1), env->irg, env->block, 1, &proj); - } - SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env->cg, env->irn)); return new_op; @@ -1427,6 +1509,9 @@ static ir_node *gen_Store(ia32_transform_env_t *env) { ir_node *new_op; ia32_am_flavour_t am_flav = ia32_am_B; ia32_immop_type_t immop = ia32_ImmNone; + ir_node *projs[pn_Store_max]; + + ia32_collect_Projs(env->irn, projs, pn_Store_max); if (! mode_is_float(mode)) { /* in case of storing a const (but not a symconst) -> make it an attribute */ @@ -1453,16 +1538,22 @@ static ir_node *gen_Store(ia32_transform_env_t *env) { if (mode_is_float(mode)) { FP_USED(env->cg); - if (USE_SSE2(env->cg)) + if (USE_SSE2(env->cg)) { new_op = new_rd_ia32_xStore(env->dbg, env->irg, env->block, sptr, noreg, sval, mem); - else + ia32_renumber_Proj(projs, pn_Store_M, pn_ia32_xStore_M); + } + else { new_op = new_rd_ia32_vfst(env->dbg, env->irg, env->block, sptr, noreg, sval, mem); + ia32_renumber_Proj(projs, pn_Store_M, pn_ia32_vfst_M); + } } else if (get_mode_size_bits(mode) == 8) { new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, sptr, noreg, sval, mem); + ia32_renumber_Proj(projs, pn_Store_M, pn_ia32_Store8Bit_M); } else { new_op = new_rd_ia32_Store(env->dbg, env->irg, env->block, sptr, noreg, sval, mem); + ia32_renumber_Proj(projs, pn_Store_M, pn_ia32_Store_M); } /* stored const is an attribute (saves a register) */ @@ -1472,7 +1563,7 @@ static ir_node *gen_Store(ia32_transform_env_t *env) { /* base is an constant address */ if (is_imm) { - if (get_ia32_immop_type(ptr) == ia32_ImmSymConst) { + if (get_ia32_op_type(ptr) == ia32_SymConst) { set_ia32_am_sc(new_op, get_ia32_id_cnst(ptr)); am_flav = ia32_am_N; } @@ -1515,6 +1606,7 @@ static ir_node *gen_Cond(ia32_transform_env_t *env) { if (is_Proj(sel) && sel_mode == mode_b) { ir_node *nomem = new_NoMem(); + pn_Cmp pnc = get_Proj_proj(sel); pred = get_Proj_pred(sel); @@ -1527,7 +1619,10 @@ static ir_node *gen_Cond(ia32_transform_env_t *env) { expr = get_expr_op(cmp_a, cmp_b); if (cnst && expr) { - pn_Cmp pnc = get_Proj_proj(sel); + /* immop has to be the right operand, we might need to flip pnc */ + if(cnst != cmp_b) { + pnc = get_inversed_pnc(pnc); + } if ((pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) && mode_is_int(get_irn_mode(expr))) { if (get_ia32_op_type(cnst) == ia32_Const && @@ -1547,7 +1642,7 @@ static ir_node *gen_Cond(ia32_transform_env_t *env) { cnst = (is_ia32_ImmConst(and) || is_ia32_ImmSymConst(and)) ? get_ia32_cnst(and) : NULL; } res = new_rd_ia32_TestJmp(dbg, irg, block, op1, op2); - set_ia32_pncode(res, get_Proj_proj(sel)); + set_ia32_pncode(res, pnc); set_ia32_res_mode(res, get_irn_mode(op1)); if (cnst) { @@ -1592,7 +1687,7 @@ static ir_node *gen_Cond(ia32_transform_env_t *env) { set_ia32_res_mode(res, get_irn_mode(cmp_a)); } - set_ia32_pncode(res, get_Proj_proj(sel)); + set_ia32_pncode(res, pnc); //set_ia32_am_support(res, ia32_am_Source); } else { @@ -1647,7 +1742,10 @@ static ir_node *gen_CopyB(ia32_transform_env_t *env) { ir_mode *dst_mode = get_irn_mode(dst); ir_mode *src_mode = get_irn_mode(src); int rem; - ir_node *in[3], *tmp; + ir_node *in[3]; + ir_node *projs[pn_CopyB_max]; + + ia32_collect_Projs(env->irn, projs, pn_CopyB_max); /* If we have to copy more than 32 bytes, we use REP MOVSx and */ /* then we need the size explicitly in ECX. */ @@ -1655,7 +1753,8 @@ static ir_node *gen_CopyB(ia32_transform_env_t *env) { rem = size & 0x3; /* size % 4 */ size >>= 2; - res = new_rd_ia32_Const(dbg, irg, block, get_irg_no_mem(irg), mode_Is); + res = new_rd_ia32_Const(dbg, irg, block, mode_Is); + add_irn_dep(res, be_abi_get_start_barrier(env->cg->birg->abi)); set_ia32_op_type(res, ia32_Const); set_ia32_Immop_tarval(res, new_tarval_from_long(size, mode_Is)); @@ -1668,8 +1767,7 @@ static ir_node *gen_CopyB(ia32_transform_env_t *env) { in[2] = new_r_Proj(irg, block, res, mode_Is, pn_ia32_CopyB_CNT); be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], irg, block, 3, in); - tmp = ia32_get_proj_for_mode(node, mode_M); - set_Proj_proj(tmp, pn_ia32_CopyB_M); + ia32_renumber_Proj(projs, pn_CopyB_M_regular, pn_ia32_CopyB_M); } else { res = new_rd_ia32_CopyB_i(dbg, irg, block, dst, src, mem); @@ -1681,8 +1779,7 @@ static ir_node *gen_CopyB(ia32_transform_env_t *env) { in[1] = new_r_Proj(irg, block, res, src_mode, pn_ia32_CopyB_i_SRC); be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], irg, block, 2, in); - tmp = ia32_get_proj_for_mode(node, mode_M); - set_Proj_proj(tmp, pn_ia32_CopyB_i_M); + ia32_renumber_Proj(projs, pn_CopyB_M_regular, pn_ia32_CopyB_i_M); } SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env->cg, env->irn)); @@ -1910,13 +2007,13 @@ static ir_node *gen_Psi(ia32_transform_env_t *env) { * Create a conversion from x87 state register to general purpose. */ static ir_node *gen_x87_fp_to_gp(ia32_transform_env_t *env, ir_mode *tgt_mode) { - ia32_code_gen_t *cg = env->cg; - entity *ent = cg->fp_to_gp; - ir_graph *irg = env->irg; - ir_node *block = env->block; - ir_node *noreg = ia32_new_NoReg_gp(env->cg); - ir_node *op = get_Conv_op(env->irn); - ir_node *fist, *mem, *load; + ia32_code_gen_t *cg = env->cg; + entity *ent = cg->fp_to_gp; + ir_graph *irg = env->irg; + ir_node *block = env->block; + ir_node *noreg = ia32_new_NoReg_gp(env->cg); + ir_node *op = get_Conv_op(env->irn); + ir_node *fist, *mem, *load; if (! ent) { int size = get_mode_size_bytes(ia32_reg_classes[CLASS_ia32_vfp].mode); @@ -1991,7 +2088,7 @@ static ir_node *gen_x87_gp_to_fp(ia32_transform_env_t *env, ir_mode *src_mode) { set_ia32_am_flavour(store, ia32_B); set_ia32_ls_mode(store, mode_Is); - mem = new_r_Proj(irg, block, store, mode_M, 0); + mem = new_r_Proj(irg, block, store, mode_M, pn_ia32_Store_M); /* do a fild */ fild = new_rd_ia32_vfild(env->dbg, irg, block, get_irg_frame(irg), noreg, mem); @@ -2003,7 +2100,7 @@ static ir_node *gen_x87_gp_to_fp(ia32_transform_env_t *env, ir_mode *src_mode) { set_ia32_am_flavour(fild, ia32_B); set_ia32_ls_mode(fild, mode_F); - return new_r_Proj(irg, block, fild, mode_F, 0); + return new_r_Proj(irg, block, fild, mode_F, pn_ia32_vfild_res); } /** @@ -2068,7 +2165,7 @@ static ir_node *gen_Conv(ia32_transform_env_t *env) { if (tgt_bits < 32) { SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env->cg, env->irn)); set_ia32_am_support(new_op, ia32_am_Source); - set_ia32_tgt_mode(new_op, tgt_mode); + set_ia32_tgt_mode(new_op, mode_Is); set_ia32_src_mode(new_op, src_mode); proj = new_rd_Proj(dbg, irg, block, new_op, mode_Is, pn_ia32_Conv_FP2I_res); @@ -2081,6 +2178,7 @@ static ir_node *gen_Conv(ia32_transform_env_t *env) { new_op = new_rd_ia32_Conv_I2I(dbg, irg, block, noreg, noreg, proj, nomem); pn = pn_ia32_Conv_I2I_res; } + src_mode = mode_Is; } } } @@ -2128,7 +2226,8 @@ static ir_node *gen_Conv(ia32_transform_env_t *env) { set_ia32_tgt_mode(new_op, tgt_mode); set_ia32_src_mode(new_op, src_mode); - set_ia32_am_support(new_op, ia32_am_Source); + if(tgt_bits >= src_bits) + set_ia32_am_support(new_op, ia32_am_Source); new_op = new_rd_Proj(dbg, irg, block, new_op, tgt_mode, pn); @@ -2151,41 +2250,6 @@ static ir_node *gen_Conv(ia32_transform_env_t *env) { * ********************************************/ -#if 0 - /** - * Decides in which block the transformed StackParam should be placed. - * If the StackParam has more than one user, the dominator block of - * the users will be returned. In case of only one user, this is either - * the user block or, in case of a Phi, the predecessor block of the Phi. - */ -static ir_node *get_block_transformed_stack_param(ir_node *irn) { - ir_node *dom_bl = NULL; - - if (get_irn_n_edges(irn) == 1) { - ir_node *src = get_edge_src_irn(get_irn_out_edge_first(irn)); - - if (! is_Phi(src)) { - dom_bl = get_nodes_block(src); - } - else { - /* Determine on which in position of the Phi the irn is */ - /* and get the corresponding cfg predecessor block. */ - - int i = get_irn_pred_pos(src, irn); - assert(i >= 0 && "kaputt"); - dom_bl = get_Block_cfgpred_block(get_nodes_block(src), i); - } - } - else { - dom_bl = node_users_smallest_common_dominator(irn, 1); - } - - assert(dom_bl && "dominator block not found"); - - return dom_bl; -} -#endif - static ir_node *gen_be_StackParam(ia32_transform_env_t *env) { ir_node *new_op = NULL; ir_node *node = env->irn; @@ -2194,19 +2258,22 @@ static ir_node *gen_be_StackParam(ia32_transform_env_t *env) { ir_node *ptr = get_irn_n(node, 0); entity *ent = arch_get_frame_entity(env->cg->arch_env, node); ir_mode *mode = env->mode; - - /* choose the block where to place the load */ - //env->block = get_block_transformed_stack_param(node); + long pn_res; if (mode_is_float(mode)) { FP_USED(env->cg); - if (USE_SSE2(env->cg)) + if (USE_SSE2(env->cg)) { new_op = new_rd_ia32_xLoad(env->dbg, env->irg, env->block, ptr, noreg, mem); - else + pn_res = pn_ia32_xLoad_res; + } + else { new_op = new_rd_ia32_vfld(env->dbg, env->irg, env->block, ptr, noreg, mem); + pn_res = pn_ia32_vfld_res; + } } else { new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, ptr, noreg, mem); + pn_res = pn_ia32_Load_res; } set_ia32_frame_ent(new_op, ent); @@ -2220,7 +2287,7 @@ static ir_node *gen_be_StackParam(ia32_transform_env_t *env) { SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env->cg, env->irn)); - return new_rd_Proj(env->dbg, env->irg, env->block, new_op, mode, pn_ia32_Load_res); + return new_rd_Proj(env->dbg, env->irg, env->block, new_op, mode, pn_res); } /** @@ -2256,16 +2323,28 @@ static ir_node *gen_be_FrameLoad(ia32_transform_env_t *env) { ir_node *ptr = get_irn_n(node, 1); entity *ent = arch_get_frame_entity(env->cg->arch_env, node); ir_mode *mode = get_type_mode(get_entity_type(ent)); + ir_node *projs[pn_Load_max]; + + ia32_collect_Projs(env->irn, projs, pn_Load_max); if (mode_is_float(mode)) { FP_USED(env->cg); - if (USE_SSE2(env->cg)) + if (USE_SSE2(env->cg)) { new_op = new_rd_ia32_xLoad(env->dbg, env->irg, env->block, ptr, noreg, mem); - else + ia32_renumber_Proj(projs, pn_Load_M, pn_ia32_xLoad_M); + ia32_renumber_Proj(projs, pn_Load_res, pn_ia32_xLoad_res); + } + else { new_op = new_rd_ia32_vfld(env->dbg, env->irg, env->block, ptr, noreg, mem); + ia32_renumber_Proj(projs, pn_Load_M, pn_ia32_vfld_M); + ia32_renumber_Proj(projs, pn_Load_res, pn_ia32_vfld_res); + } } - else + else { new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, ptr, noreg, mem); + ia32_renumber_Proj(projs, pn_Load_M, pn_ia32_Load_M); + ia32_renumber_Proj(projs, pn_Load_res, pn_ia32_Load_res); + } set_ia32_frame_ent(new_op, ent); set_ia32_use_frame(new_op); @@ -2293,19 +2372,28 @@ static ir_node *gen_be_FrameStore(ia32_transform_env_t *env) { ir_node *val = get_irn_n(node, 2); entity *ent = arch_get_frame_entity(env->cg->arch_env, node); ir_mode *mode = get_irn_mode(val); + ir_node *projs[pn_Store_max]; + + ia32_collect_Projs(env->irn, projs, pn_Store_max); if (mode_is_float(mode)) { FP_USED(env->cg); - if (USE_SSE2(env->cg)) + if (USE_SSE2(env->cg)) { new_op = new_rd_ia32_xStore(env->dbg, env->irg, env->block, ptr, noreg, val, mem); - else + ia32_renumber_Proj(projs, pn_Store_M, pn_ia32_xStore_M); + } + else { new_op = new_rd_ia32_vfst(env->dbg, env->irg, env->block, ptr, noreg, val, mem); + ia32_renumber_Proj(projs, pn_Store_M, pn_ia32_vfst_M); + } } else if (get_mode_size_bits(mode) == 8) { new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, ptr, noreg, val, mem); + ia32_renumber_Proj(projs, pn_Store_M, pn_ia32_Store8Bit_M); } else { new_op = new_rd_ia32_Store(env->dbg, env->irg, env->block, ptr, noreg, val, mem); + ia32_renumber_Proj(projs, pn_Store_M, pn_ia32_Store_M); } set_ia32_frame_ent(new_op, ent); @@ -2344,7 +2432,9 @@ static ir_node *gen_be_Call(ia32_transform_env_t *env) { ir_node *fstp = new_rd_ia32_GetST0(env->dbg, env->irg, env->block, frame, call_mem); ir_node *mproj = new_r_Proj(env->irg, env->block, fstp, mode_M, pn_ia32_GetST0_M); entity *ent = frame_alloc_area(get_irg_frame_type(env->irg), get_mode_size_bytes(mode), 16, 0); - ir_node *sse_load; + ir_node *sse_load, *p, *bad, *keep; + ir_node **in_keep; + int keep_arity, i; set_ia32_ls_mode(fstp, mode); set_ia32_op_type(fstp, ia32_AddrModeD); @@ -2365,6 +2455,36 @@ static ir_node *gen_be_Call(ia32_transform_env_t *env) { /* reroute all users of the result proj to the sse load */ edges_reroute(call_res, sse_load, env->irg); + + /* now: create new Keep whith all former ins and one additional in - the result Proj */ + + /* get a Proj representing a caller save register */ + p = get_proj_for_pn(env->irn, pn_be_Call_first_res + 1); + assert(is_Proj(p) && "Proj expected."); + + /* user of the the proj is the Keep */ + p = get_edge_src_irn(get_irn_out_edge_first(p)); + assert(be_is_Keep(p) && "Keep expected."); + + /* copy in array of the old keep and set the result proj as additional in */ + keep_arity = get_irn_arity(p) + 1; + NEW_ARR_A(ir_node *, in_keep, keep_arity); + in_keep[keep_arity - 1] = call_res; + for (i = 0; i < keep_arity - 1; ++i) + in_keep[i] = get_irn_n(p, i); + + /* create new keep and set the in class requirements properly */ + keep = be_new_Keep(NULL, env->irg, env->block, keep_arity, in_keep); + for(i = 0; i < keep_arity; ++i) { + const arch_register_class_t *cls = arch_get_irn_reg_class(env->cg->arch_env, in_keep[i], -1); + be_node_set_reg_class(keep, i, cls); + } + + /* kill the old keep */ + bad = get_irg_bad(env->irg); + for (i = 0; i < keep_arity - 1; i++) + set_irn_n(p, i, bad); + remove_End_keepalive(get_irg_end(env->irg), p); } return NULL; @@ -2382,17 +2502,30 @@ static ir_node *gen_be_Return(ia32_transform_env_t *env) { if (be_Return_get_n_rets(env->irn) < 1 || ! ret_val || ! USE_SSE2(env->cg)) return NULL; - if (get_method_n_ress(tp) == 1) { ir_type *res_type = get_method_res_type(tp, 0); ir_mode *mode; - if(is_Primitive_type(res_type)) { + if (is_Primitive_type(res_type)) { mode = get_type_mode(res_type); - if(mode_is_float(mode)) { - ir_node *frame = get_irg_frame(env->irg); - entity *ent = frame_alloc_area(get_irg_frame_type(env->irg), get_mode_size_bytes(mode), 16, 0); - ir_node *sse_store, *fld, *mproj; + if (mode_is_float(mode)) { + ir_node *frame; + entity *ent; + ir_node *sse_store, *fld, *mproj, *barrier; + int pn_ret_val = get_Proj_proj(ret_val); + int pn_ret_mem = get_Proj_proj(ret_mem); + + /* get the Barrier */ + barrier = get_Proj_pred(ret_val); + + /* get result input of the Barrier */ + ret_val = get_irn_n(barrier, pn_ret_val); + + /* get memory input of the Barrier */ + ret_mem = get_irn_n(barrier, pn_ret_mem); + + frame = get_irg_frame(env->irg); + ent = frame_alloc_area(get_irg_frame_type(env->irg), get_mode_size_bytes(mode), 16, 0); /* store xmm0 onto stack */ sse_store = new_rd_ia32_xStoreSimple(env->dbg, env->irg, env->block, frame, ret_val, ret_mem); @@ -2414,10 +2547,11 @@ static ir_node *gen_be_Return(ia32_transform_env_t *env) { set_ia32_am_support(fld, ia32_am_Source); mproj = new_r_Proj(env->irg, env->block, fld, mode_M, pn_ia32_SetST0_M); fld = new_r_Proj(env->irg, env->block, fld, mode, pn_ia32_SetST0_res); + arch_set_irn_register(env->cg->arch_env, fld, &ia32_vfp_regs[REG_VF0]); /* set new return value */ - set_irn_n(env->irn, be_pos_Return_val, fld); - set_irn_n(env->irn, be_pos_Return_mem, mproj); + set_irn_n(barrier, pn_ret_val, fld); + set_irn_n(barrier, pn_ret_mem, mproj); } } } @@ -2473,6 +2607,54 @@ static ir_node *gen_be_AddSP(ia32_transform_env_t *env) { return new_op; } +/** + * Transform a be_SubSP into an ia32_SubSP. Eat up const sizes. + */ +static ir_node *gen_be_SubSP(ia32_transform_env_t *env) { + ir_node *new_op; + const ir_edge_t *edge; + ir_node *sz = get_irn_n(env->irn, be_pos_SubSP_size); + ir_node *sp = get_irn_n(env->irn, be_pos_SubSP_old_sp); + + new_op = new_rd_ia32_SubSP(env->dbg, env->irg, env->block, sp, sz); + + if (is_ia32_Const(sz)) { + set_ia32_Immop_attr(new_op, sz); + set_irn_n(new_op, 1, ia32_new_NoReg_gp(env->cg)); + } + else if (is_ia32_Load(sz) && get_ia32_am_flavour(sz) == ia32_O) { + set_ia32_immop_type(new_op, ia32_ImmSymConst); + set_ia32_op_type(new_op, ia32_AddrModeS); + set_ia32_am_sc(new_op, get_ia32_am_sc(sz)); + add_ia32_am_offs(new_op, get_ia32_am_offs(sz)); + set_irn_n(new_op, 1, ia32_new_NoReg_gp(env->cg)); + } + + /* fix proj nums */ + foreach_out_edge(env->irn, edge) { + ir_node *proj = get_edge_src_irn(edge); + + assert(is_Proj(proj)); + + if (get_Proj_proj(proj) == pn_be_SubSP_res) { + /* the node is not yet exchanged: we need to set the register manually */ + ia32_attr_t *attr = get_ia32_attr(new_op); + attr->slots[pn_ia32_SubSP_stack] = &ia32_gp_regs[REG_ESP]; + set_Proj_proj(proj, pn_ia32_SubSP_stack); + } + else if (get_Proj_proj(proj) == pn_be_SubSP_M) { + set_Proj_proj(proj, pn_ia32_SubSP_M); + } + else { + assert(0); + } + } + + SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env->cg, env->irn)); + + return new_op; +} + /** * This function just sets the register for the Unknown node * as this is not done during register allocation because Unknown @@ -2488,7 +2670,7 @@ static ir_node *gen_Unknown(ia32_transform_env_t *env) { else arch_set_irn_register(env->cg->arch_env, irn, &ia32_vfp_regs[REG_VFP_UKNWN]); } - else if (mode_is_int(mode) || mode_is_reference(mode)) { + else if (mode_is_int(mode) || mode_is_reference(mode) || mode_is_character(mode)) { arch_set_irn_register(env->cg->arch_env, irn, &ia32_gp_regs[REG_GP_UKNWN]); } else { @@ -2670,11 +2852,24 @@ static ir_node *gen_ia32_l_MulS(ia32_transform_env_t *env) { ir_node *new_op = gen_binop(env, get_binop_left(env->irn), get_binop_right(env->irn), new_rd_ia32_MulS); ir_node *muls = get_Proj_pred(new_op); + ir_node *proj; /* MulS cannot have AM for destination */ if (get_ia32_am_support(muls) != ia32_am_None) set_ia32_am_support(muls, ia32_am_Source); + /* check if EAX and EDX proj exist, add missing one */ + proj = get_proj_for_pn(env->irn, pn_ia32_MulS_EAX); + if (! proj) { + proj = new_r_Proj(env->irg, env->block, muls, get_ia32_res_mode(env->irn), pn_ia32_MulS_EAX); + be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], env->irg, env->block, 1, &proj); + } + proj = get_proj_for_pn(env->irn, pn_ia32_MulS_EDX); + if (! proj) { + proj = new_r_Proj(env->irg, env->block, muls, get_ia32_res_mode(env->irn), pn_ia32_MulS_EDX); + be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], env->irg, env->block, 1, &proj); + } + return muls; } @@ -2973,6 +3168,7 @@ void ia32_register_transformers(void) { GEN(be_FrameStore); GEN(be_StackParam); GEN(be_AddSP); + GEN(be_SubSP); /* set the register for all Unknown nodes */ GEN(Unknown); @@ -3168,7 +3364,8 @@ void ia32_transform_psi_cond_tree(ir_node *node, void *env) { if (is_Proj(psi_sel)) return; - mode = get_irn_mode(node); + //mode = get_irn_mode(node); + mode = mode_Iu; transform_psi_cond(psi_sel, mode, cg); @@ -3176,10 +3373,17 @@ void ia32_transform_psi_cond_tree(ir_node *node, void *env) { block = get_nodes_block(node); /* we need to compare the evaluated condition tree with 0 */ - - /* BEWARE: new_r_Const_long works for floating point as well */ - new_cmp = new_r_Cmp(irg, block, psi_sel, new_r_Const_long(irg, block, mode, 0)); - new_cmp = new_r_Proj(irg, block, new_cmp, mode_b, pn_Cmp_Ne + (mode_is_float(mode) ? pn_Cmp_Uo : 0)); + mode = get_irn_mode(node); + if (mode_is_float(mode)) { + psi_sel = gen_sse_conv_int2float(cg, NULL, irg, block, psi_sel, NULL, mode); + /* BEWARE: new_r_Const_long works for floating point as well */ + new_cmp = new_r_Cmp(irg, block, psi_sel, new_r_Const_long(irg, block, mode, 0)); + new_cmp = new_r_Proj(irg, block, new_cmp, mode_b, pn_Cmp_Ne); + } + else { + new_cmp = new_r_Cmp(irg, block, psi_sel, new_r_Const_long(irg, block, mode_Iu, 0)); + new_cmp = new_r_Proj(irg, block, new_cmp, mode_b, pn_Cmp_Gt | pn_Cmp_Lt); + } set_Psi_cond(node, 0, new_cmp); }