X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_transform.c;h=415100dc69bb05a17e42856ff01b9c442f76a9ed;hb=fe2b614c54399d123b0cb06271604fdd74995ac2;hp=57809b2c3f00a4f4ddd868b1f09539ab1dd86d8a;hpb=cf946e20e9cac9f8e42e7a1fc93886a75db7a80c;p=libfirm

diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c
index 57809b2c3..415100dc6 100644
--- a/ir/be/ia32/ia32_transform.c
+++ b/ir/be/ia32/ia32_transform.c
@@ -195,6 +195,19 @@ static bool is_simple_sse_Const(ir_node *node)
 	return false;
 }
 
+/**
+ * return NoREG or pic_base in case of PIC.
+ * This is necessary as base address for newly created symbols
+ */
+static ir_node *get_symconst_base(void)
+{
+	if (env_cg->birg->main_env->options->pic) {
+		return arch_code_generator_get_pic_base(env_cg);
+	}
+
+	return noreg_GP;
+}
+
 /**
  * Transforms a Const.
  */
@@ -210,6 +223,7 @@ static ir_node *gen_Const(ir_node *node)
 	if (mode_is_float(mode)) {
 		ir_node   *res   = NULL;
 		ir_node   *load;
+		ir_node   *base;
 		ir_entity *floatent;
 
 		if (ia32_cg_config.use_sse2) {
@@ -271,7 +285,9 @@ static ir_node *gen_Const(ir_node *node)
 #endif /* CONSTRUCT_SSE_CONST */
 				floatent = create_float_const_entity(node);
 
-				load     = new_bd_ia32_xLoad(dbgi, block, noreg_GP, noreg_GP, nomem, mode);
+				base     = get_symconst_base();
+				load     = new_bd_ia32_xLoad(dbgi, block, base, noreg_GP, nomem,
+				                             mode);
 				set_ia32_op_type(load, ia32_AddrModeS);
 				set_ia32_am_sc(load, floatent);
 				arch_irn_add_flags(load, arch_irn_flags_rematerializable);
@@ -294,13 +310,7 @@ static ir_node *gen_Const(ir_node *node)
 				/* create_float_const_ent is smart and sometimes creates
 				   smaller entities */
 				ls_mode  = get_type_mode(get_entity_type(floatent));
-
-				if (env_cg->birg->main_env->options->pic) {
-					base = arch_code_generator_get_pic_base(env_cg);
-				} else {
-					base = noreg_GP;
-				}
-
+				base     = get_symconst_base();
 				load     = new_bd_ia32_vfld(dbgi, block, base, noreg_GP, nomem,
 				                            ls_mode);
 				set_ia32_op_type(load, ia32_AddrModeS);
@@ -622,9 +632,10 @@ static void build_address(ia32_address_mode_t *am, ir_node *node,
 	ir_node        *mem;
 	ir_node        *new_mem;
 
+	/* floating point immediates */
 	if (is_Const(node)) {
 		ir_entity *entity  = create_float_const_entity(node);
-		addr->base         = noreg_GP;
+		addr->base         = get_symconst_base();
 		addr->index        = noreg_GP;
 		addr->mem          = nomem;
 		addr->symconst_ent = entity;
@@ -1787,8 +1798,8 @@ static ir_node *gen_Minus(ir_node *node)
 			 * several AM nodes... */
 			ir_node *noreg_xmm = ia32_new_NoReg_xmm(env_cg);
 
-			new_node = new_bd_ia32_xXor(dbgi, block, noreg_GP, noreg_GP,
-			                            nomem, new_op, noreg_xmm);
+			new_node = new_bd_ia32_xXor(dbgi, block, get_symconst_base(),
+			                            noreg_GP, nomem, new_op, noreg_xmm);
 
 			size = get_mode_size_bits(mode);
 			ent  = ia32_gen_fp_known_const(size == 32 ? ia32_SSIGN : ia32_DSIGN);
@@ -1847,8 +1858,8 @@ static ir_node *gen_Abs(ir_node *node)
 
 		if (ia32_cg_config.use_sse2) {
 			ir_node *noreg_fp = ia32_new_NoReg_xmm(env_cg);
-			new_node = new_bd_ia32_xAnd(dbgi, new_block, noreg_GP, noreg_GP,
-			                            nomem, new_op, noreg_fp);
+			new_node = new_bd_ia32_xAnd(dbgi, new_block, get_symconst_base(),
+			                            noreg_GP, nomem, new_op, noreg_fp);
 
 			size = get_mode_size_bits(mode);
 			ent  = ia32_gen_fp_known_const(size == 32 ? ia32_SABS : ia32_DABS);
@@ -1954,10 +1965,17 @@ static ir_node *get_flags_node(ir_node *node, pn_Cmp *pnc_out)
 					}
 				}
 			}
-			flags = be_transform_node(pred);
-			if (mode_is_float(get_irn_mode(get_Cmp_left(pred))))
-				pnc |= ia32_pn_Cmp_float;
+			/* add ia32 compare flags */
+			{
+				ir_node *l    = get_Cmp_left(pred);
+				ir_mode *mode = get_irn_mode(l);
+				if (mode_is_float(mode))
+					pnc |= ia32_pn_Cmp_float;
+				else if (! mode_is_signed(mode))
+					pnc |= ia32_pn_Cmp_unsigned;
+			}
 			*pnc_out = pnc;
+			flags = be_transform_node(pred);
 			return flags;
 		}
 	}
@@ -3116,6 +3134,155 @@ static ir_entity *ia32_create_const_array(ir_node *c0, ir_node *c1, ir_mode **ne
 	return ent;
 }
 
+/**
+ * Possible transformations for creating a Setcc.
+ */
+enum setcc_transform_insn {
+	SETCC_TR_ADD,
+	SETCC_TR_ADDxx,
+	SETCC_TR_LEA,
+	SETCC_TR_LEAxx,
+	SETCC_TR_SHL,
+	SETCC_TR_NEG,
+	SETCC_TR_NOT,
+	SETCC_TR_AND,
+	SETCC_TR_SET,
+	SETCC_TR_SBB,
+};
+
+typedef struct setcc_transform {
+	unsigned num_steps;
+	unsigned permutate_cmp_ins;
+	pn_Cmp   pnc;
+	struct {
+		enum setcc_transform_insn  transform;
+		long val;
+		int  scale;
+	} steps[4];
+} setcc_transform_t;
+
+/**
+ * Setcc can only handle 0 and 1 result.
+ * Find a transformation that creates 0 and 1 from
+ * tv_t and tv_f.
+ */
+static void find_const_transform(pn_Cmp pnc, tarval *t, tarval *f, setcc_transform_t *res, int can_permutate)
+{
+	unsigned step = 0;
+
+	res->num_steps = 0;
+	res->permutate_cmp_ins = 0;
+
+	if (tarval_is_null(t)) {
+		tarval *tmp = t;
+		t = f;
+		f = tmp;
+		pnc = ia32_get_negated_pnc(pnc);
+	} else if (tarval_cmp(t, f) == pn_Cmp_Lt) {
+		// now, t is the bigger one
+		tarval *tmp = t;
+		t = f;
+		f = tmp;
+		pnc = ia32_get_negated_pnc(pnc);
+	}
+	res->pnc = pnc;
+
+	if (! tarval_is_null(f)) {
+		tarval *t_sub = tarval_sub(t, f, NULL);
+
+		t = t_sub;
+		res->steps[step].transform = SETCC_TR_ADD;
+
+		if (t == tarval_bad)
+			panic("constant subtract failed");
+		if (! tarval_is_long(f))
+			panic("tarval is not long");
+
+		res->steps[step].val = get_tarval_long(f);
+		++step;
+		f = tarval_sub(f, f, NULL);
+		assert(tarval_is_null(f));
+	}
+
+	if (tarval_is_one(t)) {
+		res->steps[step].transform = SETCC_TR_SET;
+		res->num_steps = ++step;
+		return;
+	}
+
+	if (tarval_is_minus_one(t)) {
+		res->steps[step].transform = SETCC_TR_NEG;
+		++step;
+		res->steps[step].transform = SETCC_TR_SET;
+		res->num_steps = ++step;
+		return;
+	}
+	if (tarval_is_long(t)) {
+		long v = get_tarval_long(t);
+
+		res->steps[step].val = 0;
+		switch (v) {
+		case 9:
+			if (step > 0 && res->steps[step - 1].transform == SETCC_TR_ADD)
+				--step;
+			res->steps[step].transform = SETCC_TR_LEAxx;
+			res->steps[step].scale     = 3; /* (a << 3) + a */
+			break;
+		case 8:
+			if (step > 0 && res->steps[step - 1].transform == SETCC_TR_ADD)
+				--step;
+			res->steps[step].transform = res->steps[step].val == 0 ? SETCC_TR_SHL : SETCC_TR_LEA;
+			res->steps[step].scale     = 3; /* (a << 3) */
+			break;
+		case 5:
+			if (step > 0 && res->steps[step - 1].transform == SETCC_TR_ADD)
+				--step;
+			res->steps[step].transform = SETCC_TR_LEAxx;
+			res->steps[step].scale     = 2; /* (a << 2) + a */
+			break;
+		case 4:
+			if (step > 0 && res->steps[step - 1].transform == SETCC_TR_ADD)
+				--step;
+			res->steps[step].transform = res->steps[step].val == 0 ? SETCC_TR_SHL : SETCC_TR_LEA;
+			res->steps[step].scale     = 2; /* (a << 2) */
+			break;
+		case 3:
+			if (step > 0 && res->steps[step - 1].transform == SETCC_TR_ADD)
+				--step;
+			res->steps[step].transform = SETCC_TR_LEAxx;
+			res->steps[step].scale     = 1; /* (a << 1) + a */
+			break;
+		case 2:
+			if (step > 0 && res->steps[step - 1].transform == SETCC_TR_ADD)
+				--step;
+			res->steps[step].transform = res->steps[step].val == 0 ? SETCC_TR_SHL : SETCC_TR_LEA;
+			res->steps[step].scale     = 1; /* (a << 1) */
+			break;
+		case 1:
+			res->num_steps = step;
+			return;
+		default:
+			if (! tarval_is_single_bit(t)) {
+				res->steps[step].transform = SETCC_TR_AND;
+				res->steps[step].val       = v;
+				++step;
+				res->steps[step].transform = SETCC_TR_NEG;
+			} else {
+				int v = get_tarval_lowest_bit(t);
+				assert(v >= 0);
+
+				res->steps[step].transform = SETCC_TR_SHL;
+				res->steps[step].scale     = v;
+			}
+		}
+		++step;
+		res->steps[step].transform = SETCC_TR_SET;
+		res->num_steps = ++step;
+		return;
+	}
+	panic("tarval is not long");
+}
+
 /**
  * Transforms a Mux node into some code sequence.
  *
@@ -3215,7 +3382,7 @@ static ir_node *gen_Mux(ir_node *node)
 			}
 
 			am.ls_mode            = new_mode;
-			am.addr.base          = noreg_GP;
+			am.addr.base          = get_symconst_base();
 			am.addr.index         = new_node;
 			am.addr.mem           = nomem;
 			am.addr.offset        = 0;
@@ -3270,17 +3437,70 @@ static ir_node *gen_Mux(ir_node *node)
 
 		if (is_Const(mux_true) && is_Const(mux_false)) {
 			/* both are const, good */
-			if (is_Const_1(mux_true) && is_Const_0(mux_false)) {
-				new_node = create_set_32bit(dbgi, new_block, flags, pnc, node);
-			} else if (is_Const_0(mux_true) && is_Const_1(mux_false)) {
-				pnc = ia32_get_negated_pnc(pnc);
-				new_node = create_set_32bit(dbgi, new_block, flags, pnc, node);
-			} else {
-				/* Not that simple. */
-				goto need_cmov;
+			tarval *tv_true = get_Const_tarval(mux_true);
+			tarval *tv_false = get_Const_tarval(mux_false);
+			setcc_transform_t res;
+			int step;
+
+			/* check if flags is a cmp node and we are the only user,
+			   i.e no other user yet */
+			int permutate_allowed = 0;
+			if (is_ia32_Cmp(flags) && get_irn_n_edges(flags) == 0) {
+				/* yes, we can permutate its inputs */
+				permutate_allowed = 1;
+			}
+			find_const_transform(pnc, tv_true, tv_false, &res, 0);
+			new_node = node;
+			if (res.permutate_cmp_ins) {
+				ia32_attr_t *attr = get_ia32_attr(flags);
+				attr->data.ins_permuted ^= 1;
+			}
+			for (step = (int)res.num_steps - 1; step >= 0; --step) {
+				ir_node *imm;
+
+				switch (res.steps[step].transform) {
+				case SETCC_TR_ADD:
+					imm = ia32_immediate_from_long(res.steps[step].val);
+					new_node = new_bd_ia32_Add(dbgi, new_block, noreg_GP, noreg_GP, nomem, new_node, imm);
+					break;
+				case SETCC_TR_ADDxx:
+					new_node = new_bd_ia32_Lea(dbgi, new_block, new_node, new_node);
+					break;
+				case SETCC_TR_LEA:
+					new_node = new_bd_ia32_Lea(dbgi, new_block, noreg_GP, new_node);
+					set_ia32_am_scale(new_node, res.steps[step].scale);
+					set_ia32_am_offs_int(new_node, res.steps[step].val);
+					break;
+				case SETCC_TR_LEAxx:
+					new_node = new_bd_ia32_Lea(dbgi, new_block, new_node, new_node);
+					set_ia32_am_scale(new_node, res.steps[step].scale);
+					set_ia32_am_offs_int(new_node, res.steps[step].val);
+					break;
+				case SETCC_TR_SHL:
+					imm = ia32_immediate_from_long(res.steps[step].scale);
+					new_node = new_bd_ia32_Shl(dbgi, new_block, new_node, imm);
+					break;
+				case SETCC_TR_NEG:
+					new_node = new_bd_ia32_Neg(dbgi, new_block, new_node);
+					break;
+				case SETCC_TR_NOT:
+					new_node = new_bd_ia32_Not(dbgi, new_block, new_node);
+					break;
+				case SETCC_TR_AND:
+					imm = ia32_immediate_from_long(res.steps[step].val);
+					new_node = new_bd_ia32_And(dbgi, new_block, noreg_GP, noreg_GP, nomem, new_node, imm);
+					break;
+				case SETCC_TR_SET:
+					new_node = create_set_32bit(dbgi, new_block, flags, res.pnc, new_node);
+					break;
+				case SETCC_TR_SBB:
+					new_node = new_bd_ia32_Sbb0(dbgi, new_block, flags);
+					break;
+				default:
+					panic("unknown setcc transform");
+				}
 			}
 		} else {
-need_cmov:
 			new_node = create_CMov(node, cond, flags, pnc);
 		}
 		return new_node;
@@ -4124,7 +4344,7 @@ static ir_node *gen_ia32_l_LLtoFloat(ir_node *node)
 		ir_node *count = ia32_create_Immediate(NULL, 0, 31);
 		ir_node *fadd;
 
-		am.addr.base          = noreg_GP;
+		am.addr.base          = get_symconst_base();
 		am.addr.index         = new_bd_ia32_Shr(dbgi, block, new_val_high, count);
 		am.addr.mem           = nomem;
 		am.addr.offset        = 0;