X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_spec.pl;h=ebffcad201e8842e759011d9714d8a4377ca89dd;hb=bba15007f36643c7c6f9281c8be00d8511bfb4f9;hp=121aa277c6bac1687e5e4d0593098d60e77d3f3c;hpb=2f9e18ba8e4f89bde65e00029fde27bc99039cef;p=libfirm diff --git a/ir/be/ia32/ia32_spec.pl b/ir/be/ia32/ia32_spec.pl index 121aa277c..ebffcad20 100644 --- a/ir/be/ia32/ia32_spec.pl +++ b/ir/be/ia32/ia32_spec.pl @@ -2,181 +2,79 @@ # $Id$ # This is the specification for the ia32 assembler Firm-operations -use File::Basename; - -$new_emit_syntax = 1; -my $myname = $0; - -# the cpu architecture (ia32, ia64, mips, sparc, ppc, ...) $arch = "ia32"; -# The node description is done as a perl hash initializer with the -# following structure: -# -# %nodes = ( -# -# => { -# op_flags => "N|L|C|X|I|F|Y|H|c|K", -# irn_flags => "R|N|I|S" -# arity => "0|1|2|3 ... |variable|dynamic|any", -# state => "floats|pinned|mem_pinned|exc_pinned", -# args => [ -# { type => "type 1", name => "name 1" }, -# { type => "type 2", name => "name 2" }, -# ... -# ], -# comment => "any comment for constructor", -# reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] }, -# cmp_attr => "c source code for comparing node attributes", -# outs => { "out1", "out2" } # optional, creates pn_op_out1, ... consts -# ins => { "in1", "in2" } # optional, creates n_op_in1, ... consts -# mode => "mode_Iu" # optional, predefines the mode -# emit => "emit code with templates", -# attr => "attitional attribute arguments for constructor", -# init_attr => "emit attribute initialization template", -# rd_constructor => "c source code which constructs an ir_node", -# hash_func => "name of the hash function for this operation", -# latency => "latency of this operation (can be float)" -# attr_type => "name of the attribute struct", -# }, -# -# ... # (all nodes you need to describe) -# -# ); # close the %nodes initializer - -# op_flags: flags for the operation, OPTIONAL (default is "N") -# the op_flags correspond to the firm irop_flags: -# N irop_flag_none -# L irop_flag_labeled -# C irop_flag_commutative -# X irop_flag_cfopcode -# I irop_flag_ip_cfopcode -# F irop_flag_fragile -# Y irop_flag_forking -# H irop_flag_highlevel -# c irop_flag_constlike -# K irop_flag_keep -# NB irop_flag_dump_noblock -# NI irop_flag_dump_noinput -# -# irn_flags: special node flags, OPTIONAL (default is 0) -# following irn_flags are supported: -# R rematerializeable -# N not spillable -# I ignore for register allocation -# S modifies stack pointer -# -# state: state of the operation, OPTIONAL (default is "floats") -# -# arity: arity of the operation, MUST NOT BE OMITTED -# -# args: the OPTIONAL arguments of the node constructor (debug, irg and block -# are always the first 3 arguments and are always autmatically -# created) -# If this key is missing the following arguments will be created: -# for i = 1 .. arity: ir_node *op_i -# ir_mode *mode -# -# outs: if a node defines more than one output, the names of the projections -# nodes having outs having automatically the mode mode_T -# One can also annotate some flags for each out, additional to irn_flags. -# They are separated from name with a colon ':', and concatenated by pipe '|' -# Only I and S are available at the moment (same meaning as in irn_flags). -# example: [ "frame:I", "stack:I|S", "M" ] -# -# comment: OPTIONAL comment for the node constructor -# -# rd_constructor: for every operation there will be a -# new_rd__ function with the arguments from above -# which creates the ir_node corresponding to the defined operation -# you can either put the complete source code of this function here -# -# This key is OPTIONAL. If omitted, the following constructor will -# be created: -# if (!op__) assert(0); -# for i = 1 to arity -# set in[i] = op_i -# done -# res = new_ir_node(db, irg, block, op__, mode, arity, in) -# return res -# -# NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3 -# - # register types: -# 0 - no special type -# 1 - caller save (register must be saved by the caller of a function) -# 2 - callee save (register must be saved by the called function) -# 4 - ignore (do not assign this register) -# 8 - emitter can choose an arbitrary register of this class -# 16 - the register is a virtual one -# 32 - register represents a state +$normal = 0; # no special type +$caller_save = 1; # caller save (register must be saved by the caller of a function) +$callee_save = 2; # callee save (register must be saved by the called function) +$ignore = 4; # ignore (do not assign this register) +$arbitrary = 8; # emitter can choose an arbitrary register of this class +$virtual = 16; # the register is a virtual one +$state = 32; # register represents a state # NOTE: Last entry of each class is the largest Firm-Mode a register can hold %reg_classes = ( gp => [ - { name => "edx", type => 1 }, - { name => "ecx", type => 1 }, - { name => "eax", type => 1 }, - { name => "ebx", type => 2 }, - { name => "esi", type => 2 }, - { name => "edi", type => 2 }, - { name => "ebp", type => 2 }, - { name => "esp", type => 4 }, - { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes - { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes + { name => "edx", type => $caller_save }, + { name => "ecx", type => $caller_save }, + { name => "eax", type => $caller_save }, + { name => "ebx", type => $callee_save }, + { name => "esi", type => $callee_save }, + { name => "edi", type => $callee_save }, + { name => "ebp", type => $callee_save }, + { name => "esp", type => $ignore }, + { name => "gp_NOREG", type => $ignore | $arbitrary | $virtual }, # we need a dummy register for NoReg nodes { mode => "mode_Iu" } ], mmx => [ - { name => "mm0", type => 4 }, - { name => "mm1", type => 4 }, - { name => "mm2", type => 4 }, - { name => "mm3", type => 4 }, - { name => "mm4", type => 4 }, - { name => "mm5", type => 4 }, - { name => "mm6", type => 4 }, - { name => "mm7", type => 4 }, + { name => "mm0", type => $ignore }, + { name => "mm1", type => $ignore }, + { name => "mm2", type => $ignore }, + { name => "mm3", type => $ignore }, + { name => "mm4", type => $ignore }, + { name => "mm5", type => $ignore }, + { name => "mm6", type => $ignore }, + { name => "mm7", type => $ignore }, { mode => "mode_E", flags => "manual_ra" } ], xmm => [ - { name => "xmm0", type => 1 }, - { name => "xmm1", type => 1 }, - { name => "xmm2", type => 1 }, - { name => "xmm3", type => 1 }, - { name => "xmm4", type => 1 }, - { name => "xmm5", type => 1 }, - { name => "xmm6", type => 1 }, - { name => "xmm7", type => 1 }, - { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes - { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes + { name => "xmm0", type => $caller_save }, + { name => "xmm1", type => $caller_save }, + { name => "xmm2", type => $caller_save }, + { name => "xmm3", type => $caller_save }, + { name => "xmm4", type => $caller_save }, + { name => "xmm5", type => $caller_save }, + { name => "xmm6", type => $caller_save }, + { name => "xmm7", type => $caller_save }, + { name => "xmm_NOREG", type => $ignore | $virtual }, # we need a dummy register for NoReg nodes { mode => "mode_E" } ], vfp => [ - { name => "vf0", type => 1 | 16 }, - { name => "vf1", type => 1 | 16 }, - { name => "vf2", type => 1 | 16 }, - { name => "vf3", type => 1 | 16 }, - { name => "vf4", type => 1 | 16 }, - { name => "vf5", type => 1 | 16 }, - { name => "vf6", type => 1 | 16 }, - { name => "vf7", type => 1 | 16 }, - { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes - { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes + { name => "vf0", type => $caller_save }, + { name => "vf1", type => $caller_save }, + { name => "vf2", type => $caller_save }, + { name => "vf3", type => $caller_save }, + { name => "vf4", type => $caller_save }, + { name => "vf5", type => $caller_save }, + { name => "vf6", type => $caller_save }, + { name => "vf7", type => $caller_save }, + { name => "vfp_NOREG", type => $ignore | $arbitrary | $virtual }, # we need a dummy register for NoReg nodes { mode => "mode_E" } ], st => [ - { name => "st0", realname => "st", type => 4 }, - { name => "st1", realname => "st(1)", type => 4 }, - { name => "st2", realname => "st(2)", type => 4 }, - { name => "st3", realname => "st(3)", type => 4 }, - { name => "st4", realname => "st(4)", type => 4 }, - { name => "st5", realname => "st(5)", type => 4 }, - { name => "st6", realname => "st(6)", type => 4 }, - { name => "st7", realname => "st(7)", type => 4 }, + { name => "st0", realname => "st", type => $ignore }, + { name => "st1", realname => "st(1)", type => $ignore }, + { name => "st2", realname => "st(2)", type => $ignore }, + { name => "st3", realname => "st(3)", type => $ignore }, + { name => "st4", realname => "st(4)", type => $ignore }, + { name => "st5", realname => "st(5)", type => $ignore }, + { name => "st6", realname => "st(6)", type => $ignore }, + { name => "st7", realname => "st(7)", type => $ignore }, { mode => "mode_E", flags => "manual_ra" } ], fp_cw => [ # the floating point control word - { name => "fpcw", type => 4|32 }, - { mode => "mode_fpcw", flags => "manual_ra|state" } + { name => "fpcw", type => $ignore | $state }, + { mode => "ia32_mode_fpcw", flags => "manual_ra|state" } ], flags => [ { name => "eflags", type => 0 }, @@ -201,19 +99,22 @@ $arch = "ia32"; S1 => "${arch}_emit_source_register(node, 1);", S2 => "${arch}_emit_source_register(node, 2);", S3 => "${arch}_emit_source_register(node, 3);", + SB0 => "${arch}_emit_8bit_source_register_or_immediate(node, 0);", SB1 => "${arch}_emit_8bit_source_register_or_immediate(node, 1);", SB2 => "${arch}_emit_8bit_source_register_or_immediate(node, 2);", SB3 => "${arch}_emit_8bit_source_register_or_immediate(node, 3);", + SH0 => "${arch}_emit_8bit_high_source_register(node, 0);", + SS0 => "${arch}_emit_16bit_source_register_or_immediate(node, 0);", + SI0 => "${arch}_emit_source_register_or_immediate(node, 0);", SI1 => "${arch}_emit_source_register_or_immediate(node, 1);", SI3 => "${arch}_emit_source_register_or_immediate(node, 3);", D0 => "${arch}_emit_dest_register(node, 0);", D1 => "${arch}_emit_dest_register(node, 1);", + DS0 => "${arch}_emit_dest_register_size(node, 0);", DB0 => "${arch}_emit_8bit_dest_register(node, 0);", X0 => "${arch}_emit_x87_register(node, 0);", X1 => "${arch}_emit_x87_register(node, 1);", - SE => "${arch}_emit_extend_suffix(get_ia32_ls_mode(node));", - ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n - ia32_emit_mode_suffix(node);", + EX => "${arch}_emit_extend_suffix(node);", M => "${arch}_emit_mode_suffix(node);", XM => "${arch}_emit_x87_mode_suffix(node);", XXM => "${arch}_emit_xmm_mode_suffix(node);", @@ -223,41 +124,31 @@ $arch = "ia32"; unop4 => "${arch}_emit_unop(node, n_ia32_binary_right);", binop => "${arch}_emit_binop(node);", x87_binop => "${arch}_emit_x87_binop(node);", - CMP0 => "${arch}_emit_cmp_suffix_node(node, 0);", CMP3 => "${arch}_emit_cmp_suffix_node(node, 3);", ); -#--------------------------------------------------# -# _ # -# (_) # -# _ __ _____ __ _ _ __ ___ _ __ ___ # -# | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| # -# | | | | __/\ V V / | | | | (_) | |_) \__ \ # -# |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ # -# | | # -# |_| # -#--------------------------------------------------# + + $default_op_attr_type = "ia32_op_attr_t"; $default_attr_type = "ia32_attr_t"; $default_copy_attr = "ia32_copy_attr"; sub ia32_custom_init_attr { - my $node = shift; - my $name = shift; - my $res = ""; + my $constr = shift; + my $node = shift; + my $name = shift; + my $res = ""; if(defined($node->{modified_flags})) { - $res .= "\tset_ia32_flags(res, get_ia32_flags(res) | arch_irn_flags_modify_flags);\n"; + $res .= "\tarch_irn_add_flags(res, arch_irn_flags_modify_flags);\n"; } if(defined($node->{am})) { my $am = $node->{am}; if($am eq "source,unary") { - $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_unary);"; + $res .= "\tset_ia32_am_support(res, ia32_am_unary);"; } elsif($am eq "source,binary") { - $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_binary);"; - } elsif($am eq "source,ternary") { - $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_ternary);"; + $res .= "\tset_ia32_am_support(res, ia32_am_binary);"; } elsif($am eq "none") { # nothing to do } else { @@ -276,53 +167,66 @@ $custom_init_attr_func = \&ia32_custom_init_attr; %init_attr = ( ia32_asm_attr_t => - "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n". + "\tinit_ia32_attributes(res, flags, in_reqs, exec_units, n_res);\n". "\tinit_ia32_x87_attributes(res);". "\tinit_ia32_asm_attributes(res);", ia32_attr_t => - "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);", + "\tinit_ia32_attributes(res, flags, in_reqs, exec_units, n_res);", + ia32_call_attr_t => + "\tinit_ia32_attributes(res, flags, in_reqs, exec_units, n_res);\n". + "\tinit_ia32_call_attributes(res, pop, call_tp);", ia32_condcode_attr_t => - "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n". - "\tinit_ia32_condcode_attributes(res, pnc);", + "\tinit_ia32_attributes(res, flags, in_reqs, exec_units, n_res);\n". + "\tinit_ia32_condcode_attributes(res, condition_code);", + ia32_switch_attr_t => + "\tinit_ia32_attributes(res, flags, in_reqs, exec_units, n_res);\n". + "\tinit_ia32_switch_attributes(res, default_pn);", ia32_copyb_attr_t => - "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n". + "\tinit_ia32_attributes(res, flags, in_reqs, exec_units, n_res);\n". "\tinit_ia32_copyb_attributes(res, size);", ia32_immediate_attr_t => - "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n". - "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);", + "\tinit_ia32_attributes(res, flags, in_reqs, exec_units, n_res);\n". + "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, no_pic_adjust, offset);", ia32_x87_attr_t => - "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n". + "\tinit_ia32_attributes(res, flags, in_reqs, exec_units, n_res);\n". "\tinit_ia32_x87_attributes(res);", + ia32_climbframe_attr_t => + "\tinit_ia32_attributes(res, flags, in_reqs, exec_units, n_res);\n". + "\tinit_ia32_climbframe_attributes(res, count);", ); %compare_attr = ( - ia32_asm_attr_t => "ia32_compare_asm_attr", - ia32_attr_t => "ia32_compare_nodes_attr", - ia32_condcode_attr_t => "ia32_compare_condcode_attr", - ia32_copyb_attr_t => "ia32_compare_copyb_attr", - ia32_immediate_attr_t => "ia32_compare_immediate_attr", - ia32_x87_attr_t => "ia32_compare_x87_attr", + ia32_asm_attr_t => "ia32_compare_asm_attr", + ia32_attr_t => "ia32_compare_nodes_attr", + ia32_call_attr_t => "ia32_compare_call_attr", + ia32_condcode_attr_t => "ia32_compare_condcode_attr", + ia32_switch_attr_t => "ia32_compare_switch_attr", + ia32_copyb_attr_t => "ia32_compare_copyb_attr", + ia32_immediate_attr_t => "ia32_compare_immediate_attr", + ia32_x87_attr_t => "ia32_compare_x87_attr", + ia32_climbframe_attr_t => "ia32_compare_climbframe_attr", ); %operands = ( ); -$mode_xmm = "mode_E"; -$mode_gp = "mode_Iu"; -$mode_flags = "mode_Iu"; -$mode_fpcw = "mode_fpcw"; -$status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ]; -$fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM", - "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ]; +$mode_xmm = "mode_E"; +$mode_gp = "mode_Iu"; +$mode_flags = "mode_Iu"; +$mode_fpcw = "ia32_mode_fpcw"; +$status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ]; +$status_flags_wo_cf = [ "PF", "AF", "ZF", "SF", "OF" ]; +$fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM", + "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ]; %nodes = ( Immediate => { state => "pinned", - op_flags => "c", - irn_flags => "I", - reg_req => { out => [ "gp_NOREG" ] }, - attr => "ir_entity *symconst, int symconst_sign, long offset", + op_flags => [ "constlike" ], + irn_flags => [ "not_scheduled" ], + reg_req => { out => [ "gp_NOREG:I" ] }, + attr => "ir_entity *symconst, int symconst_sign, int no_pic_adjust, long offset", attr_type => "ia32_immediate_attr_t", hash_func => "ia32_hash_Immediate", latency => 0, @@ -338,13 +242,13 @@ Asm => { init_attr => "attr->asm_text = asm_text;\n". "\tattr->register_map = register_map;\n", latency => 10, - modified_flags => 1, + modified_flags => $status_flags, }, # "allocates" a free register ProduceVal => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike", "cse_neutral" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "gp" ] }, emit => "", units => [ ], @@ -353,21 +257,8 @@ ProduceVal => { cmp_attr => "return 1;", }, -#-----------------------------------------------------------------# -# _ _ _ # -# (_) | | | | # -# _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ # -# | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| # -# | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ # -# |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ # -# __/ | # -# |___/ # -#-----------------------------------------------------------------# - -# commutative operations - Add => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5", "flags", "none" ] }, @@ -382,7 +273,7 @@ Add => { }, AddMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -394,7 +285,7 @@ AddMem => { }, AddMem8Bit => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -420,7 +311,7 @@ Adc => { }, l_Add => { - op_flags => "C", + op_flags => [ "constlike" ], reg_req => { in => [ "none", "none" ], out => [ "none" ] }, ins => [ "left", "right" ], }, @@ -435,10 +326,10 @@ Mul => { # very strict constraints state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ], - out => [ "eax", "edx", "none" ] }, + out => [ "eax", "flags", "none", "edx" ] }, ins => [ "base", "index", "mem", "left", "right" ], emit => '. mul%M %unop4', - outs => [ "res_low", "res_high", "M" ], + outs => [ "res_low", "flags", "M", "res_high" ], am => "source,binary", latency => 10, units => [ "GP" ], @@ -448,14 +339,16 @@ Mul => { l_Mul => { # we should not rematrialize this node. It produces 2 results and has # very strict constraints - op_flags => "C", + op_flags => [ "constlike" ], cmp_attr => "return 1;", - outs => [ "EAX", "EDX", "M" ], - arity => 2 + reg_req => { in => [ "none", "none" ], + out => [ "none", "none", "none", "none" ] }, + ins => [ "left", "right" ], + outs => [ "res_low", "flags", "M", "res_high" ], }, IMul => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", # TODO: adjust out requirements for the 3 operand form # (no need for should_be_same then) @@ -471,13 +364,13 @@ IMul => { }, IMul1OP => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ], - out => [ "eax", "edx", "none" ] }, + out => [ "eax", "flags", "none", "edx" ] }, ins => [ "base", "index", "mem", "left", "right" ], emit => '. imul%M %unop4', - outs => [ "res_low", "res_high", "M" ], + outs => [ "res_low", "flags", "M", "res_high" ], am => "source,binary", latency => 5, units => [ "GP" ], @@ -485,20 +378,21 @@ IMul1OP => { }, l_IMul => { - op_flags => "C", + op_flags => [ "constlike" ], cmp_attr => "return 1;", - outs => [ "res_low", "res_high", "M" ], - arity => 2 + reg_req => { in => [ "none", "none" ], + out => [ "none", "none", "none", "none" ] }, + ins => [ "left", "right" ], + outs => [ "res_low", "flags", "M", "res_high" ], }, And => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5", "flags", "none" ] }, ins => [ "base", "index", "mem", "left", "right" ], outs => [ "res", "flags", "M" ], - op_modes => "commutative | am | immediate | mode_neutral", am => "source,binary", emit => '. and%M %binop', units => [ "GP" ], @@ -508,7 +402,7 @@ And => { }, AndMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -520,7 +414,7 @@ AndMem => { }, AndMem8Bit => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -532,7 +426,7 @@ AndMem8Bit => { }, Or => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5", "flags", "none" ] }, @@ -547,7 +441,7 @@ Or => { }, OrMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -559,7 +453,7 @@ OrMem => { }, OrMem8Bit => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -571,7 +465,7 @@ OrMem8Bit => { }, Xor => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5", "flags", "none" ] }, @@ -585,8 +479,20 @@ Xor => { modified_flags => $status_flags }, +Xor0 => { + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], + reg_req => { out => [ "gp", "flags" ] }, + outs => [ "res", "flags" ], + emit => ". xor%M %D0, %D0", + units => [ "GP" ], + latency => 1, + mode => $mode_gp, + modified_flags => $status_flags +}, + XorMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -598,7 +504,7 @@ XorMem => { }, XorMem8Bit => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -609,10 +515,8 @@ XorMem8Bit => { modified_flags => $status_flags }, -# not commutative operations - Sub => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4", "flags", "none" ] }, @@ -627,7 +531,7 @@ Sub => { }, SubMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "subtrahend" ], @@ -639,7 +543,7 @@ SubMem => { }, SubMem8Bit => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "subtrahend" ], @@ -664,6 +568,18 @@ Sbb => { modified_flags => $status_flags }, +Sbb0 => { + # Spiller currently fails when rematerializing flag consumers + # irn_flags => [ "rematerializable" ], + reg_req => { in => [ "flags" ], out => [ "gp", "flags" ] }, + outs => [ "res", "flags" ], + emit => ". sbb%M %D0, %D0", + units => [ "GP" ], + latency => 1, + mode => $mode_gp, + modified_flags => $status_flags +}, + l_Sub => { reg_req => { in => [ "none", "none" ], out => [ "none" ] }, ins => [ "minuend", "subtrahend" ], @@ -675,13 +591,13 @@ l_Sbb => { }, IDiv => { - op_flags => "F|L", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "eax", "edx" ], out => [ "eax", "flags", "none", "edx", "none" ] }, ins => [ "base", "index", "mem", "divisor", "dividend_low", "dividend_high" ], outs => [ "div_res", "flags", "M", "mod_res", "X_exc" ], - am => "source,ternary", + am => "source,unary", emit => ". idiv%M %unop3", latency => 25, units => [ "GP" ], @@ -689,13 +605,13 @@ IDiv => { }, Div => { - op_flags => "F|L", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "eax", "edx" ], out => [ "eax", "flags", "none", "edx", "none" ] }, ins => [ "base", "index", "mem", "divisor", "dividend_low", "dividend_high" ], outs => [ "div_res", "flags", "M", "mod_res", "X_exc" ], - am => "source,ternary", + am => "source,unary", emit => ". div%M %unop3", latency => 25, units => [ "GP" ], @@ -703,12 +619,12 @@ Div => { }, Shl => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2", "flags" ] }, ins => [ "val", "count" ], outs => [ "res", "flags" ], - emit => '. shl %SB1, %S0', + emit => '. shl%M %SB1, %S0', units => [ "GP" ], latency => 1, mode => $mode_gp, @@ -716,7 +632,7 @@ Shl => { }, ShlMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "count" ], @@ -729,12 +645,12 @@ ShlMem => { l_ShlDep => { cmp_attr => "return 1;", + reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] }, ins => [ "val", "count", "dep" ], - arity => 3 }, ShlD => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r2 !in_r3", "flags" ] }, ins => [ "val_high", "val_low", "count" ], @@ -748,17 +664,17 @@ ShlD => { l_ShlD => { cmp_attr => "return 1;", + reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] }, ins => [ "val_high", "val_low", "count" ], - arity => 3, }, Shr => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2", "flags" ] }, ins => [ "val", "count" ], outs => [ "res", "flags" ], - emit => '. shr %SB1, %S0', + emit => '. shr%M %SB1, %S0', units => [ "GP" ], mode => $mode_gp, latency => 1, @@ -766,7 +682,7 @@ Shr => { }, ShrMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "count" ], @@ -779,12 +695,12 @@ ShrMem => { l_ShrDep => { cmp_attr => "return 1;", + reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] }, ins => [ "val", "count", "dep" ], - arity => 3 }, ShrD => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r2 !in_r3", "flags" ] }, ins => [ "val_high", "val_low", "count" ], @@ -798,17 +714,17 @@ ShrD => { l_ShrD => { cmp_attr => "return 1;", - arity => 3, + reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] }, ins => [ "val_high", "val_low", "count" ], }, Sar => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2", "flags" ] }, ins => [ "val", "count" ], outs => [ "res", "flags" ], - emit => '. sar %SB1, %S0', + emit => '. sar%M %SB1, %S0', units => [ "GP" ], latency => 1, mode => $mode_gp, @@ -816,7 +732,7 @@ Sar => { }, SarMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "count" ], @@ -830,16 +746,16 @@ SarMem => { l_SarDep => { cmp_attr => "return 1;", ins => [ "val", "count", "dep" ], - arity => 3 + reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] }, }, Ror => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2", "flags" ] }, ins => [ "val", "count" ], outs => [ "res", "flags" ], - emit => '. ror %SB1, %S0', + emit => '. ror%M %SB1, %S0', units => [ "GP" ], latency => 1, mode => $mode_gp, @@ -847,7 +763,7 @@ Ror => { }, RorMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "count" ], @@ -859,12 +775,12 @@ RorMem => { }, Rol => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2", "flags" ] }, ins => [ "val", "count" ], outs => [ "res", "flags" ], - emit => '. rol %SB1, %S0', + emit => '. rol%M %SB1, %S0', units => [ "GP" ], latency => 1, mode => $mode_gp, @@ -872,7 +788,7 @@ Rol => { }, RolMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "count" ], @@ -883,13 +799,11 @@ RolMem => { modified_flags => $status_flags }, -# unary operations - Neg => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], out => [ "in_r1", "flags" ] }, - emit => '. neg %S0', + emit => '. neg%M %S0', ins => [ "val" ], outs => [ "res", "flags" ], units => [ "GP" ], @@ -899,7 +813,7 @@ Neg => { }, NegMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "base", "index", "mem" ], @@ -911,8 +825,8 @@ NegMem => { }, Minus64Bit => { - irn_flags => "R", - reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "gp" ] }, + irn_flags => [ "rematerializable" ], + reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "in_r2" ] }, outs => [ "low_res", "high_res" ], units => [ "GP" ], latency => 3, @@ -921,20 +835,20 @@ Minus64Bit => { Inc => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], out => [ "in_r1", "flags" ] }, ins => [ "val" ], outs => [ "res", "flags" ], - emit => '. inc %S0', + emit => '. inc%M %S0', units => [ "GP" ], mode => $mode_gp, latency => 1, - modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ] + modified_flags => $status_flags_wo_cf }, IncMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "base", "index", "mem" ], @@ -942,24 +856,24 @@ IncMem => { units => [ "GP" ], mode => "mode_M", latency => 1, - modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ] + modified_flags => $status_flags_wo_cf }, Dec => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], out => [ "in_r1", "flags" ] }, ins => [ "val" ], outs => [ "res", "flags" ], - emit => '. dec %S0', + emit => '. dec%M %S0', units => [ "GP" ], mode => $mode_gp, latency => 1, - modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ] + modified_flags => $status_flags_wo_cf }, DecMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "base", "index", "mem" ], @@ -967,16 +881,16 @@ DecMem => { units => [ "GP" ], mode => "mode_M", latency => 1, - modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ] + modified_flags => $status_flags_wo_cf }, Not => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], - out => [ "in_r1", "flags" ] }, + out => [ "in_r1" ] }, ins => [ "val" ], - outs => [ "res", "flags" ], - emit => '. not %S0', + outs => [ "res" ], + emit => '. not%M %S0', units => [ "GP" ], latency => 1, mode => $mode_gp, @@ -984,7 +898,7 @@ Not => { }, NotMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "base", "index", "mem" ], @@ -996,8 +910,8 @@ NotMem => { }, Cmc => { - reg_req => { in => [ "flags" ], out => [ "flags" ] }, - emit => '.cmc', + reg_req => { in => [ "flags" ], out => [ "flags" ] }, + emit => '.cmc', units => [ "GP" ], latency => 1, mode => $mode_flags, @@ -1005,18 +919,16 @@ Cmc => { }, Stc => { - reg_req => { out => [ "flags" ] }, - emit => '.stc', + reg_req => { out => [ "flags" ] }, + emit => '.stc', units => [ "GP" ], latency => 1, mode => $mode_flags, modified_flags => $status_flags }, -# other operations - Cmp => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "flags", "none", "none" ] }, @@ -1024,9 +936,8 @@ Cmp => { outs => [ "eflags", "unused", "M" ], am => "source,binary", emit => '. cmp%M %binop', - attr => "int ins_permuted, int cmp_unsigned", - init_attr => "attr->data.ins_permuted = ins_permuted;\n". - "\tattr->data.cmp_unsigned = cmp_unsigned;\n", + attr => "bool ins_permuted", + init_attr => "attr->data.ins_permuted = ins_permuted;", latency => 1, units => [ "GP" ], mode => $mode_flags, @@ -1034,33 +945,47 @@ Cmp => { }, Cmp8Bit => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] , out => [ "flags" ] }, + reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] , + out => [ "flags", "none", "none" ] }, ins => [ "base", "index", "mem", "left", "right" ], - outs => [ "eflags" ], + outs => [ "eflags", "unused", "M" ], am => "source,binary", emit => '. cmpb %binop', - attr => "int ins_permuted, int cmp_unsigned", - init_attr => "attr->data.ins_permuted = ins_permuted;\n". - "\tattr->data.cmp_unsigned = cmp_unsigned;\n", + attr => "bool ins_permuted", + init_attr => "attr->data.ins_permuted = ins_permuted;", latency => 1, units => [ "GP" ], mode => $mode_flags, modified_flags => $status_flags }, +XorHighLow => { + irn_flags => [ "rematerializable" ], + state => "exc_pinned", + reg_req => { in => [ "eax ebx ecx edx" ], + out => [ "in_r1", "flags" ] }, + emit => '. xorb %SH0, %SB0', + ins => [ "value" ], + outs => [ "res", "flags" ], + units => [ "GP" ], + latency => 1, + mode => $mode_gp, + modified_flags => $status_flags, +}, + Test => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ] , out => [ "flags" ] }, + reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ] , + out => [ "flags", "none", "none" ] }, ins => [ "base", "index", "mem", "left", "right" ], - outs => [ "eflags" ], + outs => [ "eflags", "unused", "M" ], am => "source,binary", emit => '. test%M %binop', - attr => "int ins_permuted, int cmp_unsigned", - init_attr => "attr->data.ins_permuted = ins_permuted;\n". - "\tattr->data.cmp_unsigned = cmp_unsigned;\n", + attr => "bool ins_permuted", + init_attr => "attr->data.ins_permuted = ins_permuted;", latency => 1, units => [ "GP" ], mode => $mode_flags, @@ -1068,62 +993,67 @@ Test => { }, Test8Bit => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] , out => [ "flags" ] }, + reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] , + out => [ "flags", "none", "none" ] }, ins => [ "base", "index", "mem", "left", "right" ], - outs => [ "eflags" ], + outs => [ "eflags", "unused", "M" ], am => "source,binary", emit => '. testb %binop', - attr => "int ins_permuted, int cmp_unsigned", - init_attr => "attr->data.ins_permuted = ins_permuted;\n". - "\tattr->data.cmp_unsigned = cmp_unsigned;\n", + attr => "bool ins_permuted", + init_attr => "attr->data.ins_permuted = ins_permuted;", latency => 1, units => [ "GP" ], mode => $mode_flags, modified_flags => $status_flags }, -Set => { - #irn_flags => "R", +Setcc => { + #irn_flags => [ "rematerializable" ], reg_req => { in => [ "eflags" ], out => [ "eax ebx ecx edx" ] }, ins => [ "eflags" ], + outs => [ "res" ], attr_type => "ia32_condcode_attr_t", - attr => "pn_Cmp pnc, int ins_permuted", - init_attr => "attr->attr.data.ins_permuted = ins_permuted;\n". - "\tset_ia32_ls_mode(res, mode_Bu);\n", - emit => '. set%CMP0 %DB0', + attr => "ia32_condition_code_t condition_code", + # The way we handle Setcc with float nodes (potentially) destroys the flags + # (when we emit the setX; setp; orb and the setX;setnp;andb sequences) + init_attr => "set_ia32_ls_mode(res, mode_Bu);\n" + . "\tif (condition_code & ia32_cc_additional_float_cases) {\n" + . "\t\tarch_irn_add_flags(res, arch_irn_flags_modify_flags);\n" + . "\t\t/* attr->latency = 3; */\n" + . "\t}\n", latency => 1, units => [ "GP" ], mode => $mode_gp, }, -SetMem => { - #irn_flags => "R", +SetccMem => { + #irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eflags" ], out => [ "none" ] }, ins => [ "base", "index", "mem","eflags" ], attr_type => "ia32_condcode_attr_t", - attr => "pn_Cmp pnc, int ins_permuted", - init_attr => "attr->attr.data.ins_permuted = ins_permuted;\n". - "\tset_ia32_ls_mode(res, mode_Bu);\n", + attr => "ia32_condition_code_t condition_code", + init_attr => "set_ia32_ls_mode(res, mode_Bu);\n", emit => '. set%CMP3 %AM', latency => 1, units => [ "GP" ], mode => 'mode_M', }, -CMov => { - #irn_flags => "R", +CMovcc => { + #irn_flags => [ "rematerializable" ], + state => "exc_pinned", # (note: leave the false,true order intact to make it compatible with other # ia32_binary ops) - state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "eflags" ], out => [ "in_r4 in_r5" ] }, + reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "eflags" ], + out => [ "in_r4 in_r5", "flags", "none" ] }, ins => [ "base", "index", "mem", "val_false", "val_true", "eflags" ], + outs => [ "res", "flags", "M" ], am => "source,binary", attr_type => "ia32_condcode_attr_t", - attr => "int ins_permuted, pn_Cmp pnc", - init_attr => "attr->attr.data.ins_permuted = ins_permuted;", + attr => "ia32_condition_code_t condition_code", latency => 1, units => [ "GP" ], mode => $mode_gp, @@ -1131,31 +1061,42 @@ CMov => { Jcc => { state => "pinned", - op_flags => "L|X|Y", + op_flags => [ "labeled", "cfopcode", "forking" ], reg_req => { in => [ "eflags" ], out => [ "none", "none" ] }, ins => [ "eflags" ], outs => [ "false", "true" ], attr_type => "ia32_condcode_attr_t", - attr => "pn_Cmp pnc", + attr => "ia32_condition_code_t condition_code", latency => 2, units => [ "BRANCH" ], }, SwitchJmp => { state => "pinned", - op_flags => "L|X|Y", - reg_req => { in => [ "gp" ], out => [ "none" ] }, + op_flags => [ "labeled", "cfopcode", "forking" ], + reg_req => { in => [ "gp" ] }, mode => "mode_T", - attr_type => "ia32_condcode_attr_t", - attr => "long pnc", + attr_type => "ia32_switch_attr_t", + attr => "long default_pn", latency => 3, units => [ "BRANCH" ], modified_flags => $status_flags, + init_attr => "info->out_infos = NULL;", # XXX ugly hack for out requirements +}, + +Jmp => { + state => "pinned", + irn_flags => [ "simple_jump" ], + op_flags => [ "cfopcode" ], + reg_req => { out => [ "none" ] }, + latency => 1, + units => [ "BRANCH" ], + mode => "mode_X", }, IJmp => { state => "pinned", - op_flags => "X", + op_flags => [ "cfopcode" ], reg_req => { in => [ "gp", "gp", "none", "gp" ] }, ins => [ "base", "index", "mem", "target" ], am => "source,unary", @@ -1163,21 +1104,31 @@ IJmp => { latency => 1, units => [ "BRANCH" ], mode => "mode_X", + init_attr => "info->out_infos = NULL;", # XXX ugly hack for out requirements }, Const => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "gp" ] }, units => [ "GP" ], - attr => "ir_entity *symconst, int symconst_sign, long offset", + attr => "ir_entity *symconst, int symconst_sign, int no_pic_adjust, long offset", attr_type => "ia32_immediate_attr_t", latency => 1, mode => $mode_gp, }, +Unknown => { + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], + reg_req => { out => [ "gp" ] }, + latency => 0, + emit => '', + mode => $mode_gp, +}, + GetEIP => { - op_flags => "c", + op_flags => [ "constlike" ], reg_req => { out => [ "gp" ] }, units => [ "GP" ], latency => 5, @@ -1185,45 +1136,11 @@ GetEIP => { modified_flags => $status_flags, }, -Unknown_GP => { - state => "pinned", - op_flags => "c|NB", - irn_flags => "I", - reg_req => { out => [ "gp_UKNWN" ] }, - units => [], - emit => "", - latency => 0, - mode => $mode_gp -}, - -Unknown_VFP => { - state => "pinned", - op_flags => "c|NB", - irn_flags => "I", - reg_req => { out => [ "vfp_UKNWN" ] }, - units => [], - emit => "", - mode => "mode_E", - latency => 0, - attr_type => "ia32_x87_attr_t", -}, - -Unknown_XMM => { - state => "pinned", - op_flags => "c|NB", - irn_flags => "I", - reg_req => { out => [ "xmm_UKNWN" ] }, - units => [], - emit => "", - latency => 0, - mode => $mode_xmm -}, - NoReg_GP => { state => "pinned", - op_flags => "c|NB|NI", - irn_flags => "I", - reg_req => { out => [ "gp_NOREG" ] }, + op_flags => [ "constlike", "dump_noblock", "dump_noinput" ], + irn_flags => [ "not_scheduled" ], + reg_req => { out => [ "gp_NOREG:I" ] }, units => [], emit => "", latency => 0, @@ -1232,9 +1149,9 @@ NoReg_GP => { NoReg_VFP => { state => "pinned", - op_flags => "c|NB|NI", - irn_flags => "I", - reg_req => { out => [ "vfp_NOREG" ] }, + op_flags => [ "constlike", "dump_noblock", "dump_noinput" ], + irn_flags => [ "not_scheduled" ], + reg_req => { out => [ "vfp_NOREG:I" ] }, units => [], emit => "", mode => "mode_E", @@ -1244,9 +1161,9 @@ NoReg_VFP => { NoReg_XMM => { state => "pinned", - op_flags => "c|NB|NI", - irn_flags => "I", - reg_req => { out => [ "xmm_NOREG" ] }, + op_flags => [ "constlike", "dump_noblock", "dump_noinput" ], + irn_flags => [ "not_scheduled" ], + reg_req => { out => [ "xmm_NOREG:I" ] }, units => [], emit => "", latency => 0, @@ -1255,9 +1172,9 @@ NoReg_XMM => { ChangeCW => { state => "pinned", - op_flags => "c", - irn_flags => "I", - reg_req => { out => [ "fp_cw" ] }, + op_flags => [ "constlike" ], + irn_flags => [ "not_scheduled" ], + reg_req => { out => [ "fpcw:I" ] }, mode => $mode_fpcw, latency => 3, units => [ "GP" ], @@ -1265,9 +1182,9 @@ ChangeCW => { }, FldCW => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "pinned", - reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] }, + reg_req => { in => [ "gp", "gp", "none" ], out => [ "fpcw:I" ] }, ins => [ "base", "index", "mem" ], latency => 5, emit => ". fldcw %AM", @@ -1277,7 +1194,7 @@ FldCW => { }, FnstCW => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "pinned", reg_req => { in => [ "gp", "gp", "none", "fp_cw" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "fpcw" ], @@ -1288,7 +1205,7 @@ FnstCW => { }, FnstCWNOP => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "pinned", reg_req => { in => [ "fp_cw" ], out => [ "none" ] }, ins => [ "fpcw" ], @@ -1313,18 +1230,19 @@ Cltd => { # lateny of 0 for load is correct Load => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none", "none" ] }, + reg_req => { in => [ "gp", "gp", "none" ], + out => [ "gp", "none", "none", "none" ] }, ins => [ "base", "index", "mem" ], - outs => [ "res", "M", "X_exc" ], + outs => [ "res", "unused", "M", "X_exc" ], latency => 0, - emit => ". mov%SE%ME%.l %AM, %D0", + emit => ". mov%EX%.l %AM, %D0", units => [ "GP" ], }, Store => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none", "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -1336,7 +1254,7 @@ Store => { }, Store8Bit => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => ["none", "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -1348,7 +1266,7 @@ Store8Bit => { }, Lea => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, ins => [ "base", "index" ], emit => '. leal %AM, %D0', @@ -1362,80 +1280,111 @@ Lea => { Push => { state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "gp", "esp" ], out => [ "esp", "none" ] }, + reg_req => { in => [ "gp", "gp", "none", "gp", "esp" ], out => [ "esp:I|S", "none" ] }, ins => [ "base", "index", "mem", "val", "stack" ], emit => '. push%M %unop3', - outs => [ "stack:I|S", "M" ], + outs => [ "stack", "M" ], am => "source,unary", latency => 2, units => [ "GP" ], }, +PushEax => { + state => "exc_pinned", + reg_req => { in => [ "esp" ], out => [ "esp:I|S" ] }, + ins => [ "stack" ], + outs => [ "stack" ], + emit => '. pushl %%eax', + latency => 2, + units => [ "GP" ], + mode => $mode_gp, +}, + Pop => { state => "exc_pinned", - reg_req => { in => [ "none", "esp" ], out => [ "gp", "none", "none", "esp" ] }, + reg_req => { in => [ "none", "esp" ], out => [ "gp", "none", "none", "esp:I|S" ] }, ins => [ "mem", "stack" ], - outs => [ "res", "M", "unused", "stack:I|S" ], + outs => [ "res", "M", "unused", "stack" ], emit => '. pop%M %D0', latency => 3, # Pop is more expensive than Push on Athlon units => [ "GP" ], }, +PopEbp => { + state => "exc_pinned", + reg_req => { in => [ "none", "esp" ], out => [ "ebp:I", "none", "none", "esp:I|S" ] }, + ins => [ "mem", "stack" ], + outs => [ "res", "M", "unused", "stack" ], + emit => '. pop%M %D0', + latency => 3, # Pop is more expensive than Push on Athlon + units => [ "GP" ], +}, + +CopyEbpEsp => { + state => "exc_pinned", + reg_req => { in => [ "ebp" ], out => [ "esp:I|S" ] }, + ins => [ "ebp" ], + outs => [ "esp" ], + emit => '. movl %S0, %D0', + latency => 1, + units => [ "GP" ], + mode => $mode_gp, +}, + PopMem => { state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "esp" ], out => [ "none", "none", "none", "esp" ] }, + reg_req => { in => [ "gp", "gp", "none", "esp" ], out => [ "none", "none", "none", "esp:I|S" ] }, ins => [ "base", "index", "mem", "stack" ], - outs => [ "unused0", "M", "unused1", "stack:I|S" ], + outs => [ "unused0", "M", "unused1", "stack" ], emit => '. pop%M %AM', latency => 3, # Pop is more expensive than Push on Athlon units => [ "GP" ], }, Enter => { - reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] }, + reg_req => { in => [ "esp" ], out => [ "ebp", "esp:I|S", "none" ] }, emit => '. enter', - outs => [ "frame:I", "stack:I|S", "M" ], + outs => [ "frame", "stack", "M" ], latency => 15, units => [ "GP" ], }, Leave => { - reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] }, + reg_req => { in => [ "ebp" ], out => [ "ebp:I", "esp:I|S" ] }, emit => '. leave', - outs => [ "frame:I", "stack:I|S" ], + outs => [ "frame", "stack" ], latency => 3, units => [ "GP" ], + state => "exc_pinned", }, AddSP => { - irn_flags => "I", state => "pinned", - reg_req => { in => [ "gp", "gp", "none", "esp", "gp" ], out => [ "in_r4", "none" ] }, + reg_req => { in => [ "gp", "gp", "none", "esp", "gp" ], out => [ "esp:I|S", "none" ] }, ins => [ "base", "index", "mem", "stack", "size" ], am => "source,binary", emit => '. addl %binop', latency => 1, - outs => [ "stack:I|S", "M" ], + outs => [ "stack", "M" ], units => [ "GP" ], modified_flags => $status_flags }, SubSP => { -#irn_flags => "I", state => "pinned", - reg_req => { in => [ "gp", "gp", "none", "esp", "gp" ], out => [ "in_r4", "gp", "none" ] }, + reg_req => { in => [ "gp", "gp", "none", "esp", "gp" ], out => [ "esp:I|S", "gp", "none" ] }, ins => [ "base", "index", "mem", "stack", "size" ], am => "source,binary", emit => ". subl %binop\n". ". movl %%esp, %D1", latency => 2, - outs => [ "stack:I|S", "addr", "M" ], + outs => [ "stack", "addr", "M" ], units => [ "GP" ], modified_flags => $status_flags }, RepPrefix => { - op_flags => "K", + op_flags => [ "keep" ], state => "pinned", mode => "mode_M", emit => ". rep", @@ -1443,14 +1392,19 @@ RepPrefix => { }, LdTls => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "gp" ] }, units => [ "GP" ], + emit => ". movl %%gs:0, %D0", + mode => $mode_gp, latency => 1, }, +# +# BT supports source address mode, but this is unused yet +# Bt => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp" ], out => [ "flags" ] }, ins => [ "left", "right" ], @@ -1461,18 +1415,246 @@ Bt => { modified_flags => $status_flags # only CF is set, but the other flags are undefined }, -#-----------------------------------------------------------------------------# -# _____ _____ ______ __ _ _ _ # -# / ____/ ____| ____| / _| | | | | | # -# | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ # -# \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| # -# ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ # -# |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ # -#-----------------------------------------------------------------------------# +Bsf => { + irn_flags => [ "rematerializable" ], + state => "exc_pinned", + reg_req => { in => [ "gp", "gp", "none", "gp" ], + out => [ "gp", "flags", "none" ] }, + ins => [ "base", "index", "mem", "operand" ], + outs => [ "res", "flags", "M" ], + am => "source,binary", + emit => '. bsf%M %unop3, %D0', + units => [ "GP" ], + latency => 1, + mode => $mode_gp, + modified_flags => $status_flags +}, + +Bsr => { + irn_flags => [ "rematerializable" ], + state => "exc_pinned", + reg_req => { in => [ "gp", "gp", "none", "gp" ], + out => [ "gp", "flags", "none" ] }, + ins => [ "base", "index", "mem", "operand" ], + outs => [ "res", "flags", "M" ], + am => "source,binary", + emit => '. bsr%M %unop3, %D0', + units => [ "GP" ], + latency => 1, + mode => $mode_gp, + modified_flags => $status_flags +}, + +# +# SSE4.2 or SSE4a popcnt instruction +# +Popcnt => { + irn_flags => [ "rematerializable" ], + state => "exc_pinned", + reg_req => { in => [ "gp", "gp", "none", "gp" ], + out => [ "gp", "flags", "none" ] }, + ins => [ "base", "index", "mem", "operand" ], + outs => [ "res", "flags", "M" ], + am => "source,binary", + emit => '. popcnt%M %unop3, %D0', + units => [ "GP" ], + latency => 1, + mode => $mode_gp, + modified_flags => $status_flags +}, + +Call => { + state => "exc_pinned", + reg_req => { + in => [ "gp", "gp", "none", "gp", "esp", "fpcw", "eax", "ecx", "edx" ], + out => [ "esp:I|S", "fpcw:I", "none", "eax", "ecx", "edx", "vf0", "vf1", "vf2", "vf3", "vf4", "vf5", "vf6", "vf7", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7" ] + }, + ins => [ "base", "index", "mem", "addr", "stack", "fpcw", "eax", "ecx", "edx" ], + outs => [ "stack", "fpcw", "M", "eax", "ecx", "edx", "vf0", "vf1", "vf2", "vf3", "vf4", "vf5", "vf6", "vf7", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7" ], + attr_type => "ia32_call_attr_t", + attr => "unsigned pop, ir_type *call_tp", + am => "source,unary", + units => [ "BRANCH" ], + latency => 4, # random number + modified_flags => $status_flags +}, + +# +# a Helper node for frame-climbing, needed for __builtin_(frame|return)_address +# +# PS: try gcc __builtin_frame_address(100000) :-) +# +ClimbFrame => { + reg_req => { in => [ "gp", "gp", "gp"], out => [ "in_r3" ] }, + ins => [ "frame", "cnt", "tmp" ], + outs => [ "res" ], + latency => 4, # random number + attr_type => "ia32_climbframe_attr_t", + attr => "unsigned count", + units => [ "GP" ], + mode => $mode_gp +}, + +# +# bswap +# +Bswap => { + irn_flags => [ "rematerializable" ], + reg_req => { in => [ "gp" ], + out => [ "in_r1" ] }, + emit => '. bswap%M %S0', + ins => [ "val" ], + units => [ "GP" ], + latency => 1, + mode => $mode_gp, +}, + +# +# bswap16, use xchg here +# +Bswap16 => { + irn_flags => [ "rematerializable" ], + reg_req => { in => [ "eax ebx ecx edx" ], + out => [ "in_r1" ] }, + emit => '. xchg %SB0, %SH0', + ins => [ "val" ], + units => [ "GP" ], + latency => 1, + mode => $mode_gp, +}, + +# +# BreakPoint +# +Breakpoint => { + state => "pinned", + reg_req => { in => [ "none" ], out => [ "none" ] }, + ins => [ "mem" ], + latency => 0, + emit => ". int3", + units => [ "GP" ], + mode => mode_M, +}, + +# +# Undefined Instruction on ALL x86 CPU's +# +UD2 => { + state => "pinned", + reg_req => { in => [ "none" ], out => [ "none" ] }, + ins => [ "mem" ], + latency => 0, + emit => ". .value 0x0b0f", + units => [ "GP" ], + mode => mode_M, +}, + +# +# outport +# +Outport => { + irn_flags => [ "rematerializable" ], + state => "pinned", + reg_req => { in => [ "edx", "eax", "none" ], out => [ "none" ] }, + ins => [ "port", "value", "mem" ], + emit => '. out%M %SS0, %SI1', + units => [ "GP" ], + latency => 1, + mode => mode_M, + modified_flags => $status_flags +}, + +# +# inport +# +Inport => { + irn_flags => [ "rematerializable" ], + state => "pinned", + reg_req => { in => [ "edx", "none" ], out => [ "eax", "none" ] }, + ins => [ "port", "mem" ], + outs => [ "res", "M" ], + emit => '. in%M %DS0, %SS0', + units => [ "GP" ], + latency => 1, + mode => mode_T, + modified_flags => $status_flags +}, + +# +# Intel style prefetching +# +Prefetch0 => { + op_flags => [ "fragile", "labeled" ], + state => "exc_pinned", + reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, + ins => [ "base", "index", "mem" ], + outs => [ "M" ], + latency => 0, + emit => ". prefetcht0 %AM", + units => [ "GP" ], +}, + +Prefetch1 => { + op_flags => [ "fragile", "labeled" ], + state => "exc_pinned", + reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, + ins => [ "base", "index", "mem" ], + outs => [ "M" ], + latency => 0, + emit => ". prefetcht1 %AM", + units => [ "GP" ], +}, + +Prefetch2 => { + op_flags => [ "fragile", "labeled" ], + state => "exc_pinned", + reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, + ins => [ "base", "index", "mem" ], + outs => [ "M" ], + latency => 0, + emit => ". prefetcht2 %AM", + units => [ "GP" ], +}, + +PrefetchNTA => { + op_flags => [ "fragile", "labeled" ], + state => "exc_pinned", + reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, + ins => [ "base", "index", "mem" ], + outs => [ "M" ], + latency => 0, + emit => ". prefetchnta %AM", + units => [ "GP" ], +}, + +# +# 3DNow! prefetch instructions +# +Prefetch => { + op_flags => [ "fragile", "labeled" ], + state => "exc_pinned", + reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, + ins => [ "base", "index", "mem" ], + outs => [ "M" ], + latency => 0, + emit => ". prefetch %AM", + units => [ "GP" ], +}, + +PrefetchW => { + op_flags => [ "fragile", "labeled" ], + state => "exc_pinned", + reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, + ins => [ "base", "index", "mem" ], + outs => [ "M" ], + latency => 0, + emit => ". prefetchw %AM", + units => [ "GP" ], +}, # produces a 0/+0.0 xZero => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "xmm" ] }, emit => '. xorp%XSD %D0, %D0', latency => 3, @@ -1480,8 +1662,17 @@ xZero => { mode => $mode_xmm }, +xUnknown => { + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], + reg_req => { out => [ "xmm" ] }, + emit => '', + latency => 0, + mode => $mode_xmm +}, + xPzero => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "xmm" ] }, emit => '. pxor %D0, %D0', latency => 3, @@ -1491,7 +1682,7 @@ xPzero => { # produces all 1 bits xAllOnes => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "xmm" ] }, emit => '. pcmpeqb %D0, %D0', latency => 3, @@ -1501,7 +1692,7 @@ xAllOnes => { # integer shift left, dword xPslld => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "xmm", "xmm" ], out => [ "in_r1 !in_r2" ] }, emit => '. pslld %SI1, %D0', latency => 3, @@ -1511,7 +1702,7 @@ xPslld => { # integer shift left, qword xPsllq => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "xmm", "xmm" ], out => [ "in_r1 !in_r2" ] }, emit => '. psllq %SI1, %D0', latency => 3, @@ -1521,7 +1712,7 @@ xPsllq => { # integer shift right, dword xPsrld => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "xmm", "xmm" ], out => [ "in_r1 !in_r2" ] }, emit => '. psrld %SI1, %D0', latency => 1, @@ -1531,7 +1722,7 @@ xPsrld => { # mov from integer to SSE register xMovd => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], out => [ "xmm" ] }, emit => '. movd %S0, %D0', latency => 1, @@ -1539,13 +1730,13 @@ xMovd => { mode => $mode_xmm }, -# commutative operations - xAdd => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] }, + reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], + out => [ "in_r4 in_r5", "flags", "none" ] }, ins => [ "base", "index", "mem", "left", "right" ], + outs => [ "res", "flags", "M" ], am => "source,binary", emit => '. add%XXM %binop', latency => 4, @@ -1554,10 +1745,12 @@ xAdd => { }, xMul => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] }, + reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], + out => [ "in_r4 in_r5", "flags", "none" ] }, ins => [ "base", "index", "mem", "left", "right" ], + outs => [ "res", "flags", "M" ], am => "source,binary", emit => '. mul%XXM %binop', latency => 4, @@ -1566,10 +1759,12 @@ xMul => { }, xMax => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] }, + reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], + out => [ "in_r4 in_r5", "flags", "none" ] }, ins => [ "base", "index", "mem", "left", "right" ], + outs => [ "res", "flags", "M" ], am => "source,binary", emit => '. max%XXM %binop', latency => 2, @@ -1578,10 +1773,12 @@ xMax => { }, xMin => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] }, + reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], + out => [ "in_r4 in_r5", "flags", "none" ] }, ins => [ "base", "index", "mem", "left", "right" ], + outs => [ "res", "flags", "M" ], am => "source,binary", emit => '. min%XXM %binop', latency => 2, @@ -1590,10 +1787,12 @@ xMin => { }, xAnd => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] }, + reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], + out => [ "in_r4 in_r5", "flags", "none" ] }, ins => [ "base", "index", "mem", "left", "right" ], + outs => [ "res", "flags", "M" ], am => "source,binary", emit => '. andp%XSD %binop', latency => 3, @@ -1602,10 +1801,12 @@ xAnd => { }, xOr => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] }, + reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], + out => [ "in_r4 in_r5", "flags", "none" ] }, ins => [ "base", "index", "mem", "left", "right" ], + outs => [ "res", "flags", "M" ], am => "source,binary", emit => '. orp%XSD %binop', latency => 3, @@ -1614,10 +1815,12 @@ xOr => { }, xXor => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] }, + reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], + out => [ "in_r4 in_r5", "flags", "none" ] }, ins => [ "base", "index", "mem", "left", "right" ], + outs => [ "res", "flags", "M" ], am => "source,binary", emit => '. xorp%XSD %binop', latency => 3, @@ -1625,13 +1828,13 @@ xXor => { mode => $mode_xmm }, -# not commutative operations - xAndNot => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5" ] }, + reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], + out => [ "in_r4 !in_r5", "flags", "none" ] }, ins => [ "base", "index", "mem", "left", "right" ], + outs => [ "res", "flags", "M" ], am => "source,binary", emit => '. andnp%XSD %binop', latency => 3, @@ -1640,10 +1843,12 @@ xAndNot => { }, xSub => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] }, + reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], + out => [ "in_r4", "flags", "none" ] }, ins => [ "base", "index", "mem", "minuend", "subtrahend" ], + outs => [ "res", "flags", "M" ], am => "source,binary", emit => '. sub%XXM %binop', latency => 4, @@ -1652,27 +1857,27 @@ xSub => { }, xDiv => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5", "none" ] }, + reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], + out => [ "in_r4 !in_r5", "flags", "none" ] }, ins => [ "base", "index", "mem", "dividend", "divisor" ], + outs => [ "res", "flags", "M" ], am => "source,binary", - outs => [ "res", "M" ], emit => '. div%XXM %binop', latency => 16, units => [ "SSE" ], }, -# other operations - Ucomi => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "eflags" ] }, + reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], + out => [ "eflags" ] }, ins => [ "base", "index", "mem", "left", "right" ], outs => [ "flags" ], am => "source,binary", - attr => "int ins_permuted", + attr => "bool ins_permuted", init_attr => "attr->data.ins_permuted = ins_permuted;", emit => ' .ucomi%XXM %binop', latency => 3, @@ -1681,14 +1886,13 @@ Ucomi => { modified_flags => 1, }, -# Load / Store - xLoad => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none", "none" ] }, + reg_req => { in => [ "gp", "gp", "none" ], + out => [ "xmm", "none", "none", "none" ] }, ins => [ "base", "index", "mem" ], - outs => [ "res", "M", "X_exc" ], + outs => [ "res", "unused", "M", "X_exc" ], emit => '. mov%XXM %AM, %D0', attr => "ir_mode *load_mode", init_attr => "attr->ls_mode = load_mode;", @@ -1697,7 +1901,7 @@ xLoad => { }, xStore => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "none", "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -1709,10 +1913,11 @@ xStore => { }, xStoreSimple => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "xmm" ] }, + reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], + outs => [ "M" ], emit => '. mov%XXM %S3, %AM', latency => 0, units => [ "SSE" ], @@ -1720,7 +1925,7 @@ xStoreSimple => { }, CvtSI2SS => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] }, ins => [ "base", "index", "mem", "val" ], @@ -1732,7 +1937,7 @@ CvtSI2SS => { }, CvtSI2SD => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] }, ins => [ "base", "index", "mem", "val" ], @@ -1745,22 +1950,22 @@ CvtSI2SD => { l_LLtoFloat => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], cmp_attr => "return 1;", ins => [ "val_high", "val_low" ], + reg_req => { in => [ "none", "none" ], out => [ "none" ] } }, l_FloattoLL => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], cmp_attr => "return 1;", ins => [ "val" ], outs => [ "res_high", "res_low" ], + reg_req => { in => [ "none" ], out => [ "none", "none" ] } }, -# CopyB - CopyB => { - op_flags => "F|H", + op_flags => [ "fragile" ], state => "pinned", reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] }, outs => [ "DST", "SRC", "CNT", "M" ], @@ -1773,7 +1978,7 @@ CopyB => { }, CopyB_i => { - op_flags => "F|H", + op_flags => [ "fragile" ], state => "pinned", reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] }, outs => [ "DST", "SRC", "M" ], @@ -1785,12 +1990,23 @@ CopyB_i => { # modified_flags => [ "DF" ] }, -# Conversions +Cwtl => { + state => "exc_pinned", + reg_req => { in => [ "eax" ], out => [ "eax" ] }, + ins => [ "val" ], + outs => [ "res" ], + emit => '. cwtl', + units => [ "GP" ], + latency => 1, + mode => $mode_gp, +}, Conv_I2I => { state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "gp", "none" ] }, + reg_req => { in => [ "gp", "gp", "none", "gp" ], + out => [ "gp", "none", "none" ] }, ins => [ "base", "index", "mem", "val" ], + outs => [ "res", "flags", "M" ], am => "source,unary", units => [ "GP" ], latency => 1, @@ -1801,8 +2017,10 @@ Conv_I2I => { Conv_I2I8Bit => { state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "gp", "none" ] }, + reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], + out => [ "gp", "none", "none" ] }, ins => [ "base", "index", "mem", "val" ], + outs => [ "res", "flags", "M" ], am => "source,unary", units => [ "GP" ], latency => 1, @@ -1841,28 +2059,16 @@ Conv_FP2FP => { mode => $mode_xmm, }, -#----------------------------------------------------------# -# _ _ _ __ _ _ # -# (_) | | | | / _| | | | # -# __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ # -# \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| # -# \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ # -# \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| # -# | | # -# _ __ ___ __| | ___ ___ # -# | '_ \ / _ \ / _` |/ _ \/ __| # -# | | | | (_) | (_| | __/\__ \ # -# |_| |_|\___/ \__,_|\___||___/ # -#----------------------------------------------------------# - # rematerialisation disabled for all float nodes for now, because the fpcw # handler runs before spilling and we might end up with wrong fpcw then vfadd => { -# irn_flags => "R", +# irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] }, + reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], + out => [ "vfp", "none", "none" ] }, ins => [ "base", "index", "mem", "left", "right", "fpcw" ], + outs => [ "res", "dummy", "M" ], am => "source,binary", latency => 4, units => [ "VFP" ], @@ -1871,10 +2077,12 @@ vfadd => { }, vfmul => { -# irn_flags => "R", +# irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] }, + reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], + out => [ "vfp", "none", "none" ] }, ins => [ "base", "index", "mem", "left", "right", "fpcw" ], + outs => [ "res", "dummy", "M" ], am => "source,binary", latency => 4, units => [ "VFP" ], @@ -1883,10 +2091,12 @@ vfmul => { }, vfsub => { -# irn_flags => "R", +# irn_flags => [ "rematerializable" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] }, + reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], + out => [ "vfp", "none", "none" ] }, ins => [ "base", "index", "mem", "minuend", "subtrahend", "fpcw" ], + outs => [ "res", "dummy", "M" ], am => "source,binary", latency => 4, units => [ "VFP" ], @@ -1896,10 +2106,11 @@ vfsub => { vfdiv => { state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp", "none" ] }, + reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], + out => [ "vfp", "none", "none" ] }, ins => [ "base", "index", "mem", "dividend", "divisor", "fpcw" ], + outs => [ "res", "dummy", "M" ], am => "source,binary", - outs => [ "res", "M" ], latency => 20, units => [ "VFP" ], attr_type => "ia32_x87_attr_t", @@ -1915,7 +2126,7 @@ vfprem => { }, vfabs => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "vfp"], out => [ "vfp" ] }, ins => [ "value" ], latency => 2, @@ -1925,7 +2136,7 @@ vfabs => { }, vfchs => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "vfp"], out => [ "vfp" ] }, ins => [ "value" ], latency => 2, @@ -1934,15 +2145,14 @@ vfchs => { attr_type => "ia32_x87_attr_t", }, -# virtual Load and Store - vfld => { - irn_flags => "R", - op_flags => "L|F", + irn_flags => [ "rematerializable" ], + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none", "none" ] }, + reg_req => { in => [ "gp", "gp", "none" ], + out => [ "vfp", "none", "none", "none" ] }, ins => [ "base", "index", "mem" ], - outs => [ "res", "M", "X_exc" ], + outs => [ "res", "unused", "M", "X_exc" ], attr => "ir_mode *load_mode", init_attr => "attr->attr.ls_mode = load_mode;", latency => 2, @@ -1951,10 +2161,11 @@ vfld => { }, vfst => { - irn_flags => "R", - op_flags => "L|F", + irn_flags => [ "rematerializable" ], + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "vfp" ], out => [ "none", "none" ] }, + reg_req => { in => [ "gp", "gp", "none", "vfp" ], + out => [ "none", "none" ] }, ins => [ "base", "index", "mem", "val" ], outs => [ "M", "X_exc" ], attr => "ir_mode *store_mode", @@ -1965,12 +2176,11 @@ vfst => { attr_type => "ia32_x87_attr_t", }, -# Conversions - vfild => { state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] }, - outs => [ "res", "M" ], + reg_req => { in => [ "gp", "gp", "none" ], + out => [ "vfp", "none", "none" ] }, + outs => [ "res", "unused", "M" ], ins => [ "base", "index", "mem" ], latency => 4, units => [ "VFP" ], @@ -1979,8 +2189,9 @@ vfild => { vfist => { state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "vfp", "fpcw" ] }, + reg_req => { in => [ "gp", "gp", "none", "vfp", "fpcw" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val", "fpcw" ], + outs => [ "M" ], latency => 4, units => [ "VFP" ], mode => "mode_M", @@ -1998,12 +2209,10 @@ vfisttp => { attr_type => "ia32_x87_attr_t", }, - -# constants - vfldz => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, + outs => [ "res" ], latency => 4, units => [ "VFP" ], mode => "mode_E", @@ -2011,8 +2220,9 @@ vfldz => { }, vfld1 => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, + outs => [ "res" ], latency => 4, units => [ "VFP" ], mode => "mode_E", @@ -2020,8 +2230,9 @@ vfld1 => { }, vfldpi => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, + outs => [ "res" ], latency => 4, units => [ "VFP" ], mode => "mode_E", @@ -2029,8 +2240,9 @@ vfldpi => { }, vfldln2 => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, + outs => [ "res" ], latency => 4, units => [ "VFP" ], mode => "mode_E", @@ -2038,8 +2250,9 @@ vfldln2 => { }, vfldlg2 => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, + outs => [ "res" ], latency => 4, units => [ "VFP" ], mode => "mode_E", @@ -2047,8 +2260,9 @@ vfldlg2 => { }, vfldl2t => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, + outs => [ "res" ], latency => 4, units => [ "VFP" ], mode => "mode_E", @@ -2056,24 +2270,23 @@ vfldl2t => { }, vfldl2e => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, + outs => [ "res" ], latency => 4, units => [ "VFP" ], mode => "mode_E", attr_type => "ia32_x87_attr_t", }, -# other - vFucomFnstsw => { -# we can't allow to rematerialize this node so we don't have +# we can't allow to rematerialize this node so we don't # accidently produce Phi(Fucom, Fucom(ins_permuted)) -# irn_flags => "R", +# irn_flags => [ "rematerializable" ], reg_req => { in => [ "vfp", "vfp" ], out => [ "eax" ] }, ins => [ "left", "right" ], outs => [ "flags" ], - attr => "int ins_permuted", + attr => "bool ins_permuted", init_attr => "attr->attr.data.ins_permuted = ins_permuted;", latency => 3, units => [ "VFP" ], @@ -2082,11 +2295,11 @@ vFucomFnstsw => { }, vFucomi => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "vfp", "vfp" ], out => [ "eflags" ] }, ins => [ "left", "right" ], outs => [ "flags" ], - attr => "int ins_permuted", + attr => "bool ins_permuted", init_attr => "attr->attr.data.ins_permuted = ins_permuted;", latency => 3, units => [ "VFP" ], @@ -2095,11 +2308,11 @@ vFucomi => { }, vFtstFnstsw => { -# irn_flags => "R", +# irn_flags => [ "rematerializable" ], reg_req => { in => [ "vfp" ], out => [ "eax" ] }, ins => [ "left" ], outs => [ "flags" ], - attr => "int ins_permuted", + attr => "bool ins_permuted", init_attr => "attr->attr.data.ins_permuted = ins_permuted;", latency => 3, units => [ "VFP" ], @@ -2108,7 +2321,7 @@ vFtstFnstsw => { }, Sahf => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "eax" ], out => [ "eflags" ] }, ins => [ "val" ], outs => [ "flags" ], @@ -2118,248 +2331,215 @@ Sahf => { mode => $mode_flags, }, -#------------------------------------------------------------------------# -# ___ _____ __ _ _ _ # -# __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ # -# \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| # -# > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ # -# /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ # -#------------------------------------------------------------------------# - -# Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp -# are swapped, we work this around in the emitter... - fadd => { state => "exc_pinned", - rd_constructor => "NONE", - reg_req => { }, emit => '. fadd%XM %x87_binop', latency => 4, attr_type => "ia32_x87_attr_t", + constructors => {}, }, faddp => { state => "exc_pinned", - rd_constructor => "NONE", - reg_req => { }, emit => '. faddp%XM %x87_binop', latency => 4, attr_type => "ia32_x87_attr_t", + constructors => {}, }, fmul => { state => "exc_pinned", - rd_constructor => "NONE", - reg_req => { }, emit => '. fmul%XM %x87_binop', latency => 4, attr_type => "ia32_x87_attr_t", + constructors => {}, }, fmulp => { state => "exc_pinned", - rd_constructor => "NONE", - reg_req => { }, emit => '. fmulp%XM %x87_binop',, latency => 4, attr_type => "ia32_x87_attr_t", + constructors => {}, }, fsub => { state => "exc_pinned", - rd_constructor => "NONE", - reg_req => { }, emit => '. fsub%XM %x87_binop', latency => 4, attr_type => "ia32_x87_attr_t", + constructors => {}, }, +# Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp +# are swapped, we work this around in the emitter... + fsubp => { state => "exc_pinned", - rd_constructor => "NONE", - reg_req => { }, # see note about gas bugs emit => '. fsubrp%XM %x87_binop', latency => 4, attr_type => "ia32_x87_attr_t", + constructors => {}, }, fsubr => { state => "exc_pinned", - rd_constructor => "NONE", - irn_flags => "R", - reg_req => { }, + irn_flags => [ "rematerializable" ], emit => '. fsubr%XM %x87_binop', latency => 4, attr_type => "ia32_x87_attr_t", + constructors => {}, }, fsubrp => { state => "exc_pinned", - rd_constructor => "NONE", - irn_flags => "R", - reg_req => { }, -# see note about gas bugs + irn_flags => [ "rematerializable" ], +# see note about gas bugs before fsubp emit => '. fsubp%XM %x87_binop', latency => 4, attr_type => "ia32_x87_attr_t", + constructors => {}, }, fprem => { - rd_constructor => "NONE", - reg_req => { }, emit => '. fprem1', latency => 20, attr_type => "ia32_x87_attr_t", + constructors => {}, }, # this node is just here, to keep the simulator running # we can omit this when a fprem simulation function exists fpremp => { - rd_constructor => "NONE", - reg_req => { }, emit => '. fprem1\n'. '. fstp %X0', latency => 20, attr_type => "ia32_x87_attr_t", + constructors => {}, }, fdiv => { state => "exc_pinned", - rd_constructor => "NONE", - reg_req => { }, emit => '. fdiv%XM %x87_binop', latency => 20, attr_type => "ia32_x87_attr_t", + constructors => {}, }, fdivp => { state => "exc_pinned", - rd_constructor => "NONE", - reg_req => { }, -# see note about gas bugs +# see note about gas bugs before fsubp emit => '. fdivrp%XM %x87_binop', latency => 20, attr_type => "ia32_x87_attr_t", + constructors => {}, }, fdivr => { state => "exc_pinned", - rd_constructor => "NONE", - reg_req => { }, emit => '. fdivr%XM %x87_binop', latency => 20, attr_type => "ia32_x87_attr_t", + constructors => {}, }, fdivrp => { state => "exc_pinned", - rd_constructor => "NONE", - reg_req => { }, -# see note about gas bugs +# see note about gas bugs before fsubp emit => '. fdivp%XM %x87_binop', latency => 20, attr_type => "ia32_x87_attr_t", + constructors => {}, }, fabs => { - rd_constructor => "NONE", - reg_req => { }, emit => '. fabs', latency => 4, attr_type => "ia32_x87_attr_t", + constructors => {}, }, fchs => { - op_flags => "R|K", - rd_constructor => "NONE", - reg_req => { }, + op_flags => [ "keep" ], + irn_flags => [ "rematerializable" ], emit => '. fchs', latency => 4, attr_type => "ia32_x87_attr_t", + constructors => {}, }, -# x87 Load and Store - fld => { - rd_constructor => "NONE", - op_flags => "R|L|F", + irn_flags => [ "rematerializable" ], + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", - reg_req => { }, emit => '. fld%XM %AM', attr_type => "ia32_x87_attr_t", latency => 2, + constructors => {}, }, fst => { - rd_constructor => "NONE", - op_flags => "R|L|F", + irn_flags => [ "rematerializable" ], + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", - reg_req => { }, emit => '. fst%XM %AM', mode => "mode_M", attr_type => "ia32_x87_attr_t", latency => 2, + constructors => {}, }, fstp => { - rd_constructor => "NONE", - op_flags => "R|L|F", + irn_flags => [ "rematerializable" ], + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", - reg_req => { }, emit => '. fstp%XM %AM', mode => "mode_M", attr_type => "ia32_x87_attr_t", latency => 2, + constructors => {}, }, -# Conversions - fild => { state => "exc_pinned", - rd_constructor => "NONE", - reg_req => { }, - emit => '. fild%M %AM', + emit => '. fild%XM %AM', attr_type => "ia32_x87_attr_t", latency => 2, + constructors => {}, }, fist => { state => "exc_pinned", - rd_constructor => "NONE", - reg_req => { }, - emit => '. fist%M %AM', + emit => '. fist%XM %AM', mode => "mode_M", attr_type => "ia32_x87_attr_t", latency => 2, + constructors => {}, }, fistp => { state => "exc_pinned", - rd_constructor => "NONE", - reg_req => { }, - emit => '. fistp%M %AM', + emit => '. fistp%XM %AM', mode => "mode_M", attr_type => "ia32_x87_attr_t", latency => 2, + constructors => {}, }, -# SSE3 firsttp instruction +# SSE3 fisttp instruction fisttp => { state => "exc_pinned", - rd_constructor => "NONE", - reg_req => { }, - emit => '. fisttp%M %AM', + emit => '. fisttp%XM %AM', mode => "mode_M", attr_type => "ia32_x87_attr_t", latency => 2, + constructors => {}, }, -# constants - fldz => { - op_flags => "R|c|K", - irn_flags => "R", + op_flags => [ "constlike", "keep" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, emit => '. fldz', attr_type => "ia32_x87_attr_t", @@ -2367,8 +2547,8 @@ fldz => { }, fld1 => { - op_flags => "R|c|K", - irn_flags => "R", + op_flags => [ "constlike", "keep" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, emit => '. fld1', attr_type => "ia32_x87_attr_t", @@ -2376,8 +2556,8 @@ fld1 => { }, fldpi => { - op_flags => "R|c|K", - irn_flags => "R", + op_flags => [ "constlike", "keep" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, emit => '. fldpi', attr_type => "ia32_x87_attr_t", @@ -2385,8 +2565,8 @@ fldpi => { }, fldln2 => { - op_flags => "R|c|K", - irn_flags => "R", + op_flags => [ "constlike", "keep" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, emit => '. fldln2', attr_type => "ia32_x87_attr_t", @@ -2394,8 +2574,8 @@ fldln2 => { }, fldlg2 => { - op_flags => "R|c|K", - irn_flags => "R", + op_flags => [ "constlike", "keep" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, emit => '. fldlg2', attr_type => "ia32_x87_attr_t", @@ -2403,8 +2583,8 @@ fldlg2 => { }, fldl2t => { - op_flags => "R|c|K", - irn_flags => "R", + op_flags => [ "constlike", "keep" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, emit => '. fldll2t', attr_type => "ia32_x87_attr_t", @@ -2412,8 +2592,8 @@ fldl2t => { }, fldl2e => { - op_flags => "R|c|K", - irn_flags => "R", + op_flags => [ "constlike", "keep" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, emit => '. fldl2e', attr_type => "ia32_x87_attr_t", @@ -2425,8 +2605,8 @@ fldl2e => { # Moreover, note the virtual register requierements! fxch => { - op_flags => "R|K", - reg_req => { }, + op_flags => [ "keep" ], + reg_req => { out => [ "none" ] }, cmp_attr => "return 1;", emit => '. fxch %X0', attr_type => "ia32_x87_attr_t", @@ -2435,8 +2615,8 @@ fxch => { }, fpush => { - op_flags => "R|K", - reg_req => {}, + op_flags => [ "keep" ], + reg_req => { out => [ "none" ] }, cmp_attr => "return 1;", emit => '. fld %X0', attr_type => "ia32_x87_attr_t", @@ -2453,8 +2633,8 @@ fpushCopy => { }, fpop => { - op_flags => "K", - reg_req => { }, + op_flags => [ "keep" ], + reg_req => { out => [ "none" ] }, cmp_attr => "return 1;", emit => '. fstp %X0', attr_type => "ia32_x87_attr_t", @@ -2463,8 +2643,8 @@ fpop => { }, ffreep => { - op_flags => "K", - reg_req => { }, + op_flags => [ "keep" ], + reg_req => { out => [ "none" ] }, cmp_attr => "return 1;", emit => '. ffreep %X0', attr_type => "ia32_x87_attr_t", @@ -2473,8 +2653,8 @@ ffreep => { }, emms => { - op_flags => "K", - reg_req => { }, + op_flags => [ "keep" ], + reg_req => { out => [ "none" ] }, cmp_attr => "return 1;", emit => '. emms', attr_type => "ia32_x87_attr_t", @@ -2483,8 +2663,8 @@ emms => { }, femms => { - op_flags => "K", - reg_req => { }, + op_flags => [ "keep" ], + reg_req => { out => [ "none" ] }, cmp_attr => "return 1;", emit => '. femms', attr_type => "ia32_x87_attr_t", @@ -2492,8 +2672,6 @@ femms => { latency => 3, }, -# compare - FucomFnstsw => { reg_req => { }, emit => ". fucom %X1\n". @@ -2540,21 +2718,10 @@ FtstFnstsw => { latency => 2, }, - -# -------------------------------------------------------------------------------- # -# ____ ____ _____ _ _ # -# / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ # -# \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| # -# ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ # -# |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ # -# # -# -------------------------------------------------------------------------------- # - - # Spilling and reloading of SSE registers, hardcoded, not generated # xxLoad => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] }, emit => '. movdqu %D0, %AM', @@ -2564,7 +2731,7 @@ xxLoad => { }, xxStore => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm" ] }, ins => [ "base", "index", "mem", "val" ], @@ -2576,14 +2743,6 @@ xxStore => { ); # end of %nodes -# Include the generated SIMD node specification written by the SIMD optimization -$my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl"; -unless ($return = do $my_script_name) { - warn "couldn't parse $my_script_name: $@" if $@; - warn "couldn't do $my_script_name: $!" unless defined $return; - warn "couldn't run $my_script_name" unless $return; -} - # Transform some attributes foreach my $op (keys(%nodes)) { my $node = $nodes{$op};