X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_spec.pl;h=1c015ece3d6494d82398269c23b7469411103f1c;hb=09efa2a5b39ea665e263421e91a67b1ab03b87a8;hp=6d92b7d7f91bdfbbac87ceb7e8323ac9f39fb1a7;hpb=13dc182ad4f2a1e34735d19cba4bc5bd803e416a;p=libfirm

diff --git a/ir/be/ia32/ia32_spec.pl b/ir/be/ia32/ia32_spec.pl
index 6d92b7d7f..1c015ece3 100644
--- a/ir/be/ia32/ia32_spec.pl
+++ b/ir/be/ia32/ia32_spec.pl
@@ -104,6 +104,28 @@ $comment_string = "/*";
             { "name" => "ecx", "type" => 1 },
             { "name" => "esi", "type" => 2 },
             { "name" => "edi", "type" => 2 },
+#            { "name" => "r11", "type" => 1 },
+#            { "name" => "r12", "type" => 1 },
+#            { "name" => "r13", "type" => 1 },
+#            { "name" => "r14", "type" => 1 },
+#            { "name" => "r15", "type" => 1 },
+#            { "name" => "r16", "type" => 1 },
+#            { "name" => "r17", "type" => 1 },
+#            { "name" => "r18", "type" => 1 },
+#            { "name" => "r19", "type" => 1 },
+#            { "name" => "r20", "type" => 1 },
+#            { "name" => "r21", "type" => 1 },
+#            { "name" => "r22", "type" => 1 },
+#            { "name" => "r23", "type" => 1 },
+#            { "name" => "r24", "type" => 1 },
+#            { "name" => "r25", "type" => 1 },
+#            { "name" => "r26", "type" => 1 },
+#            { "name" => "r27", "type" => 1 },
+#            { "name" => "r28", "type" => 1 },
+#            { "name" => "r29", "type" => 1 },
+#            { "name" => "r30", "type" => 1 },
+#            { "name" => "r31", "type" => 1 },
+#            { "name" => "r32", "type" => 1 },
             { "name" => "ebp", "type" => 2 },
             { "name" => "esp", "type" => 4 },
             { "name" => "gp_NOREG", "type" => 6 },  # we need a dummy register for NoReg nodes
@@ -270,16 +292,6 @@ $comment_string = "/*";
 '
 },
 
-"CMov" => {
-  "irn_flags" => "R",
-  "comment"   => "construct Mux: Mux(sel, a, b) == sel ? a : b",
-  "reg_req"   => { "in" => [ "gp", "gp", "gp" ], "out" => [ "in_r2" ] },
-  "emit"      =>
-'. cmp %S1, 0 /* compare Sel for CMov (%A2, %A3) */
-. cmovne %D1, %S3 /* sel == true -> return %S3 */
-'
-},
-
 # not commutative operations
 
 "Sub" => {
@@ -611,6 +623,15 @@ else {
 
 # not commutative operations
 
+"xAndNot" => {
+  "irn_flags" => "R",
+  "comment"   => "construct SSE AndNot: AndNot(a, b) = a AND NOT b",
+  "cmp_attr"  => "  return ia32_compare_immop_attr(attr_a, attr_b);\n",
+  "reg_req"   => { "in" => [ "gp", "gp", "xmm", "xmm", "none" ], "out" => [ "in_r3 !in_r4" ] },
+  "emit"      => '. andnp%M %ia32_emit_binop /* SSE AndNot(%A3, %A4) -> %D1 */',
+  "outs"      => [ "res", "M" ],
+},
+
 "xSub" => {
   "irn_flags" => "R",
   "comment"   => "construct SSE Sub: Sub(a, b) = a - b",
@@ -631,6 +652,13 @@ else {
 
 # other operations
 
+"xCmp" => {
+  "irn_flags" => "R",
+  "comment"   => "construct SSE Compare: Cmp(a, b) == a = a cmp b",
+  "reg_req"   => { "in" => [ "gp", "gp", "xmm", "xmm", "none" ], "out" => [ "in_r3 !in_r4" ] },
+  "outs"      => [ "res", "M" ],
+},
+
 "xCondJmp" => {
   "op_flags"  => "L|X|Y",
   "comment"   => "construct conditional jump: UCOMIS A, B && JMPxx LABEL",
@@ -725,6 +753,63 @@ else {
   "outs"      => [ "res", "M" ],
 },
 
+"CmpCMov" => {
+  "irn_flags" => "R",
+  "comment"   => "construct Conditional Move: CMov(sel, a, b) == sel ? a : b",
+  "reg_req"   => { "in" => [ "gp", "gp", "gp", "gp" ], "out" => [ "in_r4" ] }
+},
+
+"PsiCondCMov" => {
+  "irn_flags" => "R",
+  "comment"   => "check if Psi condition tree evaluates to true and move result accordingly",
+  "reg_req"   => { "in" => [ "gp", "gp", "gp" ], "out" => [ "in_r3" ] }
+},
+
+"xCmpCMov" => {
+  "irn_flags" => "R",
+  "comment"   => "construct Conditional Move: SSE Compare + int CMov ",
+  "reg_req"   => { "in" => [ "xmm", "xmm", "gp", "gp" ], "out" => [ "in_r4" ] }
+},
+
+"vfCmpCMov" => {
+  "irn_flags" => "R",
+  "comment"   => "construct Conditional Move: x87 Compare + int CMov",
+  "reg_req"   => { "in" => [ "vfp", "vfp", "gp", "gp" ], "out" => [ "in_r4" ] }
+},
+
+"CmpSet" => {
+  "irn_flags" => "R",
+  "comment"   => "construct Set: Set(sel) == sel ? 1 : 0",
+  "reg_req"   => { "in" => [ "gp", "gp", "gp", "gp", "none" ], "out" => [ "eax ebx ecx edx", "none" ] },
+  "outs"      => [ "res", "M" ],
+},
+
+"PsiCondSet" => {
+  "irn_flags" => "R",
+  "comment"   => "check if Psi condition tree evaluates to true and set result accordingly",
+  "reg_req"   => { "in" => [ "gp" ], "out" => [ "eax ebx ecx edx" ] },
+},
+
+"xCmpSet" => {
+  "irn_flags" => "R",
+  "comment"   => "construct Set: SSE Compare + int Set",
+  "reg_req"   => { "in" => [ "gp", "gp", "xmm", "xmm", "none" ], "out" => [ "eax ebx ecx edx", "none" ] },
+  "outs"      => [ "res", "M" ],
+},
+
+"vfCmpSet" => {
+  "irn_flags" => "R",
+  "comment"   => "construct Set: x87 Compare + int Set",
+  "reg_req"   => { "in" => [ "gp", "gp", "vfp", "vfp", "none" ], "out" => [ "eax ebx ecx edx", "none" ] },
+  "outs"      => [ "res", "M" ],
+},
+
+"vfCMov" => {
+  "irn_flags" => "R",
+  "comment"   => "construct x87 Conditional Move: vfCMov(sel, a, b) = sel ? a : b",
+  "reg_req"   => { "in" => [ "vfp", "vfp", "vfp", "vfp" ], "out" => [ "vfp" ] }
+},
+
 #----------------------------------------------------------#
 #        _      _               _    __ _             _    #
 #       (_)    | |             | |  / _| |           | |   #
@@ -885,6 +970,7 @@ else {
 "vfConst" => {
   "op_flags"  => "c",
   "irn_flags" => "R",
+  "init_attr" => "  set_ia32_ls_mode(res, mode);",
   "comment"   => "represents a virtual floating point constant",
   "cmp_attr"  => "  return ia32_compare_immop_attr(attr_a, attr_b);\n",
   "reg_req"   => { "in" => [ "none" ], "out" => [ "vfp" ] },
@@ -1080,6 +1166,7 @@ else {
 "fild" => {
   "op_flags"  => "R",
   "irn_flags" => "R",
+  "rd_constructor" => "NONE",
   "comment"   => "x87 fp integer Load: Load(ptr, mem) = iLD ptr -> reg",
   "reg_req"   => { },
   "emit"      => '. fild %ia32_emit_am /* integer Load((%A1)) -> %D1 */',
@@ -1160,13 +1247,13 @@ else {
 },
 
 "fldConst" => {
-  "op_flags"  => "R",
-  "op_flags"  => "c",
+  "op_flags"  => "R|c",
   "irn_flags" => "R",
+  "rd_constructor" => "NONE",
   "comment"   => "represents a x87 constant",
   "cmp_attr"  => "  return ia32_compare_immop_attr(attr_a, attr_b);\n",
   "reg_req"   => { "out" => [ "st" ] },
-  "emit"      => '. fld%M %C /* Load fConst into register -> %D1 */',
+  "emit"      => '. fld %ia32_emit_adr /* Load fConst into register -> %D1 */',
 },
 
 # fxch, fpush, fpop