X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_optimize.c;h=e1b17045c0985be6fe7e04d5cd4b847833a30c7e;hb=ac9e2a1306f3d90df39fb81ab4ea13559145fa19;hp=5611475c176111dc83357ced046c90f3c617b4c1;hpb=a1ec8ad856d507443e9ccca104913a8d94f191b8;p=libfirm

diff --git a/ir/be/ia32/ia32_optimize.c b/ir/be/ia32/ia32_optimize.c
index 5611475c1..e1b17045c 100644
--- a/ir/be/ia32/ia32_optimize.c
+++ b/ir/be/ia32/ia32_optimize.c
@@ -23,9 +23,7 @@
  * @author      Matthias Braun, Christian Wuerdig
  * @version     $Id$
  */
-#ifdef HAVE_CONFIG_H
 #include "config.h"
-#endif
 
 #include "irnode.h"
 #include "irprog_t.h"
@@ -59,105 +57,86 @@
 
 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
 
-static const arch_env_t *arch_env;
-static ia32_code_gen_t  *cg;
+static ia32_code_gen_t *cg;
+
+static void copy_mark(const ir_node *old, ir_node *new)
+{
+	if (is_ia32_is_reload(old))
+		set_ia32_is_reload(new);
+	if (is_ia32_is_spill(old))
+		set_ia32_is_spill(new);
+	if (is_ia32_is_remat(old))
+		set_ia32_is_remat(new);
+}
+
+typedef enum produces_flag_t {
+	produces_no_flag,
+	produces_flag_zero,
+	produces_flag_carry
+} produces_flag_t;
 
 /**
- * Returns non-zero if the given node produces
- * a zero flag.
+ * Return which usable flag the given node produces
  *
  * @param node  the node to check
- * @param pn    if >= 0, the projection number of the used result
+ * @param pn    the projection number of the used result
  */
-static int produces_zero_flag(ir_node *node, int pn)
+static produces_flag_t produces_test_flag(ir_node *node, int pn)
 {
 	ir_node                     *count;
 	const ia32_immediate_attr_t *imm_attr;
 
 	if (!is_ia32_irn(node))
-		return 0;
-
-	if (pn >= 0) {
-		if (pn != pn_ia32_res)
-			return 0;
-	}
+		return produces_no_flag;
 
 	switch (get_ia32_irn_opcode(node)) {
-	case iro_ia32_Add:
-	case iro_ia32_Adc:
-	case iro_ia32_And:
-	case iro_ia32_Or:
-	case iro_ia32_Xor:
-	case iro_ia32_Sub:
-	case iro_ia32_Sbb:
-	case iro_ia32_Neg:
-	case iro_ia32_Inc:
-	case iro_ia32_Dec:
-		return 1;
-
-	case iro_ia32_ShlD:
-	case iro_ia32_ShrD:
-	case iro_ia32_Shl:
-	case iro_ia32_Shr:
-	case iro_ia32_Sar:
-		assert(n_ia32_ShlD_count == n_ia32_ShrD_count);
-		assert(n_ia32_Shl_count == n_ia32_Shr_count
-				&& n_ia32_Shl_count == n_ia32_Sar_count);
-		if (is_ia32_ShlD(node) || is_ia32_ShrD(node)) {
-			count = get_irn_n(node, n_ia32_ShlD_count);
-		} else {
-			count = get_irn_n(node, n_ia32_Shl_count);
-		}
-		/* when shift count is zero the flags are not affected, so we can only
-		 * do this for constants != 0 */
-		if (!is_ia32_Immediate(count))
-			return 0;
-
-		imm_attr = get_ia32_immediate_attr_const(count);
-		if (imm_attr->symconst != NULL)
-			return 0;
-		if ((imm_attr->offset & 0x1f) == 0)
-			return 0;
-		return 1;
-
-	default:
-		break;
-	}
-	return 0;
-}
-
-/**
- * If the given node has not mode_T, creates a mode_T version (with a result Proj).
- *
- * @param node  the node to change
- *
- * @return the new mode_T node (if the mode was changed) or node itself
- */
-static ir_node *turn_into_mode_t(ir_node *node)
-{
-	ir_node               *block;
-	ir_node               *res_proj;
-	ir_node               *new_node;
-	const arch_register_t *reg;
-
-	if(get_irn_mode(node) == mode_T)
-		return node;
+		case iro_ia32_Add:
+		case iro_ia32_Adc:
+		case iro_ia32_And:
+		case iro_ia32_Or:
+		case iro_ia32_Xor:
+		case iro_ia32_Sub:
+		case iro_ia32_Sbb:
+		case iro_ia32_Neg:
+		case iro_ia32_Inc:
+		case iro_ia32_Dec:
+			break;
 
-	assert(get_irn_mode(node) == mode_Iu);
+		case iro_ia32_ShlD:
+		case iro_ia32_ShrD:
+			assert(n_ia32_ShlD_count == n_ia32_ShrD_count);
+			count = get_irn_n(node, n_ia32_ShlD_count);
+			goto check_shift_amount;
 
-	new_node = exact_copy(node);
-	set_irn_mode(new_node, mode_T);
+		case iro_ia32_Shl:
+		case iro_ia32_Shr:
+		case iro_ia32_Sar:
+			assert(n_ia32_Shl_count == n_ia32_Shr_count
+					&& n_ia32_Shl_count == n_ia32_Sar_count);
+			count = get_irn_n(node, n_ia32_Shl_count);
+check_shift_amount:
+			/* when shift count is zero the flags are not affected, so we can only
+			 * do this for constants != 0 */
+			if (!is_ia32_Immediate(count))
+				return produces_no_flag;
+
+			imm_attr = get_ia32_immediate_attr_const(count);
+			if (imm_attr->symconst != NULL)
+				return produces_no_flag;
+			if ((imm_attr->offset & 0x1f) == 0)
+				return produces_no_flag;
+			break;
 
-	block    = get_nodes_block(new_node);
-	res_proj = new_r_Proj(current_ir_graph, block, new_node, mode_Iu,
-	                      pn_ia32_res);
+		case iro_ia32_Mul:
+			return pn == pn_ia32_Mul_res_high ?
+				produces_flag_carry : produces_no_flag;
 
-	reg = arch_get_irn_register(arch_env, node);
-	arch_set_irn_register(arch_env, res_proj, reg);
+		default:
+			return produces_no_flag;
+	}
 
-	sched_add_before(node, new_node);
-	be_peephole_exchange(node, res_proj);
-	return new_node;
+	return pn == pn_ia32_res ?
+		produces_flag_zero : produces_no_flag;
 }
 
 /**
@@ -168,7 +147,6 @@ static void peephole_ia32_Cmp(ir_node *const node)
 	ir_node                     *right;
 	ia32_immediate_attr_t const *imm;
 	dbg_info                    *dbgi;
-	ir_graph                    *irg;
 	ir_node                     *block;
 	ir_node                     *noreg;
 	ir_node                     *nomem;
@@ -193,26 +171,25 @@ static void peephole_ia32_Cmp(ir_node *const node)
 		return;
 
 	dbgi         = get_irn_dbg_info(node);
-	irg          = current_ir_graph;
 	block        = get_nodes_block(node);
 	noreg        = ia32_new_NoReg_gp(cg);
-	nomem        = get_irg_no_mem(irg);
+	nomem        = get_irg_no_mem(current_ir_graph);
 	op           = get_irn_n(node, n_ia32_Cmp_left);
 	attr         = get_irn_generic_attr(node);
 	ins_permuted = attr->data.ins_permuted;
 	cmp_unsigned = attr->data.cmp_unsigned;
 
 	if (is_ia32_Cmp(node)) {
-		test = new_rd_ia32_Test(dbgi, irg, block, noreg, noreg, nomem,
+		test = new_bd_ia32_Test(dbgi, block, noreg, noreg, nomem,
 		                        op, op, ins_permuted, cmp_unsigned);
 	} else {
-		test = new_rd_ia32_Test8Bit(dbgi, irg, block, noreg, noreg, nomem,
+		test = new_bd_ia32_Test8Bit(dbgi, block, noreg, noreg, nomem,
 		                            op, op, ins_permuted, cmp_unsigned);
 	}
 	set_ia32_ls_mode(test, get_ia32_ls_mode(node));
 
-	reg = arch_get_irn_register(arch_env, node);
-	arch_set_irn_register(arch_env, test, reg);
+	reg = arch_irn_get_register(node, pn_ia32_Cmp_eflags);
+	arch_irn_set_register(test, pn_ia32_Test_eflags, reg);
 
 	foreach_out_edge_safe(node, edge, tmp) {
 		ir_node *const user = get_edge_src_irn(edge);
@@ -222,79 +199,156 @@ static void peephole_ia32_Cmp(ir_node *const node)
 	}
 
 	sched_add_before(node, test);
+	copy_mark(node, test);
 	be_peephole_exchange(node, test);
 }
 
 /**
  * Peephole optimization for Test instructions.
- * We can remove the Test, if a zero flags was produced which is still
- * live.
+ * - Remove the Test, if an appropriate flag was produced which is still live
+ * - Change a Test(x, c) to 8Bit, if 0 <= c < 256 (3 byte shorter opcode)
  */
 static void peephole_ia32_Test(ir_node *node)
 {
-	ir_node         *left  = get_irn_n(node, n_ia32_Test_left);
-	ir_node         *right = get_irn_n(node, n_ia32_Test_right);
-	ir_node         *flags_proj;
-	ir_node         *block;
-	ir_mode         *flags_mode;
-	int              pn    = -1;
-	ir_node         *schedpoint;
-	const ir_edge_t *edge;
+	ir_node *left  = get_irn_n(node, n_ia32_Test_left);
+	ir_node *right = get_irn_n(node, n_ia32_Test_right);
 
 	assert(n_ia32_Test_left == n_ia32_Test8Bit_left
 			&& n_ia32_Test_right == n_ia32_Test8Bit_right);
 
-	/* we need a test for 0 */
-	if(left != right)
-		return;
+	if (left == right) { /* we need a test for 0 */
+		ir_node         *block = get_nodes_block(node);
+		int              pn    = pn_ia32_res;
+		ir_node         *flags_proj;
+		ir_mode         *flags_mode;
+		ir_node         *schedpoint;
+		const ir_edge_t *edge;
 
-	block = get_nodes_block(node);
-	if(get_nodes_block(left) != block)
-		return;
-
-	if(is_Proj(left)) {
-		pn   = get_Proj_proj(left);
-		left = get_Proj_pred(left);
-	}
+		if (get_nodes_block(left) != block)
+			return;
 
-	/* happens rarely, but if it does code will panic' */
-	if (is_ia32_Unknown_GP(left))
-		return;
+		if (is_Proj(left)) {
+			pn   = get_Proj_proj(left);
+			left = get_Proj_pred(left);
+		}
 
-	/* walk schedule up and abort when we find left or some other node destroys
-	   the flags */
-	schedpoint = sched_prev(node);
-	while(schedpoint != left) {
-		schedpoint = sched_prev(schedpoint);
-		if(arch_irn_is(arch_env, schedpoint, modify_flags))
+		/* happens rarely, but if it does code will panic' */
+		if (is_ia32_Unknown_GP(left))
 			return;
-		if(schedpoint == block)
-			panic("couldn't find left");
-	}
 
-	/* make sure only Lg/Eq tests are used */
-	foreach_out_edge(node, edge) {
-		ir_node *user = get_edge_src_irn(edge);
-		int      pnc  = get_ia32_condcode(user);
+		/* walk schedule up and abort when we find left or some other node destroys
+			 the flags */
+		schedpoint = node;
+		for (;;) {
+			schedpoint = sched_prev(schedpoint);
+			if (schedpoint == left)
+				break;
+			if (arch_irn_is(schedpoint, modify_flags))
+				return;
+			if (schedpoint == block)
+				panic("couldn't find left");
+		}
 
-		if(pnc != pn_Cmp_Eq && pnc != pn_Cmp_Lg) {
-			return;
+		/* make sure only Lg/Eq tests are used */
+		foreach_out_edge(node, edge) {
+			ir_node *user = get_edge_src_irn(edge);
+			int      pnc  = get_ia32_condcode(user);
+
+			if(pnc != pn_Cmp_Eq && pnc != pn_Cmp_Lg) {
+				return;
+			}
 		}
-	}
 
-	if(!produces_zero_flag(left, pn))
-		return;
+		switch (produces_test_flag(left, pn)) {
+			case produces_flag_zero:
+				break;
+
+			case produces_flag_carry:
+				foreach_out_edge(node, edge) {
+					ir_node *user = get_edge_src_irn(edge);
+					int      pnc  = get_ia32_condcode(user);
+
+					switch (pnc) {
+						case pn_Cmp_Eq: pnc = pn_Cmp_Ge | ia32_pn_Cmp_unsigned; break;
+						case pn_Cmp_Lg: pnc = pn_Cmp_Lt | ia32_pn_Cmp_unsigned; break;
+						default: panic("unexpected pn");
+					}
+					set_ia32_condcode(user, pnc);
+				}
+				break;
+
+			default:
+				return;
+		}
 
-	left = turn_into_mode_t(left);
+		if (get_irn_mode(left) != mode_T) {
+			set_irn_mode(left, mode_T);
+
+			/* If there are other users, reroute them to result proj */
+			if (get_irn_n_edges(left) != 2) {
+				ir_node *res = new_r_Proj(current_ir_graph, block, left,
+						mode_Iu, pn_ia32_res);
+
+				edges_reroute(left, res, current_ir_graph);
+				/* Reattach the result proj to left */
+				set_Proj_pred(res, left);
+			}
+		}
 
-	flags_mode = ia32_reg_classes[CLASS_ia32_flags].mode;
-	flags_proj = new_r_Proj(current_ir_graph, block, left, flags_mode,
-	                        pn_ia32_flags);
-	arch_set_irn_register(arch_env, flags_proj, &ia32_flags_regs[REG_EFLAGS]);
+		flags_mode = ia32_reg_classes[CLASS_ia32_flags].mode;
+		flags_proj = new_r_Proj(current_ir_graph, block, left, flags_mode,
+				pn_ia32_flags);
+		arch_set_irn_register(flags_proj, &ia32_flags_regs[REG_EFLAGS]);
 
-	assert(get_irn_mode(node) != mode_T);
+		assert(get_irn_mode(node) != mode_T);
+
+		be_peephole_exchange(node, flags_proj);
+	} else if (is_ia32_Immediate(right)) {
+		ia32_immediate_attr_t const *const imm = get_ia32_immediate_attr_const(right);
+		unsigned                           offset;
+
+		/* A test with a symconst is rather strange, but better safe than sorry */
+		if (imm->symconst != NULL)
+			return;
+
+		offset = imm->offset;
+		if (get_ia32_op_type(node) == ia32_AddrModeS) {
+			ia32_attr_t *const attr = get_irn_generic_attr(node);
+
+			if ((offset & 0xFFFFFF00) == 0) {
+				/* attr->am_offs += 0; */
+			} else if ((offset & 0xFFFF00FF) == 0) {
+				ir_node *imm = create_Immediate(NULL, 0, offset >>  8);
+				set_irn_n(node, n_ia32_Test_right, imm);
+				attr->am_offs += 1;
+			} else if ((offset & 0xFF00FFFF) == 0) {
+				ir_node *imm = create_Immediate(NULL, 0, offset >> 16);
+				set_irn_n(node, n_ia32_Test_right, imm);
+				attr->am_offs += 2;
+			} else if ((offset & 0x00FFFFFF) == 0) {
+				ir_node *imm = create_Immediate(NULL, 0, offset >> 24);
+				set_irn_n(node, n_ia32_Test_right, imm);
+				attr->am_offs += 3;
+			} else {
+				return;
+			}
+		} else if (offset < 256) {
+			arch_register_t const* const reg = arch_get_irn_register(left);
 
-	be_peephole_exchange(node, flags_proj);
+			if (reg != &ia32_gp_regs[REG_EAX] &&
+					reg != &ia32_gp_regs[REG_EBX] &&
+					reg != &ia32_gp_regs[REG_ECX] &&
+					reg != &ia32_gp_regs[REG_EDX]) {
+				return;
+			}
+		} else {
+			return;
+		}
+
+		/* Technically we should build a Test8Bit because of the register
+		 * constraints, but nobody changes registers at this point anymore. */
+		set_ia32_ls_mode(node, mode_Bu);
+	}
 }
 
 /**
@@ -316,8 +370,10 @@ static void peephole_ia32_Return(ir_node *node) {
 		case beo_Return:
 			/* the return node itself, ignore */
 			continue;
+		case iro_Start:
+		case beo_RegParams:
 		case beo_Barrier:
-			/* ignore the barrier, no code generated */
+			/* ignore no code generated */
 			continue;
 		case beo_IncSP:
 			/* arg, IncSP 0 nodes might occur, ignore these */
@@ -331,9 +387,7 @@ static void peephole_ia32_Return(ir_node *node) {
 		}
 	}
 
-	/* ensure, that the 3 byte return is generated
-	 * actually the emitter tests again if the block beginning has a label and
-	 * isn't just a fallthrough */
+	/* ensure, that the 3 byte return is generated */
 	be_Return_set_emit_pop(node, 1);
 }
 
@@ -438,9 +492,10 @@ static void peephole_IncSP_Store_to_push(ir_node *irn)
 
 		val = get_irn_n(store, n_ia32_unary_op);
 		mem = get_irn_n(store, n_ia32_mem);
-		spreg = arch_get_irn_register(cg->arch_env, curr_sp);
+		spreg = arch_get_irn_register(curr_sp);
 
-		push = new_rd_ia32_Push(get_irn_dbg_info(store), irg, block, noreg, noreg, mem, val, curr_sp);
+		push = new_bd_ia32_Push(get_irn_dbg_info(store), block, noreg, noreg, mem, val, curr_sp);
+		copy_mark(store, push);
 
 		if (first_push == NULL)
 			first_push = push;
@@ -449,7 +504,7 @@ static void peephole_IncSP_Store_to_push(ir_node *irn)
 
 		/* create stackpointer Proj */
 		curr_sp = new_r_Proj(irg, block, push, spmode, pn_ia32_Push_stack);
-		arch_set_irn_register(cg->arch_env, curr_sp, spreg);
+		arch_set_irn_register(curr_sp, spreg);
 
 		/* create memory Proj */
 		mem_proj = new_r_Proj(irg, block, push, mode_M, pn_ia32_Push_M);
@@ -473,10 +528,96 @@ static void peephole_IncSP_Store_to_push(ir_node *irn)
 	be_set_IncSP_offset(irn, inc_ofs);
 }
 
+#if 0
+static void peephole_store_incsp(ir_node *store)
+{
+	dbg_info *dbgi;
+	ir_node  *node;
+	ir_node  *block;
+	ir_node  *noreg;
+	ir_node  *mem;
+	ir_node  *push;
+	ir_node  *val;
+	ir_node  *base;
+	ir_node  *index;
+	ir_node  *am_base = get_irn_n(store, n_ia32_Store_base);
+	if (!be_is_IncSP(am_base)
+			|| get_nodes_block(am_base) != get_nodes_block(store))
+		return;
+	mem = get_irn_n(store, n_ia32_Store_mem);
+	if (!is_ia32_NoReg_GP(get_irn_n(store, n_ia32_Store_index))
+			|| !is_NoMem(mem))
+		return;
+
+	int incsp_offset = be_get_IncSP_offset(am_base);
+	if (incsp_offset <= 0)
+		return;
+
+	/* we have to be at offset 0 */
+	int my_offset = get_ia32_am_offs_int(store);
+	if (my_offset != 0) {
+		/* TODO here: find out wether there is a store with offset 0 before
+		 * us and wether we can move it down to our place */
+		return;
+	}
+	ir_mode *ls_mode = get_ia32_ls_mode(store);
+	int my_store_size = get_mode_size_bytes(ls_mode);
+
+	if (my_offset + my_store_size > incsp_offset)
+		return;
+
+	/* correctness checking:
+		- noone else must write to that stackslot
+		    (because after translation incsp won't allocate it anymore)
+	*/
+	sched_foreach_reverse_from(store, node) {
+		int i, arity;
+
+		if (node == am_base)
+			break;
+
+		/* make sure noone else can use the space on the stack */
+		arity = get_irn_arity(node);
+		for (i = 0; i < arity; ++i) {
+			ir_node *pred = get_irn_n(node, i);
+			if (pred != am_base)
+				continue;
+
+			if (i == n_ia32_base &&
+					(get_ia32_op_type(node) == ia32_AddrModeS
+					 || get_ia32_op_type(node) == ia32_AddrModeD)) {
+				int      node_offset  = get_ia32_am_offs_int(node);
+				ir_mode *node_ls_mode = get_ia32_ls_mode(node);
+				int      node_size    = get_mode_size_bytes(node_ls_mode);
+				/* overlapping with our position? abort */
+				if (node_offset < my_offset + my_store_size
+						&& node_offset + node_size >= my_offset)
+					return;
+				/* otherwise it's fine */
+				continue;
+			}
+
+			/* strange use of esp: abort */
+			return;
+		}
+	}
+
+	/* all ok, change to push */
+	dbgi  = get_irn_dbg_info(store);
+	block = get_nodes_block(store);
+	noreg = ia32_new_NoReg_gp(cg);
+	val   = get_irn_n(store, n_ia32_Store_val);
+
+	push  = new_bd_ia32_Push(dbgi, block, noreg, noreg, mem,
+
+	create_push(dbgi, current_ir_graph, block, am_base, store);
+}
+#endif
+
 /**
  * Return true if a mode can be stored in the GP register set
  */
-static INLINE int mode_needs_gp_reg(ir_mode *mode) {
+static inline int mode_needs_gp_reg(ir_mode *mode) {
         if (mode == mode_fpcw)
                 return 0;
         if (get_mode_size_bits(mode) > 32)
@@ -526,8 +667,8 @@ static void peephole_Load_IncSP_to_pop(ir_node *irn)
 					/* not a GP copy, ignore */
 					continue;
 				}
-				dreg = arch_get_irn_register(arch_env, node);
-				sreg = arch_get_irn_register(arch_env, be_get_Copy_op(node));
+				dreg = arch_get_irn_register(node);
+				sreg = arch_get_irn_register(be_get_Copy_op(node));
 				if (regmask & copymask & (1 << sreg->index)) {
 					break;
 				}
@@ -577,7 +718,7 @@ static void peephole_Load_IncSP_to_pop(ir_node *irn)
 		if (loads[loadslot] != NULL)
 			break;
 
-		dreg = arch_get_irn_register(arch_env, node);
+		dreg = arch_irn_get_register(node, pn_ia32_Load_res);
 		if (regmask & (1 << dreg->index)) {
 			/* this register is already used */
 			break;
@@ -619,14 +760,16 @@ static void peephole_Load_IncSP_to_pop(ir_node *irn)
 		const arch_register_t *reg;
 
 		mem = get_irn_n(load, n_ia32_mem);
-		reg = arch_get_irn_register(arch_env, load);
+		reg = arch_irn_get_register(load, pn_ia32_Load_res);
 
-		pop = new_rd_ia32_Pop(get_irn_dbg_info(load), irg, block, mem, pred_sp);
-		arch_set_irn_register(arch_env, pop, reg);
+		pop = new_bd_ia32_Pop(get_irn_dbg_info(load), block, mem, pred_sp);
+		arch_irn_set_register(pop, pn_ia32_Load_res, reg);
+
+		copy_mark(load, pop);
 
 		/* create stackpointer Proj */
 		pred_sp = new_r_Proj(irg, block, pop, mode_Iu, pn_ia32_Pop_stack);
-		arch_set_irn_register(arch_env, pred_sp, esp);
+		arch_set_irn_register(pred_sp, esp);
 
 		sched_add_before(irn, pop);
 
@@ -688,12 +831,12 @@ static ir_node *create_pop(dbg_info *dbgi, ir_graph *irg, ir_node *block,
 	ir_node *val;
 	ir_node *in[1];
 
-	pop   = new_rd_ia32_Pop(dbgi, irg, block, new_NoMem(), stack);
+	pop   = new_bd_ia32_Pop(dbgi, block, new_NoMem(), stack);
 
 	stack = new_r_Proj(irg, block, pop, mode_Iu, pn_ia32_Pop_stack);
-	arch_set_irn_register(arch_env, stack, esp);
+	arch_set_irn_register(stack, esp);
 	val   = new_r_Proj(irg, block, pop, mode_Iu, pn_ia32_Pop_res);
-	arch_set_irn_register(arch_env, val, reg);
+	arch_set_irn_register(val, reg);
 
 	sched_add_before(schedpoint, pop);
 
@@ -724,11 +867,11 @@ static ir_node *create_push(dbg_info *dbgi, ir_graph *irg, ir_node *block,
 	ir_node *val   = ia32_new_Unknown_gp(cg);
 	ir_node *noreg = ia32_new_NoReg_gp(cg);
 	ir_node *nomem = get_irg_no_mem(irg);
-	ir_node *push  = new_rd_ia32_Push(dbgi, irg, block, noreg, noreg, nomem, val, stack);
+	ir_node *push  = new_bd_ia32_Push(dbgi, block, noreg, noreg, nomem, val, stack);
 	sched_add_before(schedpoint, push);
 
 	stack = new_r_Proj(irg, block, push, mode_Iu, pn_ia32_Push_stack);
-	arch_set_irn_register(arch_env, stack, esp);
+	arch_set_irn_register(stack, esp);
 
 	return stack;
 }
@@ -755,7 +898,7 @@ static void peephole_be_IncSP(ir_node *node)
 	/* transform Load->IncSP combinations to Pop where possible */
 	peephole_Load_IncSP_to_pop(node);
 
-	if (arch_get_irn_register(arch_env, node) != esp)
+	if (arch_get_irn_register(node) != esp)
 		return;
 
 	/* replace IncSP -4 by Pop freereg when possible */
@@ -802,12 +945,9 @@ static void peephole_ia32_Const(ir_node *node)
 {
 	const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
 	const arch_register_t       *reg;
-	ir_graph                    *irg = current_ir_graph;
 	ir_node                     *block;
 	dbg_info                    *dbgi;
-	ir_node                     *produceval;
 	ir_node                     *xor;
-	ir_node                     *noreg;
 
 	/* try to transform a mov 0, reg to xor reg reg */
 	if (attr->offset != 0 || attr->symconst != NULL)
@@ -818,54 +958,47 @@ static void peephole_ia32_Const(ir_node *node)
 	if (be_peephole_get_value(CLASS_ia32_flags, REG_EFLAGS) != NULL)
 		return;
 
-	reg = arch_get_irn_register(arch_env, node);
+	reg = arch_get_irn_register(node);
 	assert(be_peephole_get_reg_value(reg) == NULL);
 
 	/* create xor(produceval, produceval) */
-	block      = get_nodes_block(node);
-	dbgi       = get_irn_dbg_info(node);
-	produceval = new_rd_ia32_ProduceVal(dbgi, irg, block);
-	arch_set_irn_register(arch_env, produceval, reg);
-
-	noreg = ia32_new_NoReg_gp(cg);
-	xor   = new_rd_ia32_Xor(dbgi, irg, block, noreg, noreg, new_NoMem(),
-	                        produceval, produceval);
-	arch_set_irn_register(arch_env, xor, reg);
+	block = get_nodes_block(node);
+	dbgi  = get_irn_dbg_info(node);
+	xor   = new_bd_ia32_Xor0(dbgi, block);
+	arch_set_irn_register(xor, reg);
 
-	sched_add_before(node, produceval);
 	sched_add_before(node, xor);
 
+	copy_mark(node, xor);
 	be_peephole_exchange(node, xor);
 }
 
-static INLINE int is_noreg(ia32_code_gen_t *cg, const ir_node *node)
+static inline int is_noreg(ia32_code_gen_t *cg, const ir_node *node)
 {
 	return node == cg->noreg_gp;
 }
 
-static ir_node *create_immediate_from_int(ia32_code_gen_t *cg, int val)
+static ir_node *create_immediate_from_int(int val)
 {
 	ir_graph *irg         = current_ir_graph;
 	ir_node  *start_block = get_irg_start_block(irg);
-	ir_node  *immediate   = new_rd_ia32_Immediate(NULL, irg, start_block, NULL,
-	                                              0, val);
-	arch_set_irn_register(cg->arch_env, immediate, &ia32_gp_regs[REG_GP_NOREG]);
+	ir_node  *immediate   = new_bd_ia32_Immediate(NULL, start_block, NULL, 0,
+			val);
+	arch_set_irn_register(immediate, &ia32_gp_regs[REG_GP_NOREG]);
 
 	return immediate;
 }
 
-static ir_node *create_immediate_from_am(ia32_code_gen_t *cg,
-                                         const ir_node *node)
+static ir_node *create_immediate_from_am(const ir_node *node)
 {
-	ir_graph  *irg     = get_irn_irg(node);
 	ir_node   *block   = get_nodes_block(node);
 	int        offset  = get_ia32_am_offs_int(node);
 	int        sc_sign = is_ia32_am_sc_sign(node);
 	ir_entity *entity  = get_ia32_am_sc(node);
 	ir_node   *res;
 
-	res = new_rd_ia32_Immediate(NULL, irg, block, entity, sc_sign, offset);
-	arch_set_irn_register(cg->arch_env, res, &ia32_gp_regs[REG_GP_NOREG]);
+	res = new_bd_ia32_Immediate(NULL, block, entity, sc_sign, offset);
+	arch_set_irn_register(res, &ia32_gp_regs[REG_GP_NOREG]);
 	return res;
 }
 
@@ -890,8 +1023,6 @@ static int is_am_minus_one(const ir_node *node)
  */
 static void peephole_ia32_Lea(ir_node *node)
 {
-	const arch_env_t      *arch_env = cg->arch_env;
-	ir_graph              *irg      = current_ir_graph;
 	ir_node               *base;
 	ir_node               *index;
 	const arch_register_t *base_reg;
@@ -909,7 +1040,7 @@ static void peephole_ia32_Lea(ir_node *node)
 
 	assert(is_ia32_Lea(node));
 
-	/* we can only do this if are allowed to globber the flags */
+	/* we can only do this if it is allowed to clobber the flags */
 	if(be_peephole_get_value(CLASS_ia32_flags, REG_EFLAGS) != NULL)
 		return;
 
@@ -920,13 +1051,13 @@ static void peephole_ia32_Lea(ir_node *node)
 		base     = NULL;
 		base_reg = NULL;
 	} else {
-		base_reg = arch_get_irn_register(arch_env, base);
+		base_reg = arch_get_irn_register(base);
 	}
 	if(is_noreg(cg, index)) {
 		index     = NULL;
 		index_reg = NULL;
 	} else {
-		index_reg = arch_get_irn_register(arch_env, index);
+		index_reg = arch_get_irn_register(index);
 	}
 
 	if(base == NULL && index == NULL) {
@@ -937,7 +1068,7 @@ static void peephole_ia32_Lea(ir_node *node)
 		return;
 	}
 
-	out_reg = arch_get_irn_register(arch_env, node);
+	out_reg = arch_get_irn_register(node);
 	scale   = get_ia32_am_scale(node);
 	assert(!is_ia32_need_stackent(node) || get_ia32_frame_ent(node) != NULL);
 	/* check if we have immediates values (frame entities should already be
@@ -975,7 +1106,7 @@ static void peephole_ia32_Lea(ir_node *node)
 				goto make_add_immediate;
 			} else if(!has_immediates && scale > 0) {
 				op1 = index;
-				op2 = create_immediate_from_int(cg, scale);
+				op2 = create_immediate_from_int(scale);
 				goto make_shl;
 			} else if(!has_immediates) {
 #ifdef DEBUG_libfirm
@@ -1000,27 +1131,27 @@ make_add_immediate:
 		if(is_am_one(node)) {
 			dbgi  = get_irn_dbg_info(node);
 			block = get_nodes_block(node);
-			res   = new_rd_ia32_Inc(dbgi, irg, block, op1);
-			arch_set_irn_register(arch_env, res, out_reg);
+			res   = new_bd_ia32_Inc(dbgi, block, op1);
+			arch_set_irn_register(res, out_reg);
 			goto exchange;
 		}
 		if(is_am_minus_one(node)) {
 			dbgi  = get_irn_dbg_info(node);
 			block = get_nodes_block(node);
-			res   = new_rd_ia32_Dec(dbgi, irg, block, op1);
-			arch_set_irn_register(arch_env, res, out_reg);
+			res   = new_bd_ia32_Dec(dbgi, block, op1);
+			arch_set_irn_register(res, out_reg);
 			goto exchange;
 		}
 	}
-	op2 = create_immediate_from_am(cg, node);
+	op2 = create_immediate_from_am(node);
 
 make_add:
 	dbgi  = get_irn_dbg_info(node);
 	block = get_nodes_block(node);
 	noreg = ia32_new_NoReg_gp(cg);
 	nomem = new_NoMem();
-	res   = new_rd_ia32_Add(dbgi, irg, block, noreg, noreg, nomem, op1, op2);
-	arch_set_irn_register(arch_env, res, out_reg);
+	res   = new_bd_ia32_Add(dbgi, block, noreg, noreg, nomem, op1, op2);
+	arch_set_irn_register(res, out_reg);
 	set_ia32_commutative(res);
 	goto exchange;
 
@@ -1029,32 +1160,32 @@ make_shl:
 	block = get_nodes_block(node);
 	noreg = ia32_new_NoReg_gp(cg);
 	nomem = new_NoMem();
-	res   = new_rd_ia32_Shl(dbgi, irg, block, op1, op2);
-	arch_set_irn_register(arch_env, res, out_reg);
+	res   = new_bd_ia32_Shl(dbgi, block, op1, op2);
+	arch_set_irn_register(res, out_reg);
 	goto exchange;
 
 exchange:
-	SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(cg, node));
+	SET_IA32_ORIG_NODE(res, node);
 
 	/* add new ADD/SHL to schedule */
 	DBG_OPT_LEA2ADD(node, res);
 
 	/* exchange the Add and the LEA */
 	sched_add_before(node, res);
+	copy_mark(node, res);
 	be_peephole_exchange(node, res);
 }
 
 /**
  * Split a Imul mem, imm into a Load mem and Imul reg, imm if possible.
  */
-static void peephole_ia32_Imul_split(ir_node *imul) {
+static void peephole_ia32_Imul_split(ir_node *imul)
+{
 	const ir_node         *right = get_irn_n(imul, n_ia32_IMul_right);
 	const arch_register_t *reg;
-	ir_node               *load, *block, *base, *index, *mem, *res, *noreg;
-	dbg_info              *dbgi;
-	ir_graph              *irg;
+	ir_node               *res;
 
-	if (! is_ia32_Immediate(right) || get_ia32_op_type(imul) != ia32_AddrModeS) {
+	if (!is_ia32_Immediate(right) || get_ia32_op_type(imul) != ia32_AddrModeS) {
 		/* no memory, imm form ignore */
 		return;
 	}
@@ -1064,53 +1195,49 @@ static void peephole_ia32_Imul_split(ir_node *imul) {
 		return;
 
 	/* fine, we can rebuild it */
-	dbgi  = get_irn_dbg_info(imul);
-	block = get_nodes_block(imul);
-	irg   = current_ir_graph;
-	base  = get_irn_n(imul, n_ia32_IMul_base);
-	index = get_irn_n(imul, n_ia32_IMul_index);
-	mem   = get_irn_n(imul, n_ia32_IMul_mem);
-	load = new_rd_ia32_Load(dbgi, irg, block, base, index, mem);
-
-	/* copy all attributes */
-	set_irn_pinned(load, get_irn_pinned(imul));
-	set_ia32_op_type(load, ia32_AddrModeS);
-	set_ia32_ls_mode(load, get_ia32_ls_mode(imul));
-
-	set_ia32_am_scale(load, get_ia32_am_scale(imul));
-	set_ia32_am_sc(load, get_ia32_am_sc(imul));
-	set_ia32_am_offs_int(load, get_ia32_am_offs_int(imul));
-	if (is_ia32_am_sc_sign(imul))
-		set_ia32_am_sc_sign(load);
-	if (is_ia32_use_frame(imul))
-		set_ia32_use_frame(load);
-	set_ia32_frame_ent(load, get_ia32_frame_ent(imul));
-
-	sched_add_before(imul, load);
-
-	mem = new_rd_Proj(dbgi, irg, block, load, mode_M, pn_ia32_Load_M);
-	res = new_rd_Proj(dbgi, irg, block, load, mode_Iu, pn_ia32_Load_res);
-
-	arch_set_irn_register(arch_env, res, reg);
-	be_peephole_new_node(res);
-
-	set_irn_n(imul, n_ia32_IMul_mem, mem);
-	noreg = get_irn_n(imul, n_ia32_IMul_left);
-	set_irn_n(imul, n_ia32_IMul_left, res);
-	set_ia32_op_type(imul, ia32_Normal);
+	res = turn_back_am(imul);
+	arch_set_irn_register(res, reg);
 }
 
 /**
  * Replace xorps r,r and xorpd r,r by pxor r,r
  */
-static void peephole_ia32_xZero(ir_node *xor) {
+static void peephole_ia32_xZero(ir_node *xor)
+{
 	set_irn_op(xor, op_ia32_xPzero);
 }
 
+/**
+ * Replace 16bit sign extension from ax to eax by shorter cwtl
+ */
+static void peephole_ia32_Conv_I2I(ir_node *node)
+{
+	const arch_register_t *eax          = &ia32_gp_regs[REG_EAX];
+	ir_mode               *smaller_mode = get_ia32_ls_mode(node);
+	ir_node               *val          = get_irn_n(node, n_ia32_Conv_I2I_val);
+	dbg_info              *dbgi;
+	ir_node               *block;
+	ir_node               *cwtl;
+
+	if (get_mode_size_bits(smaller_mode) != 16 ||
+			!mode_is_signed(smaller_mode)          ||
+			eax != arch_get_irn_register(val)      ||
+			eax != arch_irn_get_register(node, pn_ia32_Conv_I2I_res))
+		return;
+
+	dbgi  = get_irn_dbg_info(node);
+	block = get_nodes_block(node);
+	cwtl  = new_bd_ia32_Cwtl(dbgi, block, val);
+	arch_set_irn_register(cwtl, eax);
+	sched_add_before(node, cwtl);
+	be_peephole_exchange(node, cwtl);
+}
+
 /**
  * Register a peephole optimisation function.
  */
-static void register_peephole_optimisation(ir_op *op, peephole_opt_func func) {
+static void register_peephole_optimisation(ir_op *op, peephole_opt_func func)
+{
 	assert(op->ops.generic == NULL);
 	op->ops.generic = (op_func)func;
 }
@@ -1118,8 +1245,7 @@ static void register_peephole_optimisation(ir_op *op, peephole_opt_func func) {
 /* Perform peephole-optimizations. */
 void ia32_peephole_optimization(ia32_code_gen_t *new_cg)
 {
-	cg       = new_cg;
-	arch_env = cg->arch_env;
+	cg = new_cg;
 
 	/* register peephole optimisations */
 	clear_irp_opcodes_generic_func();
@@ -1135,6 +1261,8 @@ void ia32_peephole_optimization(ia32_code_gen_t *new_cg)
 		register_peephole_optimisation(op_ia32_IMul, peephole_ia32_Imul_split);
 	if (ia32_cg_config.use_pxor)
 		register_peephole_optimisation(op_ia32_xZero, peephole_ia32_xZero);
+	if (ia32_cg_config.use_short_sex_eax)
+		register_peephole_optimisation(op_ia32_Conv_I2I, peephole_ia32_Conv_I2I);
 
 	be_peephole_opt(cg->birg);
 }
@@ -1144,7 +1272,7 @@ void ia32_peephole_optimization(ia32_code_gen_t *new_cg)
  * all it's Projs are removed as well.
  * @param irn  The irn to be removed from schedule
  */
-static INLINE void try_kill(ir_node *node)
+static inline void try_kill(ir_node *node)
 {
 	if(get_irn_mode(node) == mode_T) {
 		const ir_edge_t *edge, *next;
@@ -1318,6 +1446,9 @@ static void optimize_conv_conv(ir_node *node)
 		}
 	}
 
+	/* Some user (like Phis) won't be happy if we change the mode. */
+	set_irn_mode(result_conv, get_irn_mode(node));
+
 	/* kill the conv */
 	exchange(node, result_conv);