X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_optimize.c;h=a09ead1310e8aebb21682a59eba23755afb17507;hb=6b45fde8adadc605dfe4c3a181c7fd8f78ac227c;hp=0d5d573002b4c88b1c9bb9d266036222b6e2483b;hpb=b24c359be385d38d535efe35df5a937a8ee9cc0c;p=libfirm diff --git a/ir/be/ia32/ia32_optimize.c b/ir/be/ia32/ia32_optimize.c index 0d5d57300..a09ead131 100644 --- a/ir/be/ia32/ia32_optimize.c +++ b/ir/be/ia32/ia32_optimize.c @@ -53,19 +53,18 @@ #include "ia32_common_transform.h" #include "ia32_transform.h" #include "ia32_dbg_stat.h" -#include "ia32_util.h" #include "ia32_architecture.h" DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;) -static void copy_mark(const ir_node *old, ir_node *new) +static void copy_mark(const ir_node *old, ir_node *newn) { if (is_ia32_is_reload(old)) - set_ia32_is_reload(new); + set_ia32_is_reload(newn); if (is_ia32_is_spill(old)) - set_ia32_is_spill(new); + set_ia32_is_spill(newn); if (is_ia32_is_remat(old)) - set_ia32_is_remat(new); + set_ia32_is_remat(newn); } typedef enum produces_flag_t { @@ -103,15 +102,15 @@ static produces_flag_t produces_test_flag(ir_node *node, int pn) case iro_ia32_ShlD: case iro_ia32_ShrD: - assert(n_ia32_ShlD_count == n_ia32_ShrD_count); + assert((int)n_ia32_ShlD_count == (int)n_ia32_ShrD_count); count = get_irn_n(node, n_ia32_ShlD_count); goto check_shift_amount; case iro_ia32_Shl: case iro_ia32_Shr: case iro_ia32_Sar: - assert(n_ia32_Shl_count == n_ia32_Shr_count - && n_ia32_Shl_count == n_ia32_Sar_count); + assert((int)n_ia32_Shl_count == (int)n_ia32_Shr_count + && (int)n_ia32_Shl_count == (int)n_ia32_Sar_count); count = get_irn_n(node, n_ia32_Shl_count); check_shift_amount: /* when shift count is zero the flags are not affected, so we can only @@ -153,7 +152,6 @@ static void peephole_ia32_Cmp(ir_node *const node) ir_node *op; ia32_attr_t const *attr; int ins_permuted; - int cmp_unsigned; ir_node *test; arch_register_t const *reg; ir_edge_t const *edge; @@ -176,16 +174,15 @@ static void peephole_ia32_Cmp(ir_node *const node) noreg = ia32_new_NoReg_gp(irg); nomem = get_irg_no_mem(current_ir_graph); op = get_irn_n(node, n_ia32_Cmp_left); - attr = get_irn_generic_attr(node); + attr = get_ia32_attr(node); ins_permuted = attr->data.ins_permuted; - cmp_unsigned = attr->data.cmp_unsigned; if (is_ia32_Cmp(node)) { test = new_bd_ia32_Test(dbgi, block, noreg, noreg, nomem, - op, op, ins_permuted, cmp_unsigned); + op, op, ins_permuted); } else { test = new_bd_ia32_Test8Bit(dbgi, block, noreg, noreg, nomem, - op, op, ins_permuted, cmp_unsigned); + op, op, ins_permuted); } set_ia32_ls_mode(test, get_ia32_ls_mode(node)); @@ -214,8 +211,8 @@ static void peephole_ia32_Test(ir_node *node) ir_node *left = get_irn_n(node, n_ia32_Test_left); ir_node *right = get_irn_n(node, n_ia32_Test_right); - assert(n_ia32_Test_left == n_ia32_Test8Bit_left - && n_ia32_Test_right == n_ia32_Test8Bit_right); + assert((int)n_ia32_Test_left == (int)n_ia32_Test8Bit_left + && (int)n_ia32_Test_right == (int)n_ia32_Test8Bit_right); if (left == right) { /* we need a test for 0 */ ir_node *block = get_nodes_block(node); @@ -223,14 +220,15 @@ static void peephole_ia32_Test(ir_node *node) ir_node *flags_proj; ir_mode *flags_mode; ir_node *schedpoint; + ir_node *op = left; const ir_edge_t *edge; if (get_nodes_block(left) != block) return; - if (is_Proj(left)) { - pn = get_Proj_proj(left); - left = get_Proj_pred(left); + if (is_Proj(op)) { + pn = get_Proj_proj(op); + op = get_Proj_pred(op); } /* walk schedule up and abort when we find left or some other node @@ -238,7 +236,7 @@ static void peephole_ia32_Test(ir_node *node) schedpoint = node; for (;;) { schedpoint = sched_prev(schedpoint); - if (schedpoint == left) + if (schedpoint == op) break; if (arch_irn_is(schedpoint, modify_flags)) return; @@ -248,29 +246,29 @@ static void peephole_ia32_Test(ir_node *node) /* make sure only Lg/Eq tests are used */ foreach_out_edge(node, edge) { - ir_node *user = get_edge_src_irn(edge); - int pnc = get_ia32_condcode(user); + ir_node *user = get_edge_src_irn(edge); + ia32_condition_code_t cc = get_ia32_condcode(user); - if (pnc != pn_Cmp_Eq && pnc != pn_Cmp_Lg) { + if (cc != ia32_cc_equal && cc != ia32_cc_not_equal) { return; } } - switch (produces_test_flag(left, pn)) { + switch (produces_test_flag(op, pn)) { case produces_flag_zero: break; case produces_flag_carry: foreach_out_edge(node, edge) { - ir_node *user = get_edge_src_irn(edge); - int pnc = get_ia32_condcode(user); + ir_node *user = get_edge_src_irn(edge); + ia32_condition_code_t cc = get_ia32_condcode(user); - switch (pnc) { - case pn_Cmp_Eq: pnc = ia32_pn_Cmp_not_carry; break; - case pn_Cmp_Lg: pnc = ia32_pn_Cmp_carry; break; - default: panic("unexpected pn"); + switch (cc) { + case ia32_cc_equal: cc = ia32_cc_above_equal; break; /* CF = 0 */ + case ia32_cc_not_equal: cc = ia32_cc_below; break; /* CF = 1 */ + default: panic("unexpected pn"); } - set_ia32_condcode(user, pnc); + set_ia32_condcode(user, cc); } break; @@ -278,21 +276,24 @@ static void peephole_ia32_Test(ir_node *node) return; } - if (get_irn_mode(left) != mode_T) { - set_irn_mode(left, mode_T); + if (get_irn_mode(op) != mode_T) { + set_irn_mode(op, mode_T); /* If there are other users, reroute them to result proj */ - if (get_irn_n_edges(left) != 2) { - ir_node *res = new_r_Proj(left, mode_Iu, pn_ia32_res); + if (get_irn_n_edges(op) != 2) { + ir_node *res = new_r_Proj(op, mode_Iu, pn_ia32_res); - edges_reroute(left, res, current_ir_graph); + edges_reroute(op, res); /* Reattach the result proj to left */ - set_Proj_pred(res, left); + set_Proj_pred(res, op); } + } else { + if (get_irn_n_edges(left) == 2) + kill_node(left); } flags_mode = ia32_reg_classes[CLASS_ia32_flags].mode; - flags_proj = new_r_Proj(left, flags_mode, pn_ia32_flags); + flags_proj = new_r_Proj(op, flags_mode, pn_ia32_flags); arch_set_irn_register(flags_proj, &ia32_registers[REG_EFLAGS]); assert(get_irn_mode(node) != mode_T); @@ -308,7 +309,7 @@ static void peephole_ia32_Test(ir_node *node) offset = imm->offset; if (get_ia32_op_type(node) == ia32_AddrModeS) { - ia32_attr_t *const attr = get_irn_generic_attr(node); + ia32_attr_t *const attr = get_ia32_attr(node); if ((offset & 0xFFFFFF00) == 0) { /* attr->am_offs += 0; */ @@ -353,13 +354,11 @@ static void peephole_ia32_Test(ir_node *node) */ static void peephole_ia32_Return(ir_node *node) { - ir_node *block, *irn; + ir_node *irn; if (!ia32_cg_config.use_pad_return) return; - block = get_nodes_block(node); - /* check if this return is the first on the block */ sched_foreach_reverse_from(node, irn) { switch (get_irn_opcode(irn)) { @@ -368,7 +367,6 @@ static void peephole_ia32_Return(ir_node *node) continue; case iro_Start: case beo_Start: - case beo_Barrier: /* ignore no code generated */ continue; case beo_IncSP: @@ -485,12 +483,15 @@ static void peephole_IncSP_Store_to_push(ir_node *irn) ir_node *val, *mem, *mem_proj; ir_node *store = stores[i]; ir_node *noreg = ia32_new_NoReg_gp(irg); + const ir_edge_t *edge; + const ir_edge_t *next; val = get_irn_n(store, n_ia32_unary_op); mem = get_irn_n(store, n_ia32_mem); spreg = arch_get_irn_register(curr_sp); - push = new_bd_ia32_Push(get_irn_dbg_info(store), block, noreg, noreg, mem, val, curr_sp); + push = new_bd_ia32_Push(get_irn_dbg_info(store), block, noreg, noreg, + mem, val, curr_sp); copy_mark(store, push); if (first_push == NULL) @@ -505,8 +506,22 @@ static void peephole_IncSP_Store_to_push(ir_node *irn) /* create memory Proj */ mem_proj = new_r_Proj(push, mode_M, pn_ia32_Push_M); + /* rewire Store Projs */ + foreach_out_edge_safe(store, edge, next) { + ir_node *proj = get_edge_src_irn(edge); + if (!is_Proj(proj)) + continue; + switch (get_Proj_proj(proj)) { + case pn_ia32_Store_M: + exchange(proj, mem_proj); + break; + default: + panic("unexpected Proj on Store->IncSp"); + } + } + /* use the memproj now */ - be_peephole_exchange(store, mem_proj); + be_peephole_exchange(store, push); inc_ofs -= 4; } @@ -544,7 +559,7 @@ static ir_node *create_push(dbg_info *dbgi, ir_node *block, ir_node *val = ia32_new_NoReg_gp(cg); ir_node *noreg = ia32_new_NoReg_gp(cg); ir_graph *irg = get_irn_irg(block); - ir_node *nomem = new_r_NoMem(irg); + ir_node *nomem = get_irg_no_mem(irg); ir_node *push = new_bd_ia32_Push(dbgi, block, noreg, noreg, nomem, val, stack); sched_add_before(schedpoint, push); @@ -581,8 +596,8 @@ static void peephole_store_incsp(ir_node *store) /* we have to be at offset 0 */ int my_offset = get_ia32_am_offs_int(store); if (my_offset != 0) { - /* TODO here: find out wether there is a store with offset 0 before - * us and wether we can move it down to our place */ + /* TODO here: find out whether there is a store with offset 0 before + * us and whether we can move it down to our place */ return; } ir_mode *ls_mode = get_ia32_ls_mode(store); @@ -644,7 +659,7 @@ static void peephole_store_incsp(ir_node *store) */ static inline int mode_needs_gp_reg(ir_mode *mode) { - if (mode == mode_fpcw) + if (mode == ia32_mode_fpcw) return 0; if (get_mode_size_bits(mode) > 32) return 0; @@ -662,7 +677,6 @@ static void peephole_Load_IncSP_to_pop(ir_node *irn) int i, maxslot, inc_ofs, ofs; ir_node *node, *pred_sp, *block; ir_node *loads[MAXPUSH_OPTIMIZE]; - ir_graph *irg; unsigned regmask = 0; unsigned copymask = ~0; @@ -772,7 +786,6 @@ static void peephole_Load_IncSP_to_pop(ir_node *irn) /* create a new IncSP if needed */ block = get_nodes_block(irn); - irg = get_irn_irg(irn); if (inc_ofs > 0) { pred_sp = be_new_IncSP(esp, block, pred_sp, -inc_ofs, be_get_IncSP_align(irn)); sched_add_before(irn, pred_sp); @@ -819,13 +832,14 @@ static void peephole_Load_IncSP_to_pop(ir_node *irn) /** * Find a free GP register if possible, else return NULL. */ -static const arch_register_t *get_free_gp_reg(void) +static const arch_register_t *get_free_gp_reg(ir_graph *irg) { + be_irg_t *birg = be_birg_from_irg(irg); int i; for (i = 0; i < N_ia32_gp_REGS; ++i) { const arch_register_t *reg = &ia32_reg_classes[CLASS_ia32_gp].regs[i]; - if (arch_register_type_is(reg, ignore)) + if (!rbitset_is_set(birg->allocatable_regs, reg->global_index)) continue; if (be_peephole_get_value(CLASS_ia32_gp, i) == NULL) @@ -857,7 +871,7 @@ static ir_node *create_pop(dbg_info *dbgi, ir_node *block, ir_node *val; ir_node *in[1]; - pop = new_bd_ia32_Pop(dbgi, block, new_r_NoMem(irg), stack); + pop = new_bd_ia32_Pop(dbgi, block, get_irg_no_mem(irg), stack); stack = new_r_Proj(pop, mode_Iu, pn_ia32_Pop_stack); arch_set_irn_register(stack, esp); @@ -907,7 +921,7 @@ static void peephole_be_IncSP(ir_node *node) if (offset < 0) { /* we need a free register for pop */ - reg = get_free_gp_reg(); + reg = get_free_gp_reg(get_irn_irg(node)); if (reg == NULL) return; @@ -947,7 +961,7 @@ static void peephole_ia32_Const(ir_node *node) const arch_register_t *reg; ir_node *block; dbg_info *dbgi; - ir_node *xor; + ir_node *xorn; /* try to transform a mov 0, reg to xor reg reg */ if (attr->offset != 0 || attr->symconst != NULL) @@ -964,13 +978,13 @@ static void peephole_ia32_Const(ir_node *node) /* create xor(produceval, produceval) */ block = get_nodes_block(node); dbgi = get_irn_dbg_info(node); - xor = new_bd_ia32_Xor0(dbgi, block); - arch_set_irn_register(xor, reg); + xorn = new_bd_ia32_Xor0(dbgi, block); + arch_set_irn_register(xorn, reg); - sched_add_before(node, xor); + sched_add_before(node, xorn); - copy_mark(node, xor); - be_peephole_exchange(node, xor); + copy_mark(node, xorn); + be_peephole_exchange(node, xorn); } static inline int is_noreg(const ir_node *node) @@ -1154,7 +1168,7 @@ make_add: block = get_nodes_block(node); irg = get_irn_irg(node); noreg = ia32_new_NoReg_gp(irg); - nomem = new_r_NoMem(irg); + nomem = get_irg_no_mem(irg); res = new_bd_ia32_Add(dbgi, block, noreg, noreg, nomem, op1, op2); arch_set_irn_register(res, out_reg); set_ia32_commutative(res); @@ -1165,7 +1179,7 @@ make_shl: block = get_nodes_block(node); irg = get_irn_irg(node); noreg = ia32_new_NoReg_gp(irg); - nomem = new_r_NoMem(irg); + nomem = get_irg_no_mem(irg); res = new_bd_ia32_Shl(dbgi, block, op1, op2); arch_set_irn_register(res, out_reg); goto exchange; @@ -1196,21 +1210,21 @@ static void peephole_ia32_Imul_split(ir_node *imul) return; } /* we need a free register */ - reg = get_free_gp_reg(); + reg = get_free_gp_reg(get_irn_irg(imul)); if (reg == NULL) return; /* fine, we can rebuild it */ - res = turn_back_am(imul); + res = ia32_turn_back_am(imul); arch_set_irn_register(res, reg); } /** * Replace xorps r,r and xorpd r,r by pxor r,r */ -static void peephole_ia32_xZero(ir_node *xor) +static void peephole_ia32_xZero(ir_node *xorn) { - set_irn_op(xor, op_ia32_xPzero); + set_irn_op(xorn, op_ia32_xPzero); } /** @@ -1273,7 +1287,7 @@ void ia32_peephole_optimization(ir_graph *irg) /** * Removes node from schedule if it is not used anymore. If irn is a mode_T node - * all it's Projs are removed as well. + * all its Projs are removed as well. * @param irn The irn to be removed from schedule */ static inline void try_kill(ir_node *node) @@ -1306,7 +1320,7 @@ static void optimize_conv_store(ir_node *node) if (!is_ia32_Store(node) && !is_ia32_Store8Bit(node)) return; - assert(n_ia32_Store_val == n_ia32_Store8Bit_val); + assert((int)n_ia32_Store_val == (int)n_ia32_Store8Bit_val); pred_proj = get_irn_n(node, n_ia32_Store_val); if (is_Proj(pred_proj)) { pred = get_Proj_pred(pred_proj); @@ -1342,7 +1356,7 @@ static void optimize_load_conv(ir_node *node) if (!is_ia32_Conv_I2I(node) && !is_ia32_Conv_I2I8Bit(node)) return; - assert(n_ia32_Conv_I2I_val == n_ia32_Conv_I2I8Bit_val); + assert((int)n_ia32_Conv_I2I_val == (int)n_ia32_Conv_I2I8Bit_val); pred = get_irn_n(node, n_ia32_Conv_I2I_val); if (!is_Proj(pred)) return; @@ -1389,7 +1403,7 @@ static void optimize_conv_conv(ir_node *node) if (!is_ia32_Conv_I2I(node) && !is_ia32_Conv_I2I8Bit(node)) return; - assert(n_ia32_Conv_I2I_val == n_ia32_Conv_I2I8Bit_val); + assert((int)n_ia32_Conv_I2I_val == (int)n_ia32_Conv_I2I8Bit_val); pred_proj = get_irn_n(node, n_ia32_Conv_I2I_val); if (is_Proj(pred_proj)) pred = get_Proj_pred(pred_proj);