X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_optimize.c;h=3ffd9c4d35fbacd97fa377fca1c1dd52f08a4304;hb=8c9bd910f70b291d3ffc76d87dd514236152053f;hp=059ce491f5c9cf6dcbb7827b2a3b11395139e682;hpb=a824d376c1c37f80c7e1ebd6304665380d28fc5f;p=libfirm diff --git a/ir/be/ia32/ia32_optimize.c b/ir/be/ia32/ia32_optimize.c index 059ce491f..3ffd9c4d3 100644 --- a/ir/be/ia32/ia32_optimize.c +++ b/ir/be/ia32/ia32_optimize.c @@ -139,40 +139,6 @@ check_shift_amount: produces_flag_zero : produces_no_flag; } -/** - * If the given node has not mode_T, creates a mode_T version (with a result Proj). - * - * @param node the node to change - * - * @return the new mode_T node (if the mode was changed) or node itself - */ -static ir_node *turn_into_mode_t(ir_node *node) -{ - ir_node *block; - ir_node *res_proj; - ir_node *new_node; - const arch_register_t *reg; - - if(get_irn_mode(node) == mode_T) - return node; - - assert(get_irn_mode(node) == mode_Iu); - - new_node = exact_copy(node); - set_irn_mode(new_node, mode_T); - - block = get_nodes_block(new_node); - res_proj = new_r_Proj(current_ir_graph, block, new_node, mode_Iu, - pn_ia32_res); - - reg = arch_get_irn_register(node); - arch_set_irn_register(res_proj, reg); - - sched_add_before(node, new_node); - be_peephole_exchange(node, res_proj); - return new_node; -} - /** * Replace Cmp(x, 0) by a Test(x, x) */ @@ -181,7 +147,6 @@ static void peephole_ia32_Cmp(ir_node *const node) ir_node *right; ia32_immediate_attr_t const *imm; dbg_info *dbgi; - ir_graph *irg; ir_node *block; ir_node *noreg; ir_node *nomem; @@ -206,20 +171,19 @@ static void peephole_ia32_Cmp(ir_node *const node) return; dbgi = get_irn_dbg_info(node); - irg = current_ir_graph; block = get_nodes_block(node); noreg = ia32_new_NoReg_gp(cg); - nomem = get_irg_no_mem(irg); + nomem = get_irg_no_mem(current_ir_graph); op = get_irn_n(node, n_ia32_Cmp_left); attr = get_irn_generic_attr(node); ins_permuted = attr->data.ins_permuted; cmp_unsigned = attr->data.cmp_unsigned; if (is_ia32_Cmp(node)) { - test = new_rd_ia32_Test(dbgi, irg, block, noreg, noreg, nomem, + test = new_bd_ia32_Test(dbgi, block, noreg, noreg, nomem, op, op, ins_permuted, cmp_unsigned); } else { - test = new_rd_ia32_Test8Bit(dbgi, irg, block, noreg, noreg, nomem, + test = new_bd_ia32_Test8Bit(dbgi, block, noreg, noreg, nomem, op, op, ins_permuted, cmp_unsigned); } set_ia32_ls_mode(test, get_ia32_ls_mode(node)); @@ -317,7 +281,19 @@ static void peephole_ia32_Test(ir_node *node) return; } - left = turn_into_mode_t(left); + if (get_irn_mode(left) != mode_T) { + set_irn_mode(left, mode_T); + + /* If there are other users, reroute them to result proj */ + if (get_irn_n_edges(left) != 2) { + ir_node *res = new_r_Proj(current_ir_graph, block, left, + mode_Iu, pn_ia32_res); + + edges_reroute(left, res, current_ir_graph); + /* Reattach the result proj to left */ + set_Proj_pred(res, left); + } + } flags_mode = ia32_reg_classes[CLASS_ia32_flags].mode; flags_proj = new_r_Proj(current_ir_graph, block, left, flags_mode, @@ -518,7 +494,7 @@ static void peephole_IncSP_Store_to_push(ir_node *irn) mem = get_irn_n(store, n_ia32_mem); spreg = arch_get_irn_register(curr_sp); - push = new_rd_ia32_Push(get_irn_dbg_info(store), irg, block, noreg, noreg, mem, val, curr_sp); + push = new_bd_ia32_Push(get_irn_dbg_info(store), block, noreg, noreg, mem, val, curr_sp); copy_mark(store, push); if (first_push == NULL) @@ -632,7 +608,7 @@ static void peephole_store_incsp(ir_node *store) noreg = ia32_new_NoReg_gp(cg); val = get_irn_n(store, n_ia32_Store_val); - push = new_rd_ia32_Push(dbgi, irg, block, noreg, noreg, mem, + push = new_bd_ia32_Push(dbgi, block, noreg, noreg, mem, create_push(dbgi, current_ir_graph, block, am_base, store); } @@ -786,7 +762,7 @@ static void peephole_Load_IncSP_to_pop(ir_node *irn) mem = get_irn_n(load, n_ia32_mem); reg = arch_irn_get_register(load, pn_ia32_Load_res); - pop = new_rd_ia32_Pop(get_irn_dbg_info(load), irg, block, mem, pred_sp); + pop = new_bd_ia32_Pop(get_irn_dbg_info(load), block, mem, pred_sp); arch_irn_set_register(pop, pn_ia32_Load_res, reg); copy_mark(load, pop); @@ -855,7 +831,7 @@ static ir_node *create_pop(dbg_info *dbgi, ir_graph *irg, ir_node *block, ir_node *val; ir_node *in[1]; - pop = new_rd_ia32_Pop(dbgi, irg, block, new_NoMem(), stack); + pop = new_bd_ia32_Pop(dbgi, block, new_NoMem(), stack); stack = new_r_Proj(irg, block, pop, mode_Iu, pn_ia32_Pop_stack); arch_set_irn_register(stack, esp); @@ -891,7 +867,7 @@ static ir_node *create_push(dbg_info *dbgi, ir_graph *irg, ir_node *block, ir_node *val = ia32_new_Unknown_gp(cg); ir_node *noreg = ia32_new_NoReg_gp(cg); ir_node *nomem = get_irg_no_mem(irg); - ir_node *push = new_rd_ia32_Push(dbgi, irg, block, noreg, noreg, nomem, val, stack); + ir_node *push = new_bd_ia32_Push(dbgi, block, noreg, noreg, nomem, val, stack); sched_add_before(schedpoint, push); stack = new_r_Proj(irg, block, push, mode_Iu, pn_ia32_Push_stack); @@ -969,7 +945,6 @@ static void peephole_ia32_Const(ir_node *node) { const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node); const arch_register_t *reg; - ir_graph *irg = current_ir_graph; ir_node *block; dbg_info *dbgi; ir_node *produceval; @@ -991,12 +966,12 @@ static void peephole_ia32_Const(ir_node *node) /* create xor(produceval, produceval) */ block = get_nodes_block(node); dbgi = get_irn_dbg_info(node); - produceval = new_rd_ia32_ProduceVal(dbgi, irg, block); + produceval = new_bd_ia32_ProduceVal(dbgi, block); arch_set_irn_register(produceval, reg); noreg = ia32_new_NoReg_gp(cg); - xor = new_rd_ia32_Xor(dbgi, irg, block, noreg, noreg, new_NoMem(), - produceval, produceval); + xor = new_bd_ia32_Xor(dbgi, block, noreg, noreg, new_NoMem(), produceval, + produceval); arch_set_irn_register(xor, reg); sched_add_before(node, produceval); @@ -1015,8 +990,8 @@ static ir_node *create_immediate_from_int(int val) { ir_graph *irg = current_ir_graph; ir_node *start_block = get_irg_start_block(irg); - ir_node *immediate = new_rd_ia32_Immediate(NULL, irg, start_block, NULL, - 0, val); + ir_node *immediate = new_bd_ia32_Immediate(NULL, start_block, NULL, 0, + val); arch_set_irn_register(immediate, &ia32_gp_regs[REG_GP_NOREG]); return immediate; @@ -1024,14 +999,13 @@ static ir_node *create_immediate_from_int(int val) static ir_node *create_immediate_from_am(const ir_node *node) { - ir_graph *irg = get_irn_irg(node); ir_node *block = get_nodes_block(node); int offset = get_ia32_am_offs_int(node); int sc_sign = is_ia32_am_sc_sign(node); ir_entity *entity = get_ia32_am_sc(node); ir_node *res; - res = new_rd_ia32_Immediate(NULL, irg, block, entity, sc_sign, offset); + res = new_bd_ia32_Immediate(NULL, block, entity, sc_sign, offset); arch_set_irn_register(res, &ia32_gp_regs[REG_GP_NOREG]); return res; } @@ -1057,7 +1031,6 @@ static int is_am_minus_one(const ir_node *node) */ static void peephole_ia32_Lea(ir_node *node) { - ir_graph *irg = current_ir_graph; ir_node *base; ir_node *index; const arch_register_t *base_reg; @@ -1166,14 +1139,14 @@ make_add_immediate: if(is_am_one(node)) { dbgi = get_irn_dbg_info(node); block = get_nodes_block(node); - res = new_rd_ia32_Inc(dbgi, irg, block, op1); + res = new_bd_ia32_Inc(dbgi, block, op1); arch_set_irn_register(res, out_reg); goto exchange; } if(is_am_minus_one(node)) { dbgi = get_irn_dbg_info(node); block = get_nodes_block(node); - res = new_rd_ia32_Dec(dbgi, irg, block, op1); + res = new_bd_ia32_Dec(dbgi, block, op1); arch_set_irn_register(res, out_reg); goto exchange; } @@ -1185,7 +1158,7 @@ make_add: block = get_nodes_block(node); noreg = ia32_new_NoReg_gp(cg); nomem = new_NoMem(); - res = new_rd_ia32_Add(dbgi, irg, block, noreg, noreg, nomem, op1, op2); + res = new_bd_ia32_Add(dbgi, block, noreg, noreg, nomem, op1, op2); arch_set_irn_register(res, out_reg); set_ia32_commutative(res); goto exchange; @@ -1195,12 +1168,12 @@ make_shl: block = get_nodes_block(node); noreg = ia32_new_NoReg_gp(cg); nomem = new_NoMem(); - res = new_rd_ia32_Shl(dbgi, irg, block, op1, op2); + res = new_bd_ia32_Shl(dbgi, block, op1, op2); arch_set_irn_register(res, out_reg); goto exchange; exchange: - SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(cg, node)); + SET_IA32_ORIG_NODE(res, node); /* add new ADD/SHL to schedule */ DBG_OPT_LEA2ADD(node, res); @@ -1237,14 +1210,42 @@ static void peephole_ia32_Imul_split(ir_node *imul) /** * Replace xorps r,r and xorpd r,r by pxor r,r */ -static void peephole_ia32_xZero(ir_node *xor) { +static void peephole_ia32_xZero(ir_node *xor) +{ set_irn_op(xor, op_ia32_xPzero); } +/** + * Replace 16bit sign extension from ax to eax by shorter cwtl + */ +static void peephole_ia32_Conv_I2I(ir_node *node) +{ + const arch_register_t *eax = &ia32_gp_regs[REG_EAX]; + ir_mode *smaller_mode = get_ia32_ls_mode(node); + ir_node *val = get_irn_n(node, n_ia32_Conv_I2I_val); + dbg_info *dbgi; + ir_node *block; + ir_node *cwtl; + + if (get_mode_size_bits(smaller_mode) != 16 || + !mode_is_signed(smaller_mode) || + eax != arch_get_irn_register(val) || + eax != arch_irn_get_register(node, pn_ia32_Conv_I2I_res)) + return; + + dbgi = get_irn_dbg_info(node); + block = get_nodes_block(node); + cwtl = new_bd_ia32_Cwtl(dbgi, block, val); + arch_set_irn_register(cwtl, eax); + sched_add_before(node, cwtl); + be_peephole_exchange(node, cwtl); +} + /** * Register a peephole optimisation function. */ -static void register_peephole_optimisation(ir_op *op, peephole_opt_func func) { +static void register_peephole_optimisation(ir_op *op, peephole_opt_func func) +{ assert(op->ops.generic == NULL); op->ops.generic = (op_func)func; } @@ -1268,6 +1269,8 @@ void ia32_peephole_optimization(ia32_code_gen_t *new_cg) register_peephole_optimisation(op_ia32_IMul, peephole_ia32_Imul_split); if (ia32_cg_config.use_pxor) register_peephole_optimisation(op_ia32_xZero, peephole_ia32_xZero); + if (ia32_cg_config.use_short_sex_eax) + register_peephole_optimisation(op_ia32_Conv_I2I, peephole_ia32_Conv_I2I); be_peephole_opt(cg->birg); }