X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_new_nodes.c;h=fb806a55c1c9a88af1b68639a5ebb6f52edab8e7;hb=14c0e61b881211dde55db89019fffa151dd87243;hp=aece7a2617831a8ade4d57c378e3badb580ecd34;hpb=b0c542989cfbeab0b39bc96c5f6e9120c1325a9c;p=libfirm diff --git a/ir/be/ia32/ia32_new_nodes.c b/ir/be/ia32/ia32_new_nodes.c index aece7a261..fb806a55c 100644 --- a/ir/be/ia32/ia32_new_nodes.c +++ b/ir/be/ia32/ia32_new_nodes.c @@ -1,20 +1,35 @@ +/* + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. + * + * This file is part of libFirm. + * + * This file may be distributed and/or modified under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation and appearing in the file LICENSE.GPL included in the + * packaging of this file. + * + * Licensees holding valid libFirm Professional Edition licenses may use + * this file in accordance with the libFirm Commercial License. + * Agreement provided with the Software. + * + * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE + * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE. + */ + /** + * @file + * @brief Handling of ia32 specific firm opcodes. + * @author Christian Wuerdig + * @version $Id$ + * * This file implements the creation of the achitecture specific firm opcodes - * and the coresponding node constructors for the $arch assembler irg. - * @author Christian Wuerdig - * $Id$ + * and the corresponding node constructors for the ia32 assembler irg. */ - #ifdef HAVE_CONFIG_H #include "config.h" #endif -#ifdef _WIN32 -#include -#else -#include -#endif - #include #include "irprog_t.h" @@ -27,20 +42,18 @@ #include "firm_common_t.h" #include "irvrfy_t.h" #include "irprintf.h" +#include "iredges.h" +#include "error.h" +#include "raw_bitset.h" +#include "xmalloc.h" -#include "../bearch.h" +#include "../bearch_t.h" +#include "bearch_ia32_t.h" #include "ia32_nodes_attr.h" #include "ia32_new_nodes.h" #include "gen_ia32_regalloc_if.h" - -#ifdef obstack_chunk_alloc -# undef obstack_chunk_alloc -# define obstack_chunk_alloc xmalloc -#else -# define obstack_chunk_alloc xmalloc -# define obstack_chunk_free free -#endif +#include "gen_ia32_machine.h" /*********************************************************************************** * _ _ _ __ @@ -53,108 +66,57 @@ * |_| ***********************************************************************************/ -/** - * Prints a tarval to file F. - * @param F output file - * @param tv tarval - * @param brackets 1 == print square brackets around tarval - */ -static void fprintf_tv(FILE *F, tarval *tv, int brackets) { - char buf[1024]; - tarval_snprintf(buf, sizeof(buf), tv); - - if (brackets) - fprintf(F, "[%s]", buf); - else - fprintf(F, "%s", buf); -} - -/** - * Returns the name of a SymConst. - * @param symc the SymConst - * @return name of the SymConst - */ -const char *get_sc_name(ir_node *symc) { - if (get_irn_opcode(symc) != iro_SymConst) - return "NONE"; - - switch (get_SymConst_kind(symc)) { - case symconst_addr_name: - return get_id_str(get_SymConst_name(symc)); - - case symconst_addr_ent: - return get_entity_ld_name(get_SymConst_entity(symc)); - - default: - assert(0 && "Unsupported SymConst"); - } - - return NULL; -} - -/** - * Returns a string containing the names of all registers within the limited bitset - */ -static char *get_limited_regs(const arch_register_req_t *req, char *buf, int max) { - bitset_t *bs = bitset_alloca(req->cls->n_regs); - char *p = buf; - int size = 0; - int i, cnt; - - req->limited(NULL, bs); - - for (i = 0; i < req->cls->n_regs; i++) { - if (bitset_is_set(bs, i)) { - cnt = snprintf(p, max - size, " %s", req->cls->regs[i].name); - if (cnt < 0) { - fprintf(stderr, "dumper problem, exiting\n"); - exit(1); - } - - p += cnt; - size += cnt; - - if (size >= max) - break; - } - } - - return buf; -} - /** * Dumps the register requirements for either in or out. */ -static void dump_reg_req(FILE *F, ir_node *n, const ia32_register_req_t **reqs, int inout) { +static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs, + int inout) { char *dir = inout ? "out" : "in"; int max = inout ? get_ia32_n_res(n) : get_irn_arity(n); - char *buf = alloca(1024); + char buf[1024]; int i; - memset(buf, 0, 1024); + memset(buf, 0, sizeof(buf)); if (reqs) { for (i = 0; i < max; i++) { fprintf(F, "%sreq #%d =", dir, i); - if (reqs[i]->req.type == arch_register_req_type_none) { + if (reqs[i]->type == arch_register_req_type_none) { fprintf(F, " n/a"); } - if (reqs[i]->req.type & arch_register_req_type_normal) { - fprintf(F, " %s", reqs[i]->req.cls->name); + if (reqs[i]->type & arch_register_req_type_normal) { + fprintf(F, " %s", reqs[i]->cls->name); } - if (reqs[i]->req.type & arch_register_req_type_limited) { - fprintf(F, " %s", get_limited_regs(&reqs[i]->req, buf, 1024)); + if (reqs[i]->type & arch_register_req_type_limited) { + fprintf(F, " %s", + arch_register_req_format(buf, sizeof(buf), reqs[i], n)); } - if (reqs[i]->req.type & arch_register_req_type_should_be_same) { - ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->same_pos)); + if (reqs[i]->type & arch_register_req_type_should_be_same) { + unsigned other = reqs[i]->other_same; + int i; + + ir_fprintf(F, " same as"); + for (i = 0; 1U << i <= other; ++i) { + if (other & (1U << i)) { + ir_fprintf(F, " %+F", get_irn_n(n, i)); + } + } } - if (reqs[i]->req.type & arch_register_req_type_should_be_different) { - ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->different_pos)); + if (reqs[i]->type & arch_register_req_type_must_be_different) { + unsigned other = reqs[i]->other_different; + int i; + + ir_fprintf(F, " different from"); + for (i = 0; 1U << i <= other; ++i) { + if (other & (1U << i)) { + ir_fprintf(F, " %+F", get_irn_n(n, i)); + } + } } fprintf(F, "\n"); @@ -174,53 +136,71 @@ static void dump_reg_req(FILE *F, ir_node *n, const ia32_register_req_t **reqs, * @param reason indicates which kind of information should be dumped * @return 0 on success or != 0 on failure */ -static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) { +static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { ir_mode *mode = NULL; int bad = 0; - int i; - ia32_attr_t *attr; - const ia32_register_req_t **reqs; + int i, n_res, flags; + const arch_register_req_t **reqs; const arch_register_t **slots; switch (reason) { case dump_node_opcode_txt: fprintf(F, "%s", get_irn_opname(n)); - break; - case dump_node_mode_txt: - mode = get_irn_mode(n); + if(is_ia32_Immediate(n) || is_ia32_Const(n)) { + const ia32_immediate_attr_t *attr + = get_ia32_immediate_attr_const(n); - if (is_ia32_Load(n) || is_ia32_Store(n)) { - mode = get_ia32_ls_mode(n); - } - - if (mode) { - fprintf(F, "[%s]", get_mode_name(mode)); + fputc(' ', F); + if(attr->symconst) { + if(attr->sc_sign) { + fputc('-', F); + } + fputs(get_entity_name(attr->symconst), F); + } + if(attr->offset != 0 || attr->symconst == NULL) { + if(attr->offset > 0 && attr->symconst != NULL) { + fputc('+', F); + } + fprintf(F, "%ld", attr->offset); + } } else { - fprintf(F, "[?NOMODE?]"); - } - break; + const ia32_attr_t *attr = get_ia32_attr_const(n); - case dump_node_nodeattr_txt: - if (is_ia32_Call(n)) { - fprintf(F, "&%s ", get_ia32_sc(n)); - } - else if (get_ia32_cnst(n)) { - char *pref = ""; + if(attr->am_sc != NULL || attr->am_offs != 0) + fputs(" [", F); - if (get_ia32_sc(n)) { - pref = "SymC "; + if(attr->am_sc != NULL) { + if(attr->data.am_sc_sign) { + fputc('-', F); + } + fputs(get_entity_name(attr->am_sc), F); + } + if(attr->am_offs != 0) { + if(attr->am_offs > 0 && attr->am_sc != NULL) { + fputc('+', F); + } + fprintf(F, "%d", attr->am_offs); } - fprintf(F, "[%s%s]", pref, get_ia32_cnst(n)); + if(attr->am_sc != NULL || attr->am_offs != 0) + fputc(']', F); } + break; + + case dump_node_mode_txt: + if (is_ia32_Ld(n) || is_ia32_St(n)) { + mode = get_ia32_ls_mode(n); + fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?"); + } + break; + case dump_node_nodeattr_txt: if (! is_ia32_Lea(n)) { if (is_ia32_AddrModeS(n)) { fprintf(F, "[AM S] "); - } - else if (is_ia32_AddrModeD(n)) { + } else if (is_ia32_AddrModeD(n)) { fprintf(F, "[AM D] "); } } @@ -228,7 +208,7 @@ static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) { break; case dump_node_info_txt: - attr = get_ia32_attr(n); + n_res = get_ia32_n_res(n); fprintf(F, "=== IA32 attr begin ===\n"); /* dump IN requirements */ @@ -238,37 +218,30 @@ static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) { } /* dump OUT requirements */ - if (attr->n_res > 0) { + if (n_res > 0) { reqs = get_ia32_out_req_all(n); dump_reg_req(F, n, reqs, 1); } /* dump assigned registers */ slots = get_ia32_slots(n); - if (slots && attr->n_res > 0) { - for (i = 0; i < attr->n_res; i++) { - if (slots[i]) { - fprintf(F, "reg #%d = %s\n", i, slots[i]->name); - } - else { - fprintf(F, "reg #%d = n/a\n", i); - } + if (slots && n_res > 0) { + for (i = 0; i < n_res; i++) { + const arch_register_t *reg; + + reg = slots[i]; + + fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a"); } + fprintf(F, "\n"); } - fprintf(F, "\n"); /* dump op type */ fprintf(F, "op = "); - switch (attr->tp) { + switch (get_ia32_op_type(n)) { case ia32_Normal: fprintf(F, "Normal"); break; - case ia32_Const: - fprintf(F, "Const"); - break; - case ia32_SymConst: - fprintf(F, "SymConst"); - break; case ia32_AddrModeD: fprintf(F, "AM Dest (Load+Store)"); break; @@ -276,90 +249,118 @@ static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) { fprintf(F, "AM Source (Load)"); break; default: - fprintf(F, "unknown (%d)", attr->tp); + fprintf(F, "unknown (%d)", get_ia32_op_type(n)); break; } fprintf(F, "\n"); - /* dump supported am */ fprintf(F, "AM support = "); - switch (attr->am_support) { + switch (get_ia32_am_support(n)) { case ia32_am_None: fprintf(F, "none"); break; case ia32_am_Source: fprintf(F, "source only (Load)"); break; - case ia32_am_Dest: - fprintf(F, "dest only (Load+Store)"); - break; - case ia32_am_Full: - fprintf(F, "full"); - break; default: - fprintf(F, "unknown (%d)", attr->am_support); + fprintf(F, "unknown (%d)", get_ia32_am_support(n)); break; } fprintf(F, "\n"); - /* dump am flavour */ - fprintf(F, "AM flavour ="); - if (attr->am_flavour == ia32_am_N) { - fprintf(F, " none"); - } - else { - if (attr->am_flavour & ia32_O) { - fprintf(F, " O"); - } - if (attr->am_flavour & ia32_B) { - fprintf(F, " B"); - } - if (attr->am_flavour & ia32_I) { - fprintf(F, " I"); - } - if (attr->am_flavour & ia32_S) { - fprintf(F, " S"); - } - } - fprintf(F, " (%d)\n", attr->am_flavour); - /* dump AM offset */ - fprintf(F, "AM offset = "); - if (attr->am_offs) { - fprintf(F, "%s", get_ia32_am_offs(n)); + if(get_ia32_am_offs_int(n) != 0) { + fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n)); } - else { - fprintf(F, "n/a"); + + /* dump AM symconst */ + if(get_ia32_am_sc(n) != NULL) { + ir_entity *ent = get_ia32_am_sc(n); + ident *id = get_entity_ld_ident(ent); + fprintf(F, "AM symconst = %s\n", get_id_str(id)); } - fprintf(F, "\n"); /* dump AM scale */ fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n)); /* dump pn code */ - fprintf(F, "pn_code = %d\n", get_ia32_pncode(n)); + if (is_ia32_SwitchJmp(n)) { + fprintf(F, "pn_code = %ld\n", get_ia32_condcode(n)); + } else if (is_ia32_CMov(n) || is_ia32_Set(n) || is_ia32_Jcc(n)) { + ia32_attr_t *attr = get_ia32_attr(n); + long pnc = get_ia32_condcode(n); + fprintf(F, "pn_code = 0x%lX (%s)\n", pnc, get_pnc_string(pnc & pn_Cmp_True)); + fprintf(F, "ins_permuted = %u \n", attr->data.ins_permuted); + fprintf(F, "cmp_unsigned = %u \n", attr->data.cmp_unsigned); + } + else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) { + fprintf(F, "size = %u\n", get_ia32_copyb_size(n)); + } - /* dump n_res */ fprintf(F, "n_res = %d\n", get_ia32_n_res(n)); + fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n)); + fprintf(F, "commutative = %d\n", is_ia32_commutative(n)); + fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n)); + fprintf(F, "is reload = %d\n", is_ia32_is_reload(n)); + fprintf(F, "latency = %d\n", get_ia32_latency(n)); /* dump flags */ fprintf(F, "flags ="); - if (attr->flags == arch_irn_flags_none) { + flags = get_ia32_flags(n); + if (flags == arch_irn_flags_none) { fprintf(F, " none"); } else { - if (attr->flags & arch_irn_flags_dont_spill) { + if (flags & arch_irn_flags_dont_spill) { fprintf(F, " unspillable"); } - if (attr->flags & arch_irn_flags_rematerializable) { + if (flags & arch_irn_flags_rematerializable) { fprintf(F, " remat"); } - if (attr->flags & arch_irn_flags_ignore) { + if (flags & arch_irn_flags_ignore) { fprintf(F, " ignore"); } + if (flags & arch_irn_flags_modify_sp) { + fprintf(F, " modify_sp"); + } + if (flags & arch_irn_flags_modify_flags) { + fprintf(F, " modify_flags"); + } + } + fprintf(F, " (%d)\n", flags); + + /* dump frame entity */ + fprintf(F, "frame entity = "); + if (get_ia32_frame_ent(n)) { + ir_fprintf(F, "%+F", get_ia32_frame_ent(n)); } - fprintf(F, " (%d)\n", attr->flags); + else { + fprintf(F, "n/a"); + } + fprintf(F, "\n"); + + /* dump modes */ + fprintf(F, "ls_mode = "); + if (get_ia32_ls_mode(n)) { + ir_fprintf(F, "%+F", get_ia32_ls_mode(n)); + } + else { + fprintf(F, "n/a"); + } + fprintf(F, "\n"); + +#ifndef NDEBUG + /* dump original ir node name */ + fprintf(F, "orig node = "); + if (get_ia32_orig_node(n)) { + fprintf(F, "%s", get_ia32_orig_node(n)); + } + else { + fprintf(F, "n/a"); + } + fprintf(F, "\n"); +#endif /* NDEBUG */ fprintf(F, "=== IA32 attr end ===\n"); /* end of: case dump_node_info_txt */ @@ -382,37 +383,84 @@ static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) { * |___/ ***************************************************************************************************/ - static char *copy_str(char *dst, const char *src) { - dst = xcalloc(1, strlen(src) + 1); - strncpy(dst, src, strlen(src) + 1); - return dst; - } +ia32_attr_t *get_ia32_attr(ir_node *node) { + assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes"); + return (ia32_attr_t *)get_irn_generic_attr(node); +} - static char *set_cnst_from_tv(char *cnst, tarval *tv) { - if (cnst) { - free(cnst); - } +const ia32_attr_t *get_ia32_attr_const(const ir_node *node) { + assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes"); + return (const ia32_attr_t*) get_irn_generic_attr_const(node); +} - cnst = xcalloc(1, 64); - assert(tarval_snprintf(cnst, 63, tv)); - return cnst; - } +ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr); + return x87_attr; +} -/** - * Wraps get_irn_generic_attr() as it takes no const ir_node, so we need to do a cast. - * Firm was made by people hating const :-( - */ -ia32_attr_t *get_ia32_attr(const ir_node *node) { - assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes"); - return (ia32_attr_t *)get_irn_generic_attr((ir_node *)node); +const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr); + return x87_attr; +} + +const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr); + + return asm_attr; +} + +ia32_immediate_attr_t *get_ia32_immediate_attr(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + ia32_immediate_attr_t *imm_attr = CAST_IA32_ATTR(ia32_immediate_attr_t, attr); + + return imm_attr; +} + +const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node) +{ + const ia32_attr_t *attr = get_ia32_attr_const(node); + const ia32_immediate_attr_t *imm_attr = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr); + + return imm_attr; +} + +ia32_condcode_attr_t *get_ia32_condcode_attr(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + ia32_condcode_attr_t *cc_attr = CAST_IA32_ATTR(ia32_condcode_attr_t, attr); + + return cc_attr; +} + +const ia32_condcode_attr_t *get_ia32_condcode_attr_const(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + const ia32_condcode_attr_t *cc_attr = CONST_CAST_IA32_ATTR(ia32_condcode_attr_t, attr); + + return cc_attr; +} + +ia32_copyb_attr_t *get_ia32_copyb_attr(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + ia32_copyb_attr_t *copyb_attr = CAST_IA32_ATTR(ia32_copyb_attr_t, attr); + + return copyb_attr; +} + +const ia32_copyb_attr_t *get_ia32_copyb_attr_const(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + const ia32_copyb_attr_t *copyb_attr = CONST_CAST_IA32_ATTR(ia32_copyb_attr_t, attr); + + return copyb_attr; } /** * Gets the type of an ia32 node. */ ia32_op_type_t get_ia32_op_type(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - return attr->tp; + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.tp; } /** @@ -420,191 +468,225 @@ ia32_op_type_t get_ia32_op_type(const ir_node *node) { */ void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) { ia32_attr_t *attr = get_ia32_attr(node); - attr->tp = tp; + attr->data.tp = tp; } /** - * Gets the supported addrmode of an ia32 node + * Gets the supported address mode of an ia32 node */ ia32_am_type_t get_ia32_am_support(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - return attr->am_support; + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.am_support; } -/** - * Sets the supported addrmode of an ia32 node - */ -void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp) { - ia32_attr_t *attr = get_ia32_attr(node); - attr->am_support = am_tp; +ia32_am_arity_t get_ia32_am_arity(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.am_arity; } /** - * Gets the addrmode flavour of an ia32 node + * Sets the supported address mode of an ia32 node */ -ia32_am_flavour_t get_ia32_am_flavour(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - return attr->am_flavour; +void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp, + ia32_am_arity_t arity) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.am_support = am_tp; + attr->data.am_arity = arity; + + assert(am_tp == ia32_am_None ? + arity == ia32_am_arity_none : + arity == ia32_am_unary || arity == ia32_am_binary); } /** - * Sets the addrmode flavour of an ia32 node + * Gets the address mode offset as int. */ -void set_ia32_am_flavour(ir_node *node, ia32_am_flavour_t am_flavour) { - ia32_attr_t *attr = get_ia32_attr(node); - attr->am_flavour = am_flavour; +int get_ia32_am_offs_int(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->am_offs; } /** - * Joins all offsets to one string with adds. + * Sets the address mode offset from an int. */ -char *get_ia32_am_offs(const ir_node *node) { +void set_ia32_am_offs_int(ir_node *node, int offset) { ia32_attr_t *attr = get_ia32_attr(node); - char *res = NULL; - int size; - - if (! attr->am_offs) { - return NULL; - } + attr->am_offs = offset; +} - size = obstack_object_size(attr->am_offs); - if (size > 0) { - res = xcalloc(1, size + 2); - res[0] = attr->offs_sign; - memcpy(&res[1], obstack_base(attr->am_offs), size); - } +void add_ia32_am_offs_int(ir_node *node, int offset) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->am_offs += offset; +} - res[size + 1] = '\0'; - return res; +/** + * Returns the symconst entity associated to address mode. + */ +ir_entity *get_ia32_am_sc(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->am_sc; } /** - * Add an offset for addrmode. + * Sets the symconst entity associated to address mode. */ -static void extend_ia32_am_offs(ir_node *node, char *offset, char op) { +void set_ia32_am_sc(ir_node *node, ir_entity *entity) { ia32_attr_t *attr = get_ia32_attr(node); + attr->am_sc = entity; +} - if (! offset) - return; - - /* offset could already have an explicit sign */ - /* -> supersede op if necessary */ - if (offset[0] == '-' || offset[0] == '+') { - op = offset[0]; - offset++; - } - - if (!attr->am_offs) { - /* obstack is not initialized */ - attr->am_offs = xcalloc(1, sizeof(*(attr->am_offs))); - obstack_init(attr->am_offs); - attr->offs_sign = op; - } - else { - /* If obstack is initialized, connect the new offset with op */ - obstack_printf(attr->am_offs, "%c", op); - } - - obstack_printf(attr->am_offs, "%s", offset); +/** + * Sets the sign bit for address mode symconst. + */ +void set_ia32_am_sc_sign(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.am_sc_sign = 1; } /** - * Add an offset for addrmode. + * Clears the sign bit for address mode symconst. */ -void add_ia32_am_offs(ir_node *node, char *offset) { - extend_ia32_am_offs(node, offset, '+'); +void clear_ia32_am_sc_sign(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.am_sc_sign = 0; } /** - * Sub an offset for addrmode. + * Returns the sign bit for address mode symconst. */ -void sub_ia32_am_offs(ir_node *node, char *offset) { - extend_ia32_am_offs(node, offset, '-'); +int is_ia32_am_sc_sign(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.am_sc_sign; } /** * Gets the addr mode const. */ int get_ia32_am_scale(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - return attr->am_scale; + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.am_scale; } /** - * Sets the index register scale for addrmode. + * Sets the index register scale for address mode. */ void set_ia32_am_scale(ir_node *node, int scale) { ia32_attr_t *attr = get_ia32_attr(node); - attr->am_scale = scale; + assert(0 <= scale && scale < 4 && "AM scale out of range"); + attr->data.am_scale = scale; +} + +void ia32_copy_am_attrs(ir_node *to, const ir_node *from) +{ + set_ia32_ls_mode(to, get_ia32_ls_mode(from)); + set_ia32_am_scale(to, get_ia32_am_scale(from)); + set_ia32_am_sc(to, get_ia32_am_sc(from)); + if(is_ia32_am_sc_sign(from)) + set_ia32_am_sc_sign(to); + add_ia32_am_offs_int(to, get_ia32_am_offs_int(from)); + set_ia32_frame_ent(to, get_ia32_frame_ent(from)); + if (is_ia32_use_frame(from)) + set_ia32_use_frame(to); } /** - * Return the tarval of an immediate operation or NULL in case of SymConst + * Sets the uses_frame flag. */ -tarval *get_ia32_Immop_tarval(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - return attr->tv; +void set_ia32_use_frame(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.use_frame = 1; } /** - * Sets the attributes of an immediate operation to the specified tarval + * Clears the uses_frame flag. */ -void set_ia32_Immop_tarval(ir_node *node, tarval *tv) { - ia32_attr_t *attr = get_ia32_attr(node); - attr->tv = tv; - attr->cnst = set_cnst_from_tv(attr->cnst, attr->tv); +void clear_ia32_use_frame(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.use_frame = 0; } /** - * Return the sc attribute. + * Gets the uses_frame flag. */ -char *get_ia32_sc(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - return attr->sc; +int is_ia32_use_frame(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.use_frame; } /** - * Sets the sc attribute. + * Sets node to commutative. */ -void set_ia32_sc(ir_node *node, char *sc) { - ia32_attr_t *attr = get_ia32_attr(node); - attr->sc = copy_str(attr->sc, sc); - - if (attr->cnst) { - free(attr->cnst); - } - attr->cnst = attr->sc; +void set_ia32_commutative(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.is_commutative = 1; } /** - * Gets the string representation of the internal const (tv or symconst) + * Sets node to non-commutative. */ -char *get_ia32_cnst(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - return attr->cnst; +void clear_ia32_commutative(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.is_commutative = 0; } /** - * Sets the uses_frame attribute. + * Checks if node is commutative. */ -void set_ia32_use_frame(ir_node *node, char flag) { +int is_ia32_commutative(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.is_commutative; +} + +void set_ia32_need_stackent(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.need_stackent = 1; +} + +void clear_ia32_need_stackent(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.need_stackent = 0; +} + +int is_ia32_need_stackent(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.need_stackent; +} + +void set_ia32_is_reload(ir_node *node) { ia32_attr_t *attr = get_ia32_attr(node); - attr->use_frame = flag; + attr->data.is_reload = 1; } -/** - * Gets the uses_frame attribute - */ -char get_ia32_use_frame(const ir_node *node) { +int is_ia32_is_reload(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.is_reload; +} + +void set_ia32_is_spill(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.is_spill = 1; +} + +int is_ia32_is_spill(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.is_spill; +} + +void set_ia32_is_remat(ir_node *node) { ia32_attr_t *attr = get_ia32_attr(node); - return attr->use_frame; + attr->data.is_remat = 1; +} + +int is_ia32_is_remat(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.is_remat; } /** * Gets the mode of the stored/loaded value (only set for Store/Load) */ ir_mode *get_ia32_ls_mode(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->ls_mode; } @@ -617,41 +699,93 @@ void set_ia32_ls_mode(ir_node *node, ir_mode *mode) { } /** - * Returns the argument register requirements of an ia32 node. + * Gets the frame entity assigned to this node. */ -const ia32_register_req_t **get_ia32_in_req_all(const ir_node *node) { +ir_entity *get_ia32_frame_ent(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->frame_ent; +} + +/** + * Sets the frame entity for this node. + */ +void set_ia32_frame_ent(ir_node *node, ir_entity *ent) { ia32_attr_t *attr = get_ia32_attr(node); + attr->frame_ent = ent; + if(ent != NULL) + set_ia32_use_frame(node); + else + clear_ia32_use_frame(node); +} + + +/** + * Gets the instruction latency. + */ +unsigned get_ia32_latency(const ir_node *node) { + const ir_op *op = get_irn_op(node); + const ia32_op_attr_t *op_attr = (ia32_op_attr_t*) get_op_attr(op); + return op_attr->latency; +} + +/** + * Returns the argument register requirements of an ia32 node. + */ +const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->in_req; } /** - * Returns the result register requirements of an ia32 node. + * Sets the argument register requirements of an ia32 node. */ -const ia32_register_req_t **get_ia32_out_req_all(const ir_node *node) { +void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) { ia32_attr_t *attr = get_ia32_attr(node); + attr->in_req = reqs; +} + +/** + * Returns the result register requirements of an ia32 node. + */ +const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->out_req; } /** - * Returns the argument register requirement at position pos of an ia32 node. + * Sets the result register requirements of an ia32 node. */ -const ia32_register_req_t *get_ia32_in_req(const ir_node *node, int pos) { +void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) { ia32_attr_t *attr = get_ia32_attr(node); + attr->out_req = reqs; +} + +/** + * Returns the argument register requirement at position pos of an ia32 node. + */ +const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + if(attr->in_req == NULL) + return arch_no_register_req; + return attr->in_req[pos]; } /** * Returns the result register requirement at position pos of an ia32 node. */ -const ia32_register_req_t *get_ia32_out_req(const ir_node *node, int pos) { - ia32_attr_t *attr = get_ia32_attr(node); +const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + if(attr->out_req == NULL) + return arch_no_register_req; + return attr->out_req[pos]; } /** * Sets the OUT register requirements at position pos. */ -void set_ia32_req_out(ir_node *node, const ia32_register_req_t *req, int pos) { +void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) { ia32_attr_t *attr = get_ia32_attr(node); attr->out_req[pos] = req; } @@ -659,7 +793,7 @@ void set_ia32_req_out(ir_node *node, const ia32_register_req_t *req, int pos) { /** * Sets the IN register requirements at position pos. */ -void set_ia32_req_in(ir_node *node, const ia32_register_req_t *req, int pos) { +void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) { ia32_attr_t *attr = get_ia32_attr(node); attr->in_req[pos] = req; } @@ -668,113 +802,147 @@ void set_ia32_req_in(ir_node *node, const ia32_register_req_t *req, int pos) { * Returns the register flag of an ia32 node. */ arch_irn_flags_t get_ia32_flags(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - return attr->flags; + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.flags; } /** * Sets the register flag of an ia32 node. */ -void set_ia32_flags(const ir_node *node, arch_irn_flags_t flags) { +void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) { ia32_attr_t *attr = get_ia32_attr(node); - attr->flags = flags; + attr->data.flags = flags; +} + +void add_ia32_flags(ir_node *node, arch_irn_flags_t flags) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.flags |= flags; } /** * Returns the result register slots of an ia32 node. */ const arch_register_t **get_ia32_slots(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->slots; } /** - * Returns the name of the OUT register at position pos. + * Returns the number of results. */ -const char *get_ia32_out_reg_name(const ir_node *node, int pos) { - ia32_attr_t *attr = get_ia32_attr(node); - - assert(is_ia32_irn(node) && "Not an ia32 node."); - assert(pos < attr->n_res && "Invalid OUT position."); - assert(attr->slots[pos] && "No register assigned"); - - return arch_register_get_name(attr->slots[pos]); +int get_ia32_n_res(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return ARR_LEN(attr->slots); } /** - * Returns the index of the OUT register at position pos within its register class. + * Returns the condition code of a node. */ -int get_ia32_out_regnr(const ir_node *node, int pos) { - ia32_attr_t *attr = get_ia32_attr(node); +long get_ia32_condcode(const ir_node *node) +{ + const ia32_condcode_attr_t *attr = get_ia32_condcode_attr_const(node); + return attr->pn_code; +} - assert(is_ia32_irn(node) && "Not an ia32 node."); - assert(pos < attr->n_res && "Invalid OUT position."); - assert(attr->slots[pos] && "No register assigned"); +/** + * Sets the condition code of a node + */ +void set_ia32_condcode(ir_node *node, long code) +{ + ia32_condcode_attr_t *attr = get_ia32_condcode_attr(node); + attr->pn_code = code; +} - return arch_register_get_index(attr->slots[pos]); +/** + * Returns the condition code of a node. + */ +unsigned get_ia32_copyb_size(const ir_node *node) +{ + const ia32_copyb_attr_t *attr = get_ia32_copyb_attr_const(node); + return attr->size; } /** - * Returns the OUT register at position pos. + * Sets the flags for the n'th out. */ -const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) { +void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) { ia32_attr_t *attr = get_ia32_attr(node); + assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position."); + attr->out_flags[pos] = flags; +} - assert(is_ia32_irn(node) && "Not an ia32 node."); - assert(pos < attr->n_res && "Invalid OUT position."); - assert(attr->slots[pos] && "No register assigned"); +/** + * Gets the flags for the n'th out. + */ +arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position."); + return attr->out_flags[pos]; +} - return attr->slots[pos]; +/** + * Get the list of available execution units. + */ +const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->exec_units; } /** - * Sets the number of results. + * Get the exception label attribute. */ -void set_ia32_n_res(ir_node *node, int n_res) { - ia32_attr_t *attr = get_ia32_attr(node); - attr->n_res = n_res; +unsigned get_ia32_exc_label(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.has_except_label; } /** - * Returns the number of results. + * Set the exception label attribute. */ -int get_ia32_n_res(const ir_node *node) { +void set_ia32_exc_label(ir_node *node, unsigned flag) { ia32_attr_t *attr = get_ia32_attr(node); - return attr->n_res; + attr->data.has_except_label = flag; } /** - * Returns the flavour of an ia32 node, + * Return the exception label id. */ -ia32_op_flavour_t get_ia32_flavour(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - return attr->op_flav; +ir_label_t get_ia32_exc_label_id(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + + assert(attr->data.has_except_label); + return attr->exc_label; } /** - * Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh. + * Assign the exception label id. */ -void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) { +void set_ia32_exc_label_id(ir_node *node, ir_label_t id) { ia32_attr_t *attr = get_ia32_attr(node); - attr->op_flav = op_flav; + + assert(attr->data.has_except_label); + attr->exc_label = id; } +#ifndef NDEBUG + /** - * Returns the projnum code. + * Returns the name of the original ir node. */ -long get_ia32_pncode(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - return attr->pn_code; +const char *get_ia32_orig_node(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->orig_node; } /** - * Sets the projnum code + * Sets the name of the original ir node. */ -void set_ia32_pncode(ir_node *node, long code) { +void set_ia32_orig_node(ir_node *node, const char *name) { ia32_attr_t *attr = get_ia32_attr(node); - attr->pn_code = code; + attr->orig_node = name; } +#endif /* NDEBUG */ /****************************************************************************************************** * _ _ _ _ __ _ _ @@ -788,123 +956,191 @@ void set_ia32_pncode(ir_node *node, long code) { ******************************************************************************************************/ /** - * Gets the type of an ia32_Const. + * Returns whether or not the node is an AddrModeS node. */ -unsigned get_ia32_Const_type(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); +int is_ia32_AddrModeS(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return (attr->data.tp == ia32_AddrModeS); +} - assert((is_ia32_Const(node) || is_ia32_fConst(node)) && "Need ia32_Const to get type"); +/** + * Returns whether or not the node is an AddrModeD node. + */ +int is_ia32_AddrModeD(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return (attr->data.tp == ia32_AddrModeD); +} - return attr->tp; +/** + * Checks if node is a Load or xLoad/vfLoad. + */ +int is_ia32_Ld(const ir_node *node) { + int op = get_ia32_irn_opcode(node); + return op == iro_ia32_Load || + op == iro_ia32_xLoad || + op == iro_ia32_vfld || + op == iro_ia32_fld; } /** - * Sets the type of an ia32_Const. + * Checks if node is a Store or xStore/vfStore. */ -void set_ia32_Const_type(ir_node *node, int type) { - ia32_attr_t *attr = get_ia32_attr(node); +int is_ia32_St(const ir_node *node) { + int op = get_ia32_irn_opcode(node); + return op == iro_ia32_Store || + op == iro_ia32_Store8Bit || + op == iro_ia32_xStore || + op == iro_ia32_vfst || + op == iro_ia32_fst || + op == iro_ia32_fstp; +} - assert((is_ia32_Const(node) || is_ia32_fConst(node)) && "Need ia32_Const to set type"); - assert((type == ia32_Const || type == ia32_SymConst) && "Unsupported ia32_Const type"); +/** + * Returns the name of the OUT register at position pos. + */ +const char *get_ia32_out_reg_name(const ir_node *node, int pos) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); + assert(attr->slots[pos] && "No register assigned"); - attr->tp = type; + return arch_register_get_name(attr->slots[pos]); } /** - * Copy the attributes from an ia32_Const to an Immop (Add_i, Sub_i, ...) node + * Returns the index of the OUT register at position pos within its register class. */ -void set_ia32_Immop_attr(ir_node *node, ir_node *cnst) { - ia32_attr_t *na = get_ia32_attr(node); - ia32_attr_t *ca = get_ia32_attr(cnst); +int get_ia32_out_regnr(const ir_node *node, int pos) { + const ia32_attr_t *attr = get_ia32_attr_const(node); - assert((is_ia32_Const(cnst) || is_ia32_fConst(cnst)) && "Need ia32_Const to set Immop attr"); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); + assert(attr->slots[pos] && "No register assigned"); - na->tv = ca->tv; + return arch_register_get_index(attr->slots[pos]); +} - if (ca->sc) { - na->sc = copy_str(na->sc, ca->sc); - na->cnst = na->sc; - } - else { - na->cnst = set_cnst_from_tv(na->cnst, na->tv); - na->sc = NULL; - } +void ia32_swap_left_right(ir_node *node) +{ + ia32_attr_t *attr = get_ia32_attr(node); + ir_node *left = get_irn_n(node, n_ia32_binary_left); + ir_node *right = get_irn_n(node, n_ia32_binary_right); + + assert(is_ia32_commutative(node)); + attr->data.ins_permuted = !attr->data.ins_permuted; + set_irn_n(node, n_ia32_binary_left, right); + set_irn_n(node, n_ia32_binary_right, left); } /** - * Copy the attributes from a Const to an ia32_Const + * Returns the OUT register at position pos. */ -void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst) { - ia32_attr_t *attr = get_ia32_attr(ia32_cnst); +const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) { + const ia32_attr_t *attr = get_ia32_attr_const(node); - assert((is_ia32_Const(ia32_cnst) || is_ia32_fConst(ia32_cnst)) && "Need ia32_Const to set Const attr"); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); + assert(attr->slots[pos] && "No register assigned"); - switch (get_irn_opcode(cnst)) { - case iro_Const: - attr->tp = ia32_Const; - attr->tv = get_Const_tarval(cnst); - attr->cnst = set_cnst_from_tv(attr->cnst, attr->tv); - break; - case iro_SymConst: - attr->tp = ia32_SymConst; - attr->tv = NULL; - attr->sc = copy_str(attr->sc, get_sc_name(cnst)); - attr->cnst = attr->sc; - break; - case iro_Unknown: - assert(0 && "Unknown Const NYI"); - break; - default: - assert(0 && "Cannot create ia32_Const for this opcode"); - } + return attr->slots[pos]; } /** - * Sets the AddrMode(S|D) attribute + * Initializes the nodes attributes. */ -void set_ia32_AddrMode(ir_node *node, char direction) { - ia32_attr_t *attr = get_ia32_attr(node); +void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags, + const arch_register_req_t **in_reqs, + const arch_register_req_t **out_reqs, + const be_execution_unit_t ***execution_units, + int n_res) +{ + ir_graph *irg = get_irn_irg(node); + struct obstack *obst = get_irg_obstack(irg); + ia32_attr_t *attr = get_ia32_attr(node); + + set_ia32_flags(node, flags); + set_ia32_in_req_all(node, in_reqs); + set_ia32_out_req_all(node, out_reqs); + + attr->exec_units = execution_units; +#ifndef NDEBUG + attr->attr_type |= IA32_ATTR_ia32_attr_t; +#endif - switch (direction) { - case 'D': - attr->tp = ia32_AddrModeD; - break; - case 'S': - attr->tp = ia32_AddrModeS; - break; - default: - assert(0 && "wrong AM type"); - } + attr->out_flags = NEW_ARR_D(int, obst, n_res); + memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0])); + + attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res); + /* void* cast to suppress an incorrect warning on MSVC */ + memset((void*)attr->slots, 0, n_res * sizeof(attr->slots[0])); } -/** - * Returns whether or not the node is an AddrModeS node. - */ -int is_ia32_AddrModeS(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - return (attr->tp == ia32_AddrModeS); +void +init_ia32_x87_attributes(ir_node *res) +{ +#ifndef NDEBUG + ia32_attr_t *attr = get_ia32_attr(res); + attr->attr_type |= IA32_ATTR_ia32_x87_attr_t; +#else + (void) res; +#endif + ia32_current_cg->do_x87_sim = 1; } -/** - * Returns whether or not the node is an AddrModeD node. - */ -int is_ia32_AddrModeD(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - return (attr->tp == ia32_AddrModeD); +void +init_ia32_asm_attributes(ir_node *res) +{ +#ifndef NDEBUG + ia32_attr_t *attr = get_ia32_attr(res); + attr->attr_type |= IA32_ATTR_ia32_asm_attr_t; +#else + (void) res; +#endif } -/** - * Checks if node is a Load or fLoad. - */ -int is_ia32_Ld(const ir_node *node) { - return is_ia32_Load(node) || is_ia32_fLoad(node); +void +init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst, + int symconst_sign, long offset) +{ + ia32_immediate_attr_t *attr = get_irn_generic_attr(res); + +#ifndef NDEBUG + attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t; +#endif + attr->symconst = symconst; + attr->sc_sign = symconst_sign; + attr->offset = offset; } -/** - * Checks if node is a Store or fStore. - */ -int is_ia32_St(const ir_node *node) { - return is_ia32_Store(node) || is_ia32_fStore(node); +void +init_ia32_copyb_attributes(ir_node *res, unsigned size) { + ia32_copyb_attr_t *attr = get_irn_generic_attr(res); + +#ifndef NDEBUG + attr->attr.attr_type |= IA32_ATTR_ia32_copyb_attr_t; +#endif + attr->size = size; +} + +void +init_ia32_condcode_attributes(ir_node *res, long pnc) { + ia32_condcode_attr_t *attr = get_irn_generic_attr(res); + +#ifndef NDEBUG + attr->attr.attr_type |= IA32_ATTR_ia32_condcode_attr_t; +#endif + attr->pn_code = pnc; +} + +ir_node *get_ia32_result_proj(const ir_node *node) +{ + const ir_edge_t *edge; + + foreach_out_edge(node, edge) { + ir_node *proj = get_edge_src_irn(edge); + if(get_Proj_proj(proj) == 0) { + return proj; + } + } + return NULL; } /*************************************************************************************** @@ -917,5 +1153,160 @@ int is_ia32_St(const ir_node *node) { * ***************************************************************************************/ +/* default compare operation to compare attributes */ +int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) { + if (a->data.tp != b->data.tp) + return 1; + + if (a->data.am_scale != b->data.am_scale + || a->data.am_sc_sign != b->data.am_sc_sign + || a->am_offs != b->am_offs + || a->am_sc != b->am_sc + || a->ls_mode != b->ls_mode) + return 1; + + /* nodes with not yet assigned entities shouldn't be CSEd (important for + * unsigned int -> double conversions */ + if(a->data.use_frame && a->frame_ent == NULL) + return 1; + if(b->data.use_frame && b->frame_ent == NULL) + return 1; + + if (a->data.use_frame != b->data.use_frame + || a->frame_ent != b->frame_ent) + return 1; + + if (a->data.tp != b->data.tp) + return 1; + + if (a->data.has_except_label != b->data.has_except_label) + return 1; + + if (a->data.ins_permuted != b->data.ins_permuted + || a->data.cmp_unsigned != b->data.cmp_unsigned) + return 1; + + return 0; +} + +/** Compare nodes attributes for all "normal" nodes. */ +static +int ia32_compare_nodes_attr(ir_node *a, ir_node *b) +{ + const ia32_attr_t* attr_a = get_ia32_attr_const(a); + const ia32_attr_t* attr_b = get_ia32_attr_const(b); + + return ia32_compare_attr(attr_a, attr_b); +} + +/** Compare node attributes for nodes with condition code. */ +static +int ia32_compare_condcode_attr(ir_node *a, ir_node *b) +{ + const ia32_condcode_attr_t *attr_a; + const ia32_condcode_attr_t *attr_b; + + if (ia32_compare_nodes_attr(a, b)) + return 1; + + attr_a = get_ia32_condcode_attr_const(a); + attr_b = get_ia32_condcode_attr_const(b); + + if(attr_a->pn_code != attr_b->pn_code) + return 1; + + return 0; +} + +/** Compare node attributes for CopyB nodes. */ +static +int ia32_compare_copyb_attr(ir_node *a, ir_node *b) +{ + const ia32_copyb_attr_t *attr_a; + const ia32_copyb_attr_t *attr_b; + + if (ia32_compare_nodes_attr(a, b)) + return 1; + + attr_a = get_ia32_copyb_attr_const(a); + attr_b = get_ia32_copyb_attr_const(b); + + if(attr_a->size != attr_b->size) + return 1; + + return 0; +} + + +/** Compare ASM node attributes. */ +static +int ia32_compare_asm_attr(ir_node *a, ir_node *b) +{ + const ia32_asm_attr_t *attr_a; + const ia32_asm_attr_t *attr_b; + + if(ia32_compare_nodes_attr(a, b)) + return 1; + + attr_a = get_ia32_asm_attr_const(a); + attr_b = get_ia32_asm_attr_const(b); + + if(attr_a->asm_text != attr_b->asm_text) + return 1; + + return 0; +} + +/** + * Hash function for Immediates + */ +static unsigned ia32_hash_Immediate(const ir_node *irn) { + const ia32_immediate_attr_t *a = get_ia32_immediate_attr_const(irn); + + return HASH_PTR(a->symconst) + (a->sc_sign << 16) + a->offset; +} + +/** Compare node attributes for Immediates. */ +static +int ia32_compare_immediate_attr(ir_node *a, ir_node *b) +{ + const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a); + const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b); + + if(attr_a->symconst != attr_b->symconst || + attr_a->sc_sign != attr_b->sc_sign || + attr_a->offset != attr_b->offset) + return 1; + + return 0; +} + +/** Compare node attributes for x87 nodes. */ +static +int ia32_compare_x87_attr(ir_node *a, ir_node *b) +{ + return ia32_compare_nodes_attr(a, b); +} + + +/* copies the ia32 attributes */ +static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) +{ + ir_graph *irg = get_irn_irg(new_node); + struct obstack *obst = get_irg_obstack(irg); + const ia32_attr_t *attr_old = get_ia32_attr_const(old_node); + ia32_attr_t *attr_new = get_ia32_attr(new_node); + + /* copy the attributes */ + memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node))); + + /* copy out flags */ + attr_new->out_flags = + DUP_ARR_D(int, obst, attr_old->out_flags); + /* copy register assignments */ + attr_new->slots = + DUP_ARR_D(arch_register_t*, obst, attr_old->slots); +} + /* Include the generated constructor functions */ #include "gen_ia32_new_nodes.c.inl"