X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_new_nodes.c;h=a6d4add6b37d64c2074c357b00c22031e5286853;hb=50a258333a0adabe3a1be5072e49b9efa1aeeed9;hp=f5b5627125e4dded834ac85fe9daaf543cf15780;hpb=41c1e5961f419bbb5e58ce87195c80817efa932b;p=libfirm diff --git a/ir/be/ia32/ia32_new_nodes.c b/ir/be/ia32/ia32_new_nodes.c index f5b562712..a6d4add6b 100644 --- a/ir/be/ia32/ia32_new_nodes.c +++ b/ir/be/ia32/ia32_new_nodes.c @@ -1,20 +1,13 @@ /** * This file implements the creation of the achitecture specific firm opcodes - * and the coresponding node constructors for the $arch assembler irg. + * and the coresponding node constructors for the ia32 assembler irg. * @author Christian Wuerdig * $Id$ */ - #ifdef HAVE_CONFIG_H #include "config.h" #endif -#ifdef _WIN32 -#include -#else -#include -#endif - #include #include "irprog_t.h" @@ -27,22 +20,26 @@ #include "firm_common_t.h" #include "irvrfy_t.h" #include "irprintf.h" +#include "iredges.h" +#include "error.h" +#include "raw_bitset.h" +#include "xmalloc.h" -#include "../bearch.h" +#include "../bearch_t.h" +#include "bearch_ia32_t.h" #include "ia32_nodes_attr.h" #include "ia32_new_nodes.h" #include "gen_ia32_regalloc_if.h" +#include "gen_ia32_machine.h" -#ifdef obstack_chunk_alloc -# undef obstack_chunk_alloc -# define obstack_chunk_alloc xmalloc -#else -# define obstack_chunk_alloc xmalloc -# define obstack_chunk_free free -#endif - -extern int obstack_printf(struct obstack *obst, char *fmt, ...); +/** + * returns true if a node has x87 registers + */ +int ia32_has_x87_register(const ir_node *n) { + assert(is_ia32_irn(n) && "Need ia32 node."); + return is_irn_machine_user(n, 0); +} /*********************************************************************************** * _ _ _ __ @@ -55,108 +52,41 @@ extern int obstack_printf(struct obstack *obst, char *fmt, ...); * |_| ***********************************************************************************/ -/** - * Prints a tarval to file F. - * @param F output file - * @param tv tarval - * @param brackets 1 == print square brackets around tarval - */ -static void fprintf_tv(FILE *F, tarval *tv, int brackets) { - char buf[1024]; - tarval_snprintf(buf, sizeof(buf), tv); - - if (brackets) - fprintf(F, "[%s]", buf); - else - fprintf(F, "%s", buf); -} - -/** - * Returns the name of a SymConst. - * @param symc the SymConst - * @return name of the SymConst - */ -const char *get_sc_name(ir_node *symc) { - if (get_irn_opcode(symc) != iro_SymConst) - return "NONE"; - - switch (get_SymConst_kind(symc)) { - case symconst_addr_name: - return get_id_str(get_SymConst_name(symc)); - - case symconst_addr_ent: - return get_entity_ld_name(get_SymConst_entity(symc)); - - default: - assert(0 && "Unsupported SymConst"); - } - - return NULL; -} - -/** - * Returns a string containing the names of all registers within the limited bitset - */ -static char *get_limited_regs(const arch_register_req_t *req, char *buf, int max) { - bitset_t *bs = bitset_alloca(req->cls->n_regs); - char *p = buf; - int size = 0; - int i, cnt; - - req->limited(NULL, bs); - - for (i = 0; i < req->cls->n_regs; i++) { - if (bitset_is_set(bs, i)) { - cnt = snprintf(p, max - size, " %s", req->cls->regs[i].name); - if (cnt < 0) { - fprintf(stderr, "dumper problem, exiting\n"); - exit(1); - } - - p += cnt; - size += cnt; - - if (size >= max) - break; - } - } - - return buf; -} - /** * Dumps the register requirements for either in or out. */ -static void dump_reg_req(FILE *F, ir_node *n, const ia32_register_req_t **reqs, int inout) { +static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs, + int inout) { char *dir = inout ? "out" : "in"; int max = inout ? get_ia32_n_res(n) : get_irn_arity(n); - char *buf = alloca(1024); + char buf[1024]; int i; - memset(buf, 0, 1024); + memset(buf, 0, sizeof(buf)); if (reqs) { for (i = 0; i < max; i++) { fprintf(F, "%sreq #%d =", dir, i); - if (reqs[i]->req.type == arch_register_req_type_none) { + if (reqs[i]->type == arch_register_req_type_none) { fprintf(F, " n/a"); } - if (reqs[i]->req.type & arch_register_req_type_normal) { - fprintf(F, " %s", reqs[i]->req.cls->name); + if (reqs[i]->type & arch_register_req_type_normal) { + fprintf(F, " %s", reqs[i]->cls->name); } - if (reqs[i]->req.type & arch_register_req_type_limited) { - fprintf(F, " %s", get_limited_regs(&reqs[i]->req, buf, 1024)); + if (reqs[i]->type & arch_register_req_type_limited) { + fprintf(F, " %s", + arch_register_req_format(buf, sizeof(buf), reqs[i], n)); } - if (reqs[i]->req.type & arch_register_req_type_should_be_same) { - ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->same_pos)); + if (reqs[i]->type & arch_register_req_type_should_be_same) { + ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same)); } - if (reqs[i]->req.type & arch_register_req_type_should_be_different) { - ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->different_pos)); + if (reqs[i]->type & arch_register_req_type_should_be_different) { + ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different)); } fprintf(F, "\n"); @@ -176,11 +106,11 @@ static void dump_reg_req(FILE *F, ir_node *n, const ia32_register_req_t **reqs, * @param reason indicates which kind of information should be dumped * @return 0 on success or != 0 on failure */ -static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) { +static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { ir_mode *mode = NULL; int bad = 0; int i, n_res, am_flav, flags; - const ia32_register_req_t **reqs; + const arch_register_req_t **reqs; const arch_register_t **slots; switch (reason) { @@ -199,14 +129,18 @@ static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) { break; case dump_node_nodeattr_txt: - if (get_ia32_cnst(n)) { - char *pref = ""; - - if (get_ia32_sc(n)) { - pref = "SymC "; + if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) { + if(is_ia32_ImmSymConst(n)) { + ir_entity *ent = get_ia32_Immop_symconst(n); + ident *id = get_entity_ld_ident(ent); + fprintf(F, "[SymC %s]", get_id_str(id)); + } else { + char buf[128]; + tarval *tv = get_ia32_Immop_tarval(n); + + tarval_snprintf(buf, sizeof(buf), tv); + fprintf(F, "[%s]", buf); } - - fprintf(F, "[%s%s]", pref, get_ia32_cnst(n)); } if (! is_ia32_Lea(n)) { @@ -240,7 +174,15 @@ static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) { slots = get_ia32_slots(n); if (slots && n_res > 0) { for (i = 0; i < n_res; i++) { - fprintf(F, "reg #%d = %s\n", i, slots[i] ? slots[i]->name : "n/a"); + const arch_register_t *reg; + + /* retrieve "real" x87 register */ + if (ia32_has_x87_register(n)) + reg = get_ia32_attr(n)->x87[i + 2]; + else + reg = slots[i]; + + fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a"); } fprintf(F, "\n"); } @@ -251,12 +193,6 @@ static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) { case ia32_Normal: fprintf(F, "Normal"); break; - case ia32_Const: - fprintf(F, "Const"); - break; - case ia32_SymConst: - fprintf(F, "SymConst"); - break; case ia32_AddrModeD: fprintf(F, "AM Dest (Load+Store)"); break; @@ -269,6 +205,23 @@ static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) { } fprintf(F, "\n"); + /* dump immop type */ + fprintf(F, "immediate = "); + switch (get_ia32_immop_type(n)) { + case ia32_ImmNone: + fprintf(F, "None"); + break; + case ia32_ImmConst: + fprintf(F, "Const"); + break; + case ia32_ImmSymConst: + fprintf(F, "SymConst"); + break; + default: + fprintf(F, "unknown (%d)", get_ia32_immop_type(n)); + break; + } + fprintf(F, "\n"); /* dump supported am */ fprintf(F, "AM support = "); @@ -314,20 +267,28 @@ static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) { fprintf(F, " (%d)\n", am_flav); /* dump AM offset */ - fprintf(F, "AM offset = "); - if (get_ia32_am_offs(n)) { - fprintf(F, "%s", get_ia32_am_offs(n)); + if(get_ia32_am_offs_int(n) != 0) { + fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n)); } - else { - fprintf(F, "n/a"); + + /* dump AM symconst */ + if(get_ia32_am_sc(n) != NULL) { + ir_entity *ent = get_ia32_am_sc(n); + ident *id = get_entity_ld_ident(ent); + fprintf(F, "AM symconst = %s\n", get_id_str(id)); } - fprintf(F, "\n"); /* dump AM scale */ fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n)); /* dump pn code */ - fprintf(F, "pn_code = %d\n", get_ia32_pncode(n)); + if(get_ia32_pncode(n) & ia32_pn_Cmp_Unsigned) { + fprintf(F, "pn_code = %d (%s, unsigned)\n", get_ia32_pncode(n), + get_pnc_string(get_ia32_pncode(n) & ~ia32_pn_Cmp_Unsigned)); + } else { + fprintf(F, "pn_code = %d (%s)\n", get_ia32_pncode(n), + get_pnc_string(get_ia32_pncode(n))); + } /* dump n_res */ fprintf(F, "n_res = %d\n", get_ia32_n_res(n)); @@ -338,6 +299,18 @@ static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) { /* commutative */ fprintf(F, "commutative = %d\n", is_ia32_commutative(n)); + /* emit cl */ + fprintf(F, "emit cl instead of ecx = %d\n", is_ia32_emit_cl(n)); + + /* got lea */ + fprintf(F, "got loea = %d\n", is_ia32_got_lea(n)); + + /* need stackent */ + fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n)); + + /* dump latency */ + fprintf(F, "latency = %d\n", get_ia32_latency(n)); + /* dump flags */ fprintf(F, "flags ="); flags = get_ia32_flags(n); @@ -354,6 +327,9 @@ static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) { if (flags & arch_irn_flags_ignore) { fprintf(F, " ignore"); } + if (flags & arch_irn_flags_modify_sp) { + fprintf(F, " modify_sp"); + } } fprintf(F, " (%d)\n", flags); @@ -367,6 +343,28 @@ static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) { } fprintf(F, "\n"); + /* dump modes */ + fprintf(F, "ls_mode = "); + if (get_ia32_ls_mode(n)) { + ir_fprintf(F, "%+F", get_ia32_ls_mode(n)); + } + else { + fprintf(F, "n/a"); + } + fprintf(F, "\n"); + +#ifndef NDEBUG + /* dump original ir node name */ + fprintf(F, "orig node = "); + if (get_ia32_orig_node(n)) { + fprintf(F, "%s", get_ia32_orig_node(n)); + } + else { + fprintf(F, "n/a"); + } + fprintf(F, "\n"); +#endif /* NDEBUG */ + fprintf(F, "=== IA32 attr end ===\n"); /* end of: case dump_node_info_txt */ break; @@ -388,22 +386,6 @@ static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) { * |___/ ***************************************************************************************************/ - static char *copy_str(char *dst, const char *src) { - dst = xcalloc(1, strlen(src) + 1); - strncpy(dst, src, strlen(src) + 1); - return dst; - } - - static char *set_cnst_from_tv(char *cnst, tarval *tv) { - if (cnst) { - free(cnst); - } - - cnst = xcalloc(1, 64); - assert(tarval_snprintf(cnst, 63, tv)); - return cnst; - } - /** * Wraps get_irn_generic_attr() as it takes no const ir_node, so we need to do a cast. * Firm was made by people hating const :-( @@ -429,6 +411,14 @@ void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) { attr->data.tp = tp; } +/** + * Gets the immediate op type of an ia32 node. + */ +ia32_immop_type_t get_ia32_immop_type(const ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + return attr->data.imm_tp; +} + /** * Gets the supported addrmode of an ia32 node */ @@ -441,8 +431,8 @@ ia32_am_type_t get_ia32_am_support(const ir_node *node) { * Sets the supported addrmode of an ia32 node */ void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp) { - ia32_attr_t *attr = get_ia32_attr(node); - attr->data.am_support = am_tp; + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.am_support = am_tp; } /** @@ -457,80 +447,69 @@ ia32_am_flavour_t get_ia32_am_flavour(const ir_node *node) { * Sets the addrmode flavour of an ia32 node */ void set_ia32_am_flavour(ir_node *node, ia32_am_flavour_t am_flavour) { - ia32_attr_t *attr = get_ia32_attr(node); - attr->data.am_flavour = am_flavour; + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.am_flavour = am_flavour; } /** - * Joins all offsets to one string with adds. + * Gets the addressmode offset as int. */ -char *get_ia32_am_offs(const ir_node *node) { +int get_ia32_am_offs_int(const ir_node *node) { ia32_attr_t *attr = get_ia32_attr(node); - char *res = NULL; - int size; - - if (! attr->am_offs) { - return NULL; - } - - size = obstack_object_size(attr->am_offs); - if (size > 0) { - res = xcalloc(1, size + 2); - res[0] = attr->data.offs_sign ? '-' : '+'; - memcpy(&res[1], obstack_base(attr->am_offs), size); - } - - res[size + 1] = '\0'; - return res; + return attr->am_offs; } /** - * Add an offset for addrmode. + * Sets the addressmode offset from an int. */ -static void extend_ia32_am_offs(ir_node *node, char *offset, char op) { +void set_ia32_am_offs_int(ir_node *node, int offset) { ia32_attr_t *attr = get_ia32_attr(node); + attr->am_offs = offset; +} - if (! offset) - return; - - /* offset could already have an explicit sign */ - /* -> supersede op if necessary */ - if (offset[0] == '-' || offset[0] == '+') { - if (offset[0] == '-') { - op = (op == '-') ? '+' : '-'; - } - - /* skip explicit sign */ - offset++; - } +void add_ia32_am_offs_int(ir_node *node, int offset) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->am_offs += offset; +} - if (! attr->am_offs) { - /* obstack is not initialized */ - attr->am_offs = xcalloc(1, sizeof(*(attr->am_offs))); - obstack_init(attr->am_offs); +/** + * Returns the symconst entity associated to addrmode. + */ +ir_entity *get_ia32_am_sc(const ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + return attr->am_sc; +} - attr->data.offs_sign = (op == '-') ? 1 : 0; - } - else { - /* If obstack is initialized, connect the new offset with op */ - obstack_printf(attr->am_offs, "%c", op); - } +/** + * Sets the symconst entity associated to addrmode. + */ +void set_ia32_am_sc(ir_node *node, ir_entity *entity) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->am_sc = entity; +} - obstack_printf(attr->am_offs, "%s", offset); +/** + * Sets the sign bit for address mode symconst. + */ +void set_ia32_am_sc_sign(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.am_sc_sign = 1; } /** - * Add an offset for addrmode. + * Clears the sign bit for address mode symconst. */ -void add_ia32_am_offs(ir_node *node, char *offset) { - extend_ia32_am_offs(node, offset, '+'); +void clear_ia32_am_sc_sign(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.am_sc_sign = 0; } /** - * Sub an offset for addrmode. + * Returns the sign bit for address mode symconst. */ -void sub_ia32_am_offs(ir_node *node, char *offset) { - extend_ia32_am_offs(node, offset, '-'); +int is_ia32_am_sc_sign(const ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + return attr->data.am_sc_sign; } /** @@ -554,7 +533,8 @@ void set_ia32_am_scale(ir_node *node, int scale) { */ tarval *get_ia32_Immop_tarval(const ir_node *node) { ia32_attr_t *attr = get_ia32_attr(node); - return attr->tv; + assert(attr->data.imm_tp == ia32_ImmConst); + return attr->cnst_val.tv; } /** @@ -562,37 +542,20 @@ tarval *get_ia32_Immop_tarval(const ir_node *node) { */ void set_ia32_Immop_tarval(ir_node *node, tarval *tv) { ia32_attr_t *attr = get_ia32_attr(node); - attr->tv = tv; - attr->cnst = set_cnst_from_tv(attr->cnst, attr->tv); + attr->data.imm_tp = ia32_ImmConst; + attr->cnst_val.tv = tv; } -/** - * Return the sc attribute. - */ -char *get_ia32_sc(const ir_node *node) { +void set_ia32_Immop_symconst(ir_node *node, ir_entity *entity) { ia32_attr_t *attr = get_ia32_attr(node); - return attr->sc; + attr->data.imm_tp = ia32_ImmSymConst; + attr->cnst_val.sc = entity; } -/** - * Sets the sc attribute. - */ -void set_ia32_sc(ir_node *node, char *sc) { +ir_entity *get_ia32_Immop_symconst(const ir_node *node) { ia32_attr_t *attr = get_ia32_attr(node); - attr->sc = copy_str(attr->sc, sc); - - if (attr->cnst) { - free(attr->cnst); - } - attr->cnst = attr->sc; -} - -/** - * Gets the string representation of the internal const (tv or symconst) - */ -char *get_ia32_cnst(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - return attr->cnst; + assert(attr->data.imm_tp == ia32_ImmSymConst); + return attr->cnst_val.sc; } /** @@ -643,6 +606,69 @@ int is_ia32_commutative(const ir_node *node) { return attr->data.is_commutative; } +/** + * Sets node emit_cl. + */ +void set_ia32_emit_cl(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.emit_cl = 1; +} + +/** + * Clears node emit_cl. + */ +void clear_ia32_emit_cl(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.emit_cl = 0; +} + +/** + * Checks if node needs %cl. + */ +int is_ia32_emit_cl(const ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + return attr->data.emit_cl; +} + +/** + * Sets node got_lea. + */ +void set_ia32_got_lea(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.got_lea = 1; +} + +/** + * Clears node got_lea. + */ +void clear_ia32_got_lea(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.got_lea = 0; +} + +/** + * Checks if node got lea. + */ +int is_ia32_got_lea(const ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + return attr->data.got_lea; +} + +void set_ia32_need_stackent(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.need_stackent = 1; +} + +void clear_ia32_need_stackent(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.need_stackent = 0; +} + +int is_ia32_need_stackent(const ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + return attr->data.need_stackent; +} + /** * Gets the mode of the stored/loaded value (only set for Store/Load) */ @@ -660,25 +686,46 @@ void set_ia32_ls_mode(ir_node *node, ir_mode *mode) { } /** - * Gets the frame entity assigned to this node; + * Gets the frame entity assigned to this node. */ -entity *get_ia32_frame_ent(const ir_node *node) { +ir_entity *get_ia32_frame_ent(const ir_node *node) { ia32_attr_t *attr = get_ia32_attr(node); return attr->frame_ent; } /** - * Sets the frame entity for this node; + * Sets the frame entity for this node. */ -void set_ia32_frame_ent(ir_node *node, entity *ent) { +void set_ia32_frame_ent(ir_node *node, ir_entity *ent) { ia32_attr_t *attr = get_ia32_attr(node); attr->frame_ent = ent; + if(ent != NULL) + set_ia32_use_frame(node); + else + clear_ia32_use_frame(node); +} + + +/** + * Gets the instruction latency. + */ +unsigned get_ia32_latency(const ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + return attr->latency; +} + +/** +* Sets the instruction latency. +*/ +void set_ia32_latency(ir_node *node, unsigned latency) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->latency = latency; } /** * Returns the argument register requirements of an ia32 node. */ -const ia32_register_req_t **get_ia32_in_req_all(const ir_node *node) { +const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) { ia32_attr_t *attr = get_ia32_attr(node); return attr->in_req; } @@ -686,7 +733,7 @@ const ia32_register_req_t **get_ia32_in_req_all(const ir_node *node) { /** * Sets the argument register requirements of an ia32 node. */ -void set_ia32_in_req_all(ir_node *node, const ia32_register_req_t **reqs) { +void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) { ia32_attr_t *attr = get_ia32_attr(node); attr->in_req = reqs; } @@ -694,7 +741,7 @@ void set_ia32_in_req_all(ir_node *node, const ia32_register_req_t **reqs) { /** * Returns the result register requirements of an ia32 node. */ -const ia32_register_req_t **get_ia32_out_req_all(const ir_node *node) { +const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) { ia32_attr_t *attr = get_ia32_attr(node); return attr->out_req; } @@ -702,7 +749,7 @@ const ia32_register_req_t **get_ia32_out_req_all(const ir_node *node) { /** * Sets the result register requirements of an ia32 node. */ -void set_ia32_out_req_all(ir_node *node, const ia32_register_req_t **reqs) { +void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) { ia32_attr_t *attr = get_ia32_attr(node); attr->out_req = reqs; } @@ -710,23 +757,29 @@ void set_ia32_out_req_all(ir_node *node, const ia32_register_req_t **reqs) { /** * Returns the argument register requirement at position pos of an ia32 node. */ -const ia32_register_req_t *get_ia32_in_req(const ir_node *node, int pos) { +const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) { ia32_attr_t *attr = get_ia32_attr(node); + if(attr->in_req == NULL) + return arch_no_register_req; + return attr->in_req[pos]; } /** * Returns the result register requirement at position pos of an ia32 node. */ -const ia32_register_req_t *get_ia32_out_req(const ir_node *node, int pos) { +const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) { ia32_attr_t *attr = get_ia32_attr(node); + if(attr->out_req == NULL) + return arch_no_register_req; + return attr->out_req[pos]; } /** * Sets the OUT register requirements at position pos. */ -void set_ia32_req_out(ir_node *node, const ia32_register_req_t *req, int pos) { +void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) { ia32_attr_t *attr = get_ia32_attr(node); attr->out_req[pos] = req; } @@ -734,7 +787,7 @@ void set_ia32_req_out(ir_node *node, const ia32_register_req_t *req, int pos) { /** * Sets the IN register requirements at position pos. */ -void set_ia32_req_in(ir_node *node, const ia32_register_req_t *req, int pos) { +void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) { ia32_attr_t *attr = get_ia32_attr(node); attr->in_req[pos] = req; } @@ -798,7 +851,7 @@ void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) { /** * Returns the projnum code. */ -long get_ia32_pncode(const ir_node *node) { +pn_Cmp get_ia32_pncode(const ir_node *node) { ia32_attr_t *attr = get_ia32_attr(node); return attr->pn_code; } @@ -806,86 +859,97 @@ long get_ia32_pncode(const ir_node *node) { /** * Sets the projnum code */ -void set_ia32_pncode(ir_node *node, long code) { +void set_ia32_pncode(ir_node *node, pn_Cmp code) { ia32_attr_t *attr = get_ia32_attr(node); attr->pn_code = code; } - -/****************************************************************************************************** - * _ _ _ _ __ _ _ - * (_) | | | | | | / _| | | (_) - * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___ - * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __| - * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \ - * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/ - * | | - * |_| - ******************************************************************************************************/ - /** - * Gets the type of an ia32_Const. + * Sets the flags for the n'th out. */ -unsigned get_ia32_Const_type(const ir_node *node) { +void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) { ia32_attr_t *attr = get_ia32_attr(node); + assert(pos < (int) attr->data.n_res && "Invalid OUT position."); + attr->out_flags[pos] = flags; +} - assert(is_ia32_Cnst(node) && "Need ia32_Const to get type"); - - return attr->data.tp; +/** + * Gets the flags for the n'th out. + */ +arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) { + ia32_attr_t *attr = get_ia32_attr(node); + return pos < (int)attr->data.n_res ? attr->out_flags[pos] : arch_irn_flags_none; } /** - * Sets the type of an ia32_Const. + * Get the list of available execution units. */ -void set_ia32_Const_type(ir_node *node, int type) { +const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) { ia32_attr_t *attr = get_ia32_attr(node); + return attr->exec_units; +} - assert(is_ia32_Cnst(node) && "Need ia32_Const to set type"); - assert((type == ia32_Const || type == ia32_SymConst) && "Unsupported ia32_Const type"); +#ifndef NDEBUG - attr->data.tp = type; +/** + * Returns the name of the original ir node. + */ +const char *get_ia32_orig_node(const ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + return attr->orig_node; } /** - * Copy the attributes from an ia32_Const to an Immop (Add_i, Sub_i, ...) node + * Sets the name of the original ir node. */ -void set_ia32_Immop_attr(ir_node *node, ir_node *cnst) { - ia32_attr_t *na = get_ia32_attr(node); - ia32_attr_t *ca = get_ia32_attr(cnst); +void set_ia32_orig_node(ir_node *node, const char *name) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->orig_node = name; +} - assert(is_ia32_Cnst(cnst) && "Need ia32_Const to set Immop attr"); +#endif /* NDEBUG */ - na->tv = ca->tv; +/****************************************************************************************************** + * _ _ _ _ __ _ _ + * (_) | | | | | | / _| | | (_) + * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___ + * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __| + * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \ + * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/ + * | | + * |_| + ******************************************************************************************************/ - if (ca->sc) { - na->sc = copy_str(na->sc, ca->sc); - na->cnst = na->sc; - } - else { - na->cnst = set_cnst_from_tv(na->cnst, na->tv); - na->sc = NULL; +/** + * Copy the attributes from an ia32_Const to an Immop (Add_i, Sub_i, ...) node + */ +void copy_ia32_Immop_attr(ir_node *node, ir_node *from) { + ia32_immop_type_t immop_type = get_ia32_immop_type(from); + + if(immop_type == ia32_ImmConst) { + set_ia32_Immop_tarval(node, get_ia32_Immop_tarval(from)); + } else if(immop_type == ia32_ImmSymConst) { + set_ia32_Immop_symconst(node, get_ia32_Immop_symconst(from)); + } else { + ia32_attr_t *attr = get_ia32_attr(node); + assert(immop_type == ia32_ImmNone); + attr->data.imm_tp = ia32_ImmNone; } } /** - * Copy the attributes from a Const to an ia32_Const + * Copy the attributes from a Firm Const/SymConst to an ia32_Const */ void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst) { - ia32_attr_t *attr = get_ia32_attr(ia32_cnst); - assert(is_ia32_Cnst(ia32_cnst) && "Need ia32_Const to set Const attr"); switch (get_irn_opcode(cnst)) { case iro_Const: - attr->data.tp = ia32_Const; - attr->tv = get_Const_tarval(cnst); - attr->cnst = set_cnst_from_tv(attr->cnst, attr->tv); + set_ia32_Const_tarval(ia32_cnst, get_Const_tarval(cnst)); break; case iro_SymConst: - attr->data.tp = ia32_SymConst; - attr->tv = NULL; - attr->sc = copy_str(attr->sc, get_sc_name(cnst)); - attr->cnst = attr->sc; + assert(get_SymConst_kind(cnst) == symconst_addr_ent); + set_ia32_Immop_symconst(ia32_cnst, get_SymConst_entity(cnst)); break; case iro_Unknown: assert(0 && "Unknown Const NYI"); @@ -895,6 +959,23 @@ void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst) { } } +void set_ia32_Const_tarval(ir_node *ia32_cnst, tarval *tv) { + if(mode_is_reference(get_tarval_mode(tv))) { + if(tarval_is_null(tv)) { + tv = get_tarval_null(mode_Iu); + } else { + panic("Can't convert reference tarval to mode_Iu at %+F", ia32_cnst); + } + } else { + tv = tarval_convert_to(tv, mode_Iu); + } + + assert(tv != get_tarval_bad() && tv != get_tarval_undefined() + && tv != NULL); + set_ia32_Immop_tarval(ia32_cnst, tv); +} + + /** * Sets the AddrMode(S|D) attribute */ @@ -913,6 +994,22 @@ void set_ia32_AddrMode(ir_node *node, char direction) { } } +/** + * Returns whether or not the node is an immediate operation with Const. + */ +int is_ia32_ImmConst(const ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + return (attr->data.imm_tp == ia32_ImmConst); +} + +/** + * Returns whether or not the node is an immediate operation with SymConst. + */ +int is_ia32_ImmSymConst(const ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + return (attr->data.imm_tp == ia32_ImmSymConst); +} + /** * Returns whether or not the node is an AddrModeS node. */ @@ -930,24 +1027,27 @@ int is_ia32_AddrModeD(const ir_node *node) { } /** - * Checks if node is a Load or fLoad. + * Checks if node is a Load or xLoad/vfLoad. */ int is_ia32_Ld(const ir_node *node) { - return is_ia32_Load(node) || is_ia32_fLoad(node); + int op = get_ia32_irn_opcode(node); + return op == iro_ia32_Load || op == iro_ia32_xLoad || op == iro_ia32_vfld || op == iro_ia32_fld; } /** - * Checks if node is a Store or fStore. + * Checks if node is a Store or xStore/vfStore. */ int is_ia32_St(const ir_node *node) { - return is_ia32_Store(node) || is_ia32_fStore(node); + int op = get_ia32_irn_opcode(node); + return op == iro_ia32_Store || op == iro_ia32_xStore || op == iro_ia32_vfst || op == iro_ia32_fst || op == iro_ia32_fstp; } /** - * Checks if node is a Const or fConst. + * Checks if node is a Const or xConst/vfConst. */ int is_ia32_Cnst(const ir_node *node) { - return is_ia32_Const(node) || is_ia32_fConst(node); + int op = get_ia32_irn_opcode(node); + return op == iro_ia32_Const || op == iro_ia32_xConst || op == iro_ia32_vfConst; } /** @@ -956,8 +1056,7 @@ int is_ia32_Cnst(const ir_node *node) { const char *get_ia32_out_reg_name(const ir_node *node, int pos) { ia32_attr_t *attr = get_ia32_attr(node); - assert(is_ia32_irn(node) && "Not an ia32 node."); - assert(pos < attr->data.n_res && "Invalid OUT position."); + assert(pos < (int) attr->data.n_res && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return arch_register_get_name(attr->slots[pos]); @@ -969,8 +1068,7 @@ const char *get_ia32_out_reg_name(const ir_node *node, int pos) { int get_ia32_out_regnr(const ir_node *node, int pos) { ia32_attr_t *attr = get_ia32_attr(node); - assert(is_ia32_irn(node) && "Not an ia32 node."); - assert(pos < attr->data.n_res && "Invalid OUT position."); + assert(pos < (int) attr->data.n_res && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return arch_register_get_index(attr->slots[pos]); @@ -982,39 +1080,48 @@ int get_ia32_out_regnr(const ir_node *node, int pos) { const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) { ia32_attr_t *attr = get_ia32_attr(node); - assert(is_ia32_irn(node) && "Not an ia32 node."); - assert(pos < attr->data.n_res && "Invalid OUT position."); + assert(pos < (int) attr->data.n_res && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return attr->slots[pos]; } /** - * Allocates num register slots for node. + * Initializes the nodes attributes. */ -void alloc_ia32_reg_slots(ir_node *node, int num) { +void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags, + const arch_register_req_t **in_reqs, + const arch_register_req_t **out_reqs, + const be_execution_unit_t ***execution_units, + int n_res, unsigned latency) +{ ia32_attr_t *attr = get_ia32_attr(node); - if (num) { - attr->slots = xcalloc(num, sizeof(attr->slots[0])); - } - else { - attr->slots = NULL; - } + set_ia32_flags(node, flags); + set_ia32_in_req_all(node, in_reqs); + set_ia32_out_req_all(node, out_reqs); + set_ia32_latency(node, latency); + set_ia32_n_res(node, n_res); - attr->data.n_res = num; + attr->exec_units = execution_units; + + attr->out_flags = NEW_ARR_D(int, get_irg_obstack(get_irn_irg(node)), n_res); + memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0])); + + memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0])); } -/** - * Initializes the nodes attributes. - */ -void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags, const ia32_register_req_t **in_reqs, - const ia32_register_req_t **out_reqs, int n_res) +ir_node *get_ia32_result_proj(const ir_node *node) { - set_ia32_flags(node, flags); - set_ia32_in_req_all(node, in_reqs); - set_ia32_out_req_all(node, out_reqs); - alloc_ia32_reg_slots(node, n_res); + const ir_edge_t *edge; + + foreach_out_edge(node, edge) { + ir_node *proj = get_edge_src_irn(edge); + if(get_Proj_proj(proj) == 0) { + return proj; + } + } + return NULL; } /*************************************************************************************** @@ -1027,16 +1134,67 @@ void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags, const ia32_regi * ***************************************************************************************/ -/* default compare operation to compare immediate ops */ -int ia32_compare_immop_attr(ia32_attr_t *a, ia32_attr_t *b) { - if (a->data.tp == b->data.tp) { - if (! a->cnst || ! b->cnst) - return 1; +/* default compare operation to compare attributes */ +int ia32_compare_attr(ia32_attr_t *a, ia32_attr_t *b) { + if (a->data.tp != b->data.tp + || a->data.imm_tp != b->data.imm_tp) + return 1; - return strcmp(a->cnst, b->cnst); - } + if (a->data.imm_tp == ia32_ImmConst + && a->cnst_val.tv != b->cnst_val.tv) + return 1; + + if (a->data.imm_tp == ia32_ImmSymConst + && a->cnst_val.sc != b->cnst_val.sc) + return 1; + + if (a->data.am_flavour != b->data.am_flavour + || a->data.am_scale != b->data.am_scale + || a->data.offs_sign != b->data.offs_sign + || a->data.am_sc_sign != b->data.am_sc_sign + || a->am_offs != b->am_offs + || a->am_sc != b->am_sc + || a->ls_mode != b->ls_mode) + return 1; + + if (a->data.use_frame != b->data.use_frame + || a->data.use_frame != b->data.use_frame + || a->frame_ent != b->frame_ent) + return 1; + + if(a->pn_code != b->pn_code) + return 1; + + if (a->data.tp != b->data.tp + || a->data.op_flav != b->data.op_flav) + return 1; + + return 0; +} - return 1; +/* copies the ia32 attributes */ +static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) { + ia32_attr_t *attr_old = get_ia32_attr(old_node); + ia32_attr_t *attr_new = get_ia32_attr(new_node); + + /* copy the attributes */ + memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node))); + + /* copy out flags */ + attr_new->out_flags = + DUP_ARR_D(int, get_irg_obstack(get_irn_irg(new_node)), attr_old->out_flags); +} + +/** + * Registers the ia32_copy_attr function for all ia32 opcodes. + */ +void ia32_register_copy_attr_func(void) { + unsigned i, f = get_ia32_opcode_first(), l = get_ia32_opcode_last(); + + for (i = f; i < l; i++) { + ir_op *op = get_irp_opcode(i); + op->ops.copy_attr = ia32_copy_attr; + } } /* Include the generated constructor functions */