X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_new_nodes.c;h=7d2dce52a1a3c9cf4d7800bb67e3100fa3160a24;hb=df8a2f7b2ea4349b84b95761f321adcb54e4661e;hp=8f6381c571a76c24b86ea4c58bd58296b2791725;hpb=07ccf5c739e1a0627ad3fc2f732b9b5612add654;p=libfirm diff --git a/ir/be/ia32/ia32_new_nodes.c b/ir/be/ia32/ia32_new_nodes.c index 8f6381c57..7d2dce52a 100644 --- a/ir/be/ia32/ia32_new_nodes.c +++ b/ir/be/ia32/ia32_new_nodes.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved. + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. * * This file is part of libFirm. * @@ -24,14 +24,13 @@ * @version $Id$ * * This file implements the creation of the achitecture specific firm opcodes - * and the coresponding node constructors for the ia32 assembler irg. + * and the corresponding node constructors for the ia32 assembler irg. */ -#ifdef HAVE_CONFIG_H #include "config.h" -#endif #include +#include "irargs_t.h" #include "irprog_t.h" #include "irgraph_t.h" #include "irnode_t.h" @@ -48,8 +47,10 @@ #include "xmalloc.h" #include "../bearch_t.h" +#include "../beinfo.h" #include "bearch_ia32_t.h" +#include "ia32_common_transform.h" #include "ia32_nodes_attr.h" #include "ia32_new_nodes.h" #include "gen_ia32_regalloc_if.h" @@ -72,7 +73,7 @@ static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs, int inout) { char *dir = inout ? "out" : "in"; - int max = inout ? get_ia32_n_res(n) : get_irn_arity(n); + int max = inout ? (int) arch_irn_get_n_outs(n) : get_irn_arity(n); char buf[1024]; int i; @@ -96,11 +97,27 @@ static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs, } if (reqs[i]->type & arch_register_req_type_should_be_same) { - ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same)); + unsigned other = reqs[i]->other_same; + int i; + + ir_fprintf(F, " same as"); + for (i = 0; 1U << i <= other; ++i) { + if (other & (1U << i)) { + ir_fprintf(F, " %+F", get_irn_n(n, i)); + } + } } - if (reqs[i]->type & arch_register_req_type_should_be_different) { - ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different)); + if (reqs[i]->type & arch_register_req_type_must_be_different) { + unsigned other = reqs[i]->other_different; + int i; + + ir_fprintf(F, " different from"); + for (i = 0; 1U << i <= other; ++i) { + if (other & (1U << i)) { + ir_fprintf(F, " %+F", get_irn_n(n, i)); + } + } } fprintf(F, "\n"); @@ -125,7 +142,6 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { int bad = 0; int i, n_res, flags; const arch_register_req_t **reqs; - const arch_register_t **slots; switch (reason) { case dump_node_opcode_txt: @@ -137,7 +153,7 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { fputc(' ', F); if(attr->symconst) { - if(attr->attr.data.am_sc_sign) { + if(attr->sc_sign) { fputc('-', F); } fputs(get_entity_name(attr->symconst), F); @@ -149,8 +165,7 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { fprintf(F, "%ld", attr->offset); } } - - { + else { const ia32_attr_t *attr = get_ia32_attr_const(n); if(attr->am_sc != NULL || attr->am_offs != 0) @@ -175,10 +190,9 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { break; case dump_node_mode_txt: - if (is_ia32_Ld(n) || is_ia32_St(n)) { - mode = get_ia32_ls_mode(n); - fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?"); - } + mode = get_ia32_ls_mode(n); + if (mode != NULL) + fprintf(F, "[%s]", get_mode_name(mode)); break; case dump_node_nodeattr_txt: @@ -193,7 +207,7 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { break; case dump_node_info_txt: - n_res = get_ia32_n_res(n); + n_res = arch_irn_get_n_outs(n); fprintf(F, "=== IA32 attr begin ===\n"); /* dump IN requirements */ @@ -209,12 +223,9 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { } /* dump assigned registers */ - slots = get_ia32_slots(n); - if (slots && n_res > 0) { + if (n_res > 0) { for (i = 0; i < n_res; i++) { - const arch_register_t *reg; - - reg = slots[i]; + const arch_register_t *reg = arch_irn_get_register(n, i); fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a"); } @@ -242,23 +253,14 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { /* dump supported am */ fprintf(F, "AM support = "); switch (get_ia32_am_support(n)) { - case ia32_am_None: - fprintf(F, "none"); - break; - case ia32_am_Source: - fprintf(F, "source only (Load)"); - break; - case ia32_am_Dest: - fprintf(F, "dest only (Load+Store)"); - break; - case ia32_am_Full: - fprintf(F, "full"); - break; + case ia32_am_none: fputs("none\n", F); break; + case ia32_am_unary: fputs("source (unary)\n", F); break; + case ia32_am_binary: fputs("source (binary)\n", F); break; + default: - fprintf(F, "unknown (%d)", get_ia32_am_support(n)); + fprintf(F, "unknown (%d)\n", get_ia32_am_support(n)); break; } - fprintf(F, "\n"); /* dump AM offset */ if(get_ia32_am_offs_int(n) != 0) { @@ -276,40 +278,29 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n)); /* dump pn code */ - if(is_ia32_SwitchJmp(n) || is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) { - fprintf(F, "pn_code = %ld\n", get_ia32_pncode(n)); - } else { - if(get_ia32_pncode(n) & ia32_pn_Cmp_Unsigned) { - long pnc = get_ia32_pncode(n); - fprintf(F, "pn_code = %ld (%s, unsigned)\n", - pnc, get_pnc_string(pnc & ~ia32_pn_Cmp_Unsigned)); - } else { - fprintf(F, "pn_code = %ld (%s)\n", get_ia32_pncode(n), - get_pnc_string(get_ia32_pncode(n))); - } + if (is_ia32_SwitchJmp(n)) { + fprintf(F, "pn_code = %ld\n", get_ia32_condcode(n)); + } else if (is_ia32_CMov(n) || is_ia32_Set(n) || is_ia32_Jcc(n)) { + ia32_attr_t *attr = get_ia32_attr(n); + long pnc = get_ia32_condcode(n); + fprintf(F, "pn_code = 0x%lX (%s)\n", pnc, get_pnc_string(pnc & pn_Cmp_True)); + fprintf(F, "ins_permuted = %u \n", attr->data.ins_permuted); + fprintf(F, "cmp_unsigned = %u \n", attr->data.cmp_unsigned); + } + else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) { + fprintf(F, "size = %u\n", get_ia32_copyb_size(n)); } - /* dump n_res */ - fprintf(F, "n_res = %d\n", get_ia32_n_res(n)); - - /* dump use_frame */ + fprintf(F, "n_res = %d\n", arch_irn_get_n_outs(n)); fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n)); - - /* commutative */ fprintf(F, "commutative = %d\n", is_ia32_commutative(n)); - - /* got lea */ - fprintf(F, "got loea = %d\n", is_ia32_got_lea(n)); - - /* need stackent */ fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n)); - - /* dump latency */ + fprintf(F, "is reload = %d\n", is_ia32_is_reload(n)); fprintf(F, "latency = %d\n", get_ia32_latency(n)); /* dump flags */ fprintf(F, "flags ="); - flags = get_ia32_flags(n); + flags = arch_irn_get_flags(n); if (flags == arch_irn_flags_none) { fprintf(F, " none"); } @@ -320,11 +311,8 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { if (flags & arch_irn_flags_rematerializable) { fprintf(F, " remat"); } - if (flags & arch_irn_flags_ignore) { - fprintf(F, " ignore"); - } - if (flags & arch_irn_flags_modify_sp) { - fprintf(F, " modify_sp"); + if (flags & arch_irn_flags_modify_flags) { + fprintf(F, " modify_flags"); } } fprintf(F, " (%d)\n", flags); @@ -411,13 +399,77 @@ const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) { return asm_attr; } +ia32_immediate_attr_t *get_ia32_immediate_attr(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + ia32_immediate_attr_t *imm_attr = CAST_IA32_ATTR(ia32_immediate_attr_t, attr); + + return imm_attr; +} + const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node) { - const ia32_attr_t *attr = get_ia32_attr_const(node); - const ia32_immediate_attr_t *immediate_attr - = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr); + const ia32_attr_t *attr = get_ia32_attr_const(node); + const ia32_immediate_attr_t *imm_attr = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr); + + return imm_attr; +} + +ia32_condcode_attr_t *get_ia32_condcode_attr(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + ia32_condcode_attr_t *cc_attr = CAST_IA32_ATTR(ia32_condcode_attr_t, attr); + + return cc_attr; +} + +const ia32_condcode_attr_t *get_ia32_condcode_attr_const(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + const ia32_condcode_attr_t *cc_attr = CONST_CAST_IA32_ATTR(ia32_condcode_attr_t, attr); - return immediate_attr; + return cc_attr; +} + +ia32_call_attr_t *get_ia32_call_attr(ir_node *node) +{ + ia32_attr_t *attr = get_ia32_attr(node); + ia32_call_attr_t *call_attr = CAST_IA32_ATTR(ia32_call_attr_t, attr); + + return call_attr; +} + +const ia32_call_attr_t *get_ia32_call_attr_const(const ir_node *node) +{ + const ia32_attr_t *attr = get_ia32_attr_const(node); + const ia32_call_attr_t *call_attr = CONST_CAST_IA32_ATTR(ia32_call_attr_t, attr); + + return call_attr; +} + +ia32_copyb_attr_t *get_ia32_copyb_attr(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + ia32_copyb_attr_t *copyb_attr = CAST_IA32_ATTR(ia32_copyb_attr_t, attr); + + return copyb_attr; +} + +const ia32_copyb_attr_t *get_ia32_copyb_attr_const(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + const ia32_copyb_attr_t *copyb_attr = CONST_CAST_IA32_ATTR(ia32_copyb_attr_t, attr); + + return copyb_attr; +} + +ia32_climbframe_attr_t *get_ia32_climbframe_attr(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + ia32_climbframe_attr_t *climbframe_attr = CAST_IA32_ATTR(ia32_climbframe_attr_t, attr); + + return climbframe_attr; +} + +const ia32_climbframe_attr_t *get_ia32_climbframe_attr_const(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + const ia32_climbframe_attr_t *climbframe_attr = CONST_CAST_IA32_ATTR(ia32_climbframe_attr_t, attr); + + return climbframe_attr; } /** @@ -436,15 +488,8 @@ void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) { attr->data.tp = tp; } -/** - * Gets the supported address mode of an ia32 node - */ -ia32_am_type_t get_ia32_am_support(const ir_node *node) { - const ia32_attr_t *attr = get_ia32_attr_const(node); - return attr->data.am_support; -} - -ia32_am_arity_t get_ia32_am_arity(const ir_node *node) { +ia32_am_type_t get_ia32_am_support(const ir_node *node) +{ const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.am_arity; } @@ -452,15 +497,10 @@ ia32_am_arity_t get_ia32_am_arity(const ir_node *node) { /** * Sets the supported address mode of an ia32 node */ -void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp, - ia32_am_arity_t arity) { - ia32_attr_t *attr = get_ia32_attr(node); - attr->data.am_support = am_tp; - attr->data.am_arity = arity; - - assert((am_tp == ia32_am_None && arity == ia32_am_arity_none) || - (am_tp != ia32_am_None && - ((arity == ia32_am_unary) || (arity == ia32_am_binary) || (arity == ia32_am_ternary)))); +void set_ia32_am_support(ir_node *node, ia32_am_type_t arity) +{ + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.am_arity = arity; } /** @@ -527,7 +567,7 @@ int is_ia32_am_sc_sign(const ir_node *node) { /** * Gets the addr mode const. */ -int get_ia32_am_scale(const ir_node *node) { +unsigned get_ia32_am_scale(const ir_node *node) { const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.am_scale; } @@ -535,8 +575,9 @@ int get_ia32_am_scale(const ir_node *node) { /** * Sets the index register scale for address mode. */ -void set_ia32_am_scale(ir_node *node, int scale) { - ia32_attr_t *attr = get_ia32_attr(node); +void set_ia32_am_scale(ir_node *node, unsigned scale) { + ia32_attr_t *attr = get_ia32_attr(node); + assert(scale <= 3 && "AM scale out of range [0 ... 3]"); attr->data.am_scale = scale; } @@ -601,30 +642,6 @@ int is_ia32_commutative(const ir_node *node) { return attr->data.is_commutative; } -/** - * Sets node got_lea. - */ -void set_ia32_got_lea(ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - attr->data.got_lea = 1; -} - -/** - * Clears node got_lea. - */ -void clear_ia32_got_lea(ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - attr->data.got_lea = 0; -} - -/** - * Checks if node got lea. - */ -int is_ia32_got_lea(const ir_node *node) { - const ia32_attr_t *attr = get_ia32_attr_const(node); - return attr->data.got_lea; -} - void set_ia32_need_stackent(ir_node *node) { ia32_attr_t *attr = get_ia32_attr(node); attr->data.need_stackent = 1; @@ -640,6 +657,36 @@ int is_ia32_need_stackent(const ir_node *node) { return attr->data.need_stackent; } +void set_ia32_is_reload(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.is_reload = 1; +} + +int is_ia32_is_reload(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.is_reload; +} + +void set_ia32_is_spill(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.is_spill = 1; +} + +int is_ia32_is_spill(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.is_spill; +} + +void set_ia32_is_remat(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.is_remat = 1; +} + +int is_ia32_is_remat(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.is_remat; +} + /** * Gets the mode of the stored/loaded value (only set for Store/Load) */ @@ -681,16 +728,9 @@ void set_ia32_frame_ent(ir_node *node, ir_entity *ent) { * Gets the instruction latency. */ unsigned get_ia32_latency(const ir_node *node) { - const ia32_attr_t *attr = get_ia32_attr_const(node); - return attr->latency; -} - -/** -* Sets the instruction latency. -*/ -void set_ia32_latency(ir_node *node, unsigned latency) { - ia32_attr_t *attr = get_ia32_attr(node); - attr->latency = latency; + const ir_op *op = get_irn_op(node); + const ia32_op_attr_t *op_attr = (ia32_op_attr_t*) get_op_attr(op); + return op_attr->latency; } /** @@ -764,111 +804,74 @@ void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) { } /** - * Returns the register flag of an ia32 node. + * Returns the condition code of a node. */ -arch_irn_flags_t get_ia32_flags(const ir_node *node) { - const ia32_attr_t *attr = get_ia32_attr_const(node); - return attr->data.flags; -} - -/** - * Sets the register flag of an ia32 node. - */ -void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) { - ia32_attr_t *attr = get_ia32_attr(node); - attr->data.flags = flags; +long get_ia32_condcode(const ir_node *node) +{ + const ia32_condcode_attr_t *attr = get_ia32_condcode_attr_const(node); + return attr->pn_code; } /** - * Returns the result register slots of an ia32 node. + * Sets the condition code of a node */ -const arch_register_t **get_ia32_slots(const ir_node *node) { - const ia32_attr_t *attr = get_ia32_attr_const(node); - return attr->slots; +void set_ia32_condcode(ir_node *node, long code) +{ + ia32_condcode_attr_t *attr = get_ia32_condcode_attr(node); + attr->pn_code = code; } /** - * Returns the number of results. + * Returns the condition code of a node. */ -int get_ia32_n_res(const ir_node *node) { - const ia32_attr_t *attr = get_ia32_attr_const(node); - return ARR_LEN(attr->slots); +unsigned get_ia32_copyb_size(const ir_node *node) +{ + const ia32_copyb_attr_t *attr = get_ia32_copyb_attr_const(node); + return attr->size; } /** - * Returns the flavour of an ia32 node, + * Get the list of available execution units. */ -ia32_op_flavour_t get_ia32_flavour(const ir_node *node) { +const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) { const ia32_attr_t *attr = get_ia32_attr_const(node); - return attr->data.op_flav; -} - -/** - * Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh. - */ -void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) { - ia32_attr_t *attr = get_ia32_attr(node); - attr->data.op_flav = op_flav; + return attr->exec_units; } /** - * Returns the projnum code. + * Get the exception label attribute. */ -long get_ia32_pncode(const ir_node *node) -{ +unsigned get_ia32_exc_label(const ir_node *node) { const ia32_attr_t *attr = get_ia32_attr_const(node); - return attr->pn_code; + return attr->data.has_except_label; } /** - * Sets the projnum code - */ -void set_ia32_pncode(ir_node *node, long code) -{ - ia32_attr_t *attr = get_ia32_attr(node); - attr->pn_code = code; -} - -/** - * Sets the flags for the n'th out. + * Set the exception label attribute. */ -void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) { +void set_ia32_exc_label(ir_node *node, unsigned flag) { ia32_attr_t *attr = get_ia32_attr(node); - assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position."); - attr->out_flags[pos] = flags; -} - -/** - * Gets the flags for the n'th out. - */ -arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) { - const ia32_attr_t *attr = get_ia32_attr_const(node); - assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position."); - return attr->out_flags[pos]; + attr->data.has_except_label = flag; } /** - * Get the list of available execution units. + * Return the exception label id. */ -const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) { +ir_label_t get_ia32_exc_label_id(const ir_node *node) { const ia32_attr_t *attr = get_ia32_attr_const(node); - return attr->exec_units; -} -/** - * Get the exception label attribute. - */ -unsigned get_ia32_exc_label(const ir_node *node) { - const ia32_attr_t *attr = get_ia32_attr_const(node); - return attr->data.except_label; + assert(attr->data.has_except_label); + return attr->exc_label; } /** - * Set the exception label attribute. + * Assign the exception label id. */ -void set_ia32_exc_label(ir_node *node, unsigned flag) { +void set_ia32_exc_label_id(ir_node *node, ir_label_t id) { ia32_attr_t *attr = get_ia32_attr(node); - attr->data.except_label = flag; + + assert(attr->data.has_except_label); + attr->exc_label = id; } #ifndef NDEBUG @@ -876,15 +879,27 @@ void set_ia32_exc_label(ir_node *node, unsigned flag) { /** * Returns the name of the original ir node. */ -const char *get_ia32_orig_node(const ir_node *node) { +const char *get_ia32_orig_node(const ir_node *node) +{ const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->orig_node; } +static const char *ia32_get_old_node_name(const ir_node *irn) +{ + struct obstack *obst = env_cg->isa->name_obst; + + lc_eoprintf(firm_get_arg_env(), obst, "%+F", irn); + obstack_1grow(obst, 0); + return obstack_finish(obst); +} + /** * Sets the name of the original ir node. */ -void set_ia32_orig_node(ir_node *node, const char *name) { +void set_ia32_orig_node(ir_node *node, const ir_node *old) +{ + const char *name = ia32_get_old_node_name(old); ia32_attr_t *attr = get_ia32_attr(node); attr->orig_node = name; } @@ -902,24 +917,6 @@ void set_ia32_orig_node(ir_node *node, const char *name) { * |_| ******************************************************************************************************/ -/** - * Sets the AddrMode(S|D) attribute - */ -void set_ia32_AddrMode(ir_node *node, char direction) { - ia32_attr_t *attr = get_ia32_attr(node); - - switch (direction) { - case 'D': - attr->data.tp = ia32_AddrModeD; - break; - case 'S': - attr->data.tp = ia32_AddrModeS; - break; - default: - assert(0 && "wrong AM type"); - } -} - /** * Returns whether or not the node is an AddrModeS node. */ @@ -936,74 +933,16 @@ int is_ia32_AddrModeD(const ir_node *node) { return (attr->data.tp == ia32_AddrModeD); } -/** - * Checks if node is a Load or xLoad/vfLoad. - */ -int is_ia32_Ld(const ir_node *node) { - int op = get_ia32_irn_opcode(node); - return op == iro_ia32_Load || - op == iro_ia32_xLoad || - op == iro_ia32_vfld || - op == iro_ia32_fld; -} - -/** - * Checks if node is a Store or xStore/vfStore. - */ -int is_ia32_St(const ir_node *node) { - int op = get_ia32_irn_opcode(node); - return op == iro_ia32_Store || - op == iro_ia32_Store8Bit || - op == iro_ia32_xStore || - op == iro_ia32_vfst || - op == iro_ia32_fst || - op == iro_ia32_fstp; -} - -/** - * Returns the name of the OUT register at position pos. - */ -const char *get_ia32_out_reg_name(const ir_node *node, int pos) { - const ia32_attr_t *attr = get_ia32_attr_const(node); - - assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); - assert(attr->slots[pos] && "No register assigned"); - - return arch_register_get_name(attr->slots[pos]); -} - -/** - * Returns the index of the OUT register at position pos within its register class. - */ -int get_ia32_out_regnr(const ir_node *node, int pos) { - const ia32_attr_t *attr = get_ia32_attr_const(node); - - assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); - assert(attr->slots[pos] && "No register assigned"); - - return arch_register_get_index(attr->slots[pos]); -} - void ia32_swap_left_right(ir_node *node) { - ir_node *left = get_irn_n(node, n_ia32_binary_left); - ir_node *right = get_irn_n(node, n_ia32_binary_right); + ia32_attr_t *attr = get_ia32_attr(node); + ir_node *left = get_irn_n(node, n_ia32_binary_left); + ir_node *right = get_irn_n(node, n_ia32_binary_right); + assert(is_ia32_commutative(node)); + attr->data.ins_permuted = !attr->data.ins_permuted; set_irn_n(node, n_ia32_binary_left, right); set_irn_n(node, n_ia32_binary_right, left); - set_ia32_pncode(node, get_inversed_pnc(get_ia32_pncode(node))); -} - -/** - * Returns the OUT register at position pos. - */ -const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) { - const ia32_attr_t *attr = get_ia32_attr_const(node); - - assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); - assert(attr->slots[pos] && "No register assigned"); - - return attr->slots[pos]; } /** @@ -1013,28 +952,25 @@ void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags, const arch_register_req_t **in_reqs, const arch_register_req_t **out_reqs, const be_execution_unit_t ***execution_units, - int n_res, unsigned latency) + int n_res) { ir_graph *irg = get_irn_irg(node); struct obstack *obst = get_irg_obstack(irg); ia32_attr_t *attr = get_ia32_attr(node); + backend_info_t *info; - set_ia32_flags(node, flags); + arch_irn_set_flags(node, flags); set_ia32_in_req_all(node, in_reqs); set_ia32_out_req_all(node, out_reqs); - set_ia32_latency(node, latency); attr->exec_units = execution_units; #ifndef NDEBUG attr->attr_type |= IA32_ATTR_ia32_attr_t; #endif - attr->out_flags = NEW_ARR_D(int, obst, n_res); - memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0])); - - attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res); - /* void* cast to suppress an incorrect warning on MSVC */ - memset((void*)attr->slots, 0, n_res * sizeof(attr->slots[0])); + info = be_get_info(node); + info->out_infos = NEW_ARR_D(reg_out_info_t, obst, n_res); + memset(info->out_infos, 0, n_res * sizeof(info->out_infos[0])); } void @@ -1043,6 +979,8 @@ init_ia32_x87_attributes(ir_node *res) #ifndef NDEBUG ia32_attr_t *attr = get_ia32_attr(res); attr->attr_type |= IA32_ATTR_ia32_x87_attr_t; +#else + (void) res; #endif ia32_current_cg->do_x87_sim = 1; } @@ -1053,6 +991,8 @@ init_ia32_asm_attributes(ir_node *res) #ifndef NDEBUG ia32_attr_t *attr = get_ia32_attr(res); attr->attr_type |= IA32_ATTR_ia32_asm_attr_t; +#else + (void) res; #endif } @@ -1063,24 +1003,52 @@ init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst, ia32_immediate_attr_t *attr = get_irn_generic_attr(res); #ifndef NDEBUG - attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t; + attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t; #endif - attr->symconst = symconst; - attr->attr.data.am_sc_sign = symconst_sign; - attr->offset = offset; + attr->symconst = symconst; + attr->sc_sign = symconst_sign; + attr->offset = offset; } -ir_node *get_ia32_result_proj(const ir_node *node) +void init_ia32_call_attributes(ir_node* res, unsigned pop, ir_type* call_tp) { - const ir_edge_t *edge; + ia32_call_attr_t *attr = get_irn_generic_attr(res); - foreach_out_edge(node, edge) { - ir_node *proj = get_edge_src_irn(edge); - if(get_Proj_proj(proj) == 0) { - return proj; - } - } - return NULL; +#ifndef NDEBUG + attr->attr.attr_type |= IA32_ATTR_ia32_call_attr_t; +#endif + attr->pop = pop; + attr->call_tp = call_tp; +} + +void +init_ia32_copyb_attributes(ir_node *res, unsigned size) { + ia32_copyb_attr_t *attr = get_irn_generic_attr(res); + +#ifndef NDEBUG + attr->attr.attr_type |= IA32_ATTR_ia32_copyb_attr_t; +#endif + attr->size = size; +} + +void +init_ia32_condcode_attributes(ir_node *res, long pnc) { + ia32_condcode_attr_t *attr = get_irn_generic_attr(res); + +#ifndef NDEBUG + attr->attr.attr_type |= IA32_ATTR_ia32_condcode_attr_t; +#endif + attr->pn_code = pnc; +} + +void +init_ia32_climbframe_attributes(ir_node *res, unsigned count) { + ia32_climbframe_attr_t *attr = get_irn_generic_attr(res); + +#ifndef NDEBUG + attr->attr.attr_type |= IA32_ATTR_ia32_climbframe_attr_t; +#endif + attr->count = count; } /*************************************************************************************** @@ -1094,7 +1062,8 @@ ir_node *get_ia32_result_proj(const ir_node *node) ***************************************************************************************/ /* default compare operation to compare attributes */ -int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) { +int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) +{ if (a->data.tp != b->data.tp) return 1; @@ -1116,19 +1085,17 @@ int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) { || a->frame_ent != b->frame_ent) return 1; - if(a->pn_code != b->pn_code) + if (a->data.has_except_label != b->data.has_except_label) return 1; - if (a->data.tp != b->data.tp - || a->data.op_flav != b->data.op_flav) - return 1; - - if (a->data.except_label != b->data.except_label) + if (a->data.ins_permuted != b->data.ins_permuted + || a->data.cmp_unsigned != b->data.cmp_unsigned) return 1; return 0; } +/** Compare nodes attributes for all "normal" nodes. */ static int ia32_compare_nodes_attr(ir_node *a, ir_node *b) { @@ -1138,19 +1105,74 @@ int ia32_compare_nodes_attr(ir_node *a, ir_node *b) return ia32_compare_attr(attr_a, attr_b); } +/** Compare node attributes for nodes with condition code. */ static -int ia32_compare_x87_attr(ir_node *a, ir_node *b) +int ia32_compare_condcode_attr(ir_node *a, ir_node *b) { - return ia32_compare_nodes_attr(a, b); + const ia32_condcode_attr_t *attr_a; + const ia32_condcode_attr_t *attr_b; + + if (ia32_compare_nodes_attr(a, b)) + return 1; + + attr_a = get_ia32_condcode_attr_const(a); + attr_b = get_ia32_condcode_attr_const(b); + + if (attr_a->pn_code != attr_b->pn_code) + return 1; + + return 0; +} + +/** Compare node attributes for call nodes. */ +static int ia32_compare_call_attr(ir_node *a, ir_node *b) +{ + const ia32_call_attr_t *attr_a; + const ia32_call_attr_t *attr_b; + + if (ia32_compare_nodes_attr(a, b)) + return 1; + + attr_a = get_ia32_call_attr_const(a); + attr_b = get_ia32_call_attr_const(b); + + if (attr_a->pop != attr_b->pop) + return 1; + + if (attr_a->call_tp != attr_b->call_tp) + return 1; + + return 0; +} + +/** Compare node attributes for CopyB nodes. */ +static +int ia32_compare_copyb_attr(ir_node *a, ir_node *b) +{ + const ia32_copyb_attr_t *attr_a; + const ia32_copyb_attr_t *attr_b; + + if (ia32_compare_nodes_attr(a, b)) + return 1; + + attr_a = get_ia32_copyb_attr_const(a); + attr_b = get_ia32_copyb_attr_const(b); + + if (attr_a->size != attr_b->size) + return 1; + + return 0; } + +/** Compare ASM node attributes. */ static int ia32_compare_asm_attr(ir_node *a, ir_node *b) { const ia32_asm_attr_t *attr_a; const ia32_asm_attr_t *attr_b; - if(ia32_compare_nodes_attr(a, b)) + if (ia32_compare_nodes_attr(a, b)) return 1; attr_a = get_ia32_asm_attr_const(a); @@ -1162,15 +1184,51 @@ int ia32_compare_asm_attr(ir_node *a, ir_node *b) return 0; } +/** + * Hash function for Immediates + */ +static unsigned ia32_hash_Immediate(const ir_node *irn) { + const ia32_immediate_attr_t *a = get_ia32_immediate_attr_const(irn); + + return HASH_PTR(a->symconst) + (a->sc_sign << 16) + a->offset; +} + +/** Compare node attributes for Immediates. */ static int ia32_compare_immediate_attr(ir_node *a, ir_node *b) { const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a); const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b); - if(attr_a->symconst != attr_b->symconst || - attr_a->attr.data.am_sc_sign != attr_b->attr.data.am_sc_sign || - attr_a->offset != attr_b->offset) + if (attr_a->symconst != attr_b->symconst || + attr_a->sc_sign != attr_b->sc_sign || + attr_a->offset != attr_b->offset) + return 1; + + return 0; +} + +/** Compare node attributes for x87 nodes. */ +static +int ia32_compare_x87_attr(ir_node *a, ir_node *b) +{ + return ia32_compare_nodes_attr(a, b); +} + +/** Compare node attributes for ClimbFrame nodes. */ +static +int ia32_compare_climbframe_attr(ir_node *a, ir_node *b) +{ + const ia32_climbframe_attr_t *attr_a; + const ia32_climbframe_attr_t *attr_b; + + if (ia32_compare_nodes_attr(a, b)) + return 1; + + attr_a = get_ia32_climbframe_attr_const(a); + attr_b = get_ia32_climbframe_attr_const(b); + + if (attr_a->count != attr_b->count) return 1; return 0; @@ -1183,16 +1241,15 @@ static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) struct obstack *obst = get_irg_obstack(irg); const ia32_attr_t *attr_old = get_ia32_attr_const(old_node); ia32_attr_t *attr_new = get_ia32_attr(new_node); + backend_info_t *old_info = be_get_info(old_node); + backend_info_t *new_info = be_get_info(new_node); /* copy the attributes */ memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node))); /* copy out flags */ - attr_new->out_flags = - DUP_ARR_D(int, obst, attr_old->out_flags); - /* copy register assignments */ - attr_new->slots = - DUP_ARR_D(arch_register_t*, obst, attr_old->slots); + new_info->out_infos = + DUP_ARR_D(reg_out_info_t, obst, old_info->out_infos); } /* Include the generated constructor functions */