X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_new_nodes.c;h=27caa2ffae578878c12cb767d3b3495850bf83d1;hb=662fc44c951bdb45a9b7d9563e9ffbb87101b9e4;hp=d741aef3fe86dc1e95bcf1d24bd4a38480bddc26;hpb=605afb45243e9d7c246760d4f1452dfb575b87d6;p=libfirm

diff --git a/ir/be/ia32/ia32_new_nodes.c b/ir/be/ia32/ia32_new_nodes.c
index d741aef3f..27caa2ffa 100644
--- a/ir/be/ia32/ia32_new_nodes.c
+++ b/ir/be/ia32/ia32_new_nodes.c
@@ -107,7 +107,7 @@ static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
 				}
 			}
 
-			if (reqs[i]->type & arch_register_req_type_should_be_different) {
+			if (reqs[i]->type & arch_register_req_type_must_be_different) {
 				unsigned other = reqs[i]->other_different;
 				int i;
 
@@ -288,8 +288,11 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
 			if (is_ia32_SwitchJmp(n)) {
 				fprintf(F, "pn_code = %ld\n", get_ia32_condcode(n));
 			} else if (is_ia32_CMov(n) || is_ia32_Set(n) || is_ia32_Jcc(n)) {
+				ia32_attr_t *attr = get_ia32_attr(n);
 				long pnc = get_ia32_condcode(n);
-				fprintf(F, "pn_code = 0x%X (%s)\n", pnc, get_pnc_string(pnc & pn_Cmp_True));
+				fprintf(F, "pn_code = 0x%lX (%s)\n", pnc, get_pnc_string(pnc & pn_Cmp_True));
+				fprintf(F, "ins_permuted = %u \n", attr->data.ins_permuted);
+				fprintf(F, "cmp_unsigned = %u \n", attr->data.cmp_unsigned);
 			}
 			else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
 				fprintf(F, "size = %u\n", get_ia32_copyb_size(n));
@@ -307,6 +310,9 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
 			/* need stackent */
 			fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
 
+			/* need stackent */
+			fprintf(F, "is reload = %d\n", is_ia32_is_reload(n));
+
 			/* dump latency */
 			fprintf(F, "latency = %d\n", get_ia32_latency(n));
 
@@ -329,6 +335,9 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
 				if (flags & arch_irn_flags_modify_sp) {
 					fprintf(F, " modify_sp");
 				}
+				if (flags & arch_irn_flags_modify_flags) {
+					fprintf(F, " modify_flags");
+				}
 			}
 			fprintf(F, " (%d)\n", flags);
 
@@ -573,7 +582,8 @@ int get_ia32_am_scale(const ir_node *node) {
  * Sets the index register scale for address mode.
  */
 void set_ia32_am_scale(ir_node *node, int scale) {
-	ia32_attr_t *attr   = get_ia32_attr(node);
+	ia32_attr_t *attr = get_ia32_attr(node);
+	assert(0 <= scale && scale < 4 && "AM scale out of range");
 	attr->data.am_scale = scale;
 }
 
@@ -653,6 +663,16 @@ int is_ia32_need_stackent(const ir_node *node) {
 	return attr->data.need_stackent;
 }
 
+void set_ia32_is_reload(ir_node *node) {
+	ia32_attr_t *attr = get_ia32_attr(node);
+	attr->data.is_reload = 1;
+}
+
+int is_ia32_is_reload(const ir_node *node) {
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
+	return attr->data.is_reload;
+}
+
 /**
  * Gets the mode of the stored/loaded value (only set for Store/Load)
  */
@@ -1228,6 +1248,15 @@ int ia32_compare_asm_attr(ir_node *a, ir_node *b)
 	return 0;
 }
 
+/**
+ * Hash function for Immediates
+ */
+static unsigned ia32_hash_Immediate(const ir_node *irn) {
+	const ia32_immediate_attr_t *a = get_ia32_immediate_attr_const(irn);
+
+	return HASH_PTR(a->symconst) + (a->sc_sign << 16) + a->offset;
+}
+
 /** Compare node attributes for Immediates. */
 static
 int ia32_compare_immediate_attr(ir_node *a, ir_node *b)