X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_new_nodes.c;h=27caa2ffae578878c12cb767d3b3495850bf83d1;hb=662fc44c951bdb45a9b7d9563e9ffbb87101b9e4;hp=81476cb065bea0c969e09bc2db06952532882585;hpb=e37bf8de17ea3b1f0518ed2369da92fd54062a8b;p=libfirm diff --git a/ir/be/ia32/ia32_new_nodes.c b/ir/be/ia32/ia32_new_nodes.c index 81476cb06..27caa2ffa 100644 --- a/ir/be/ia32/ia32_new_nodes.c +++ b/ir/be/ia32/ia32_new_nodes.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved. + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. * * This file is part of libFirm. * @@ -96,13 +96,27 @@ static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs, } if (reqs[i]->type & arch_register_req_type_should_be_same) { - ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same[0])); - if (reqs[i]->other_same[1] != -1) - ir_fprintf(F, " or %+F", get_irn_n(n, reqs[i]->other_same[1])); + unsigned other = reqs[i]->other_same; + int i; + + ir_fprintf(F, " same as"); + for (i = 0; 1U << i <= other; ++i) { + if (other & (1U << i)) { + ir_fprintf(F, " %+F", get_irn_n(n, i)); + } + } } - if (reqs[i]->type & arch_register_req_type_should_be_different) { - ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different)); + if (reqs[i]->type & arch_register_req_type_must_be_different) { + unsigned other = reqs[i]->other_different; + int i; + + ir_fprintf(F, " different from"); + for (i = 0; 1U << i <= other; ++i) { + if (other & (1U << i)) { + ir_fprintf(F, " %+F", get_irn_n(n, i)); + } + } } fprintf(F, "\n"); @@ -249,12 +263,6 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { case ia32_am_Source: fprintf(F, "source only (Load)"); break; - case ia32_am_Dest: - fprintf(F, "dest only (Load+Store)"); - break; - case ia32_am_Full: - fprintf(F, "full"); - break; default: fprintf(F, "unknown (%d)", get_ia32_am_support(n)); break; @@ -280,11 +288,14 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { if (is_ia32_SwitchJmp(n)) { fprintf(F, "pn_code = %ld\n", get_ia32_condcode(n)); } else if (is_ia32_CMov(n) || is_ia32_Set(n) || is_ia32_Jcc(n)) { - pn_Cmp pnc = get_ia32_condcode(n); - fprintf(F, "pn_code = %ld (%s)\n", pnc, get_pnc_string(pnc)); + ia32_attr_t *attr = get_ia32_attr(n); + long pnc = get_ia32_condcode(n); + fprintf(F, "pn_code = 0x%lX (%s)\n", pnc, get_pnc_string(pnc & pn_Cmp_True)); + fprintf(F, "ins_permuted = %u \n", attr->data.ins_permuted); + fprintf(F, "cmp_unsigned = %u \n", attr->data.cmp_unsigned); } else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) { - fprintf(F, "size = %ld\n", get_ia32_copyb_size(n)); + fprintf(F, "size = %u\n", get_ia32_copyb_size(n)); } /* dump n_res */ @@ -299,6 +310,9 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { /* need stackent */ fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n)); + /* need stackent */ + fprintf(F, "is reload = %d\n", is_ia32_is_reload(n)); + /* dump latency */ fprintf(F, "latency = %d\n", get_ia32_latency(n)); @@ -321,6 +335,9 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { if (flags & arch_irn_flags_modify_sp) { fprintf(F, " modify_sp"); } + if (flags & arch_irn_flags_modify_flags) { + fprintf(F, " modify_flags"); + } } fprintf(F, " (%d)\n", flags); @@ -406,12 +423,18 @@ const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) { return asm_attr; } +ia32_immediate_attr_t *get_ia32_immediate_attr(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + ia32_immediate_attr_t *imm_attr = CAST_IA32_ATTR(ia32_immediate_attr_t, attr); + + return imm_attr; +} + const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node) { const ia32_attr_t *attr = get_ia32_attr_const(node); const ia32_immediate_attr_t *imm_attr = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr); - assert(is_ia32_Immediate(node) || is_ia32_Const(node)); return imm_attr; } @@ -419,7 +442,6 @@ ia32_condcode_attr_t *get_ia32_condcode_attr(ir_node *node) { ia32_attr_t *attr = get_ia32_attr(node); ia32_condcode_attr_t *cc_attr = CAST_IA32_ATTR(ia32_condcode_attr_t, attr); - assert(is_ia32_SwitchJmp(node) || is_ia32_CMov(node) || is_ia32_Set(node) || is_ia32_Jcc(node)); return cc_attr; } @@ -427,7 +449,6 @@ const ia32_condcode_attr_t *get_ia32_condcode_attr_const(const ir_node *node) { const ia32_attr_t *attr = get_ia32_attr_const(node); const ia32_condcode_attr_t *cc_attr = CONST_CAST_IA32_ATTR(ia32_condcode_attr_t, attr); - assert(is_ia32_SwitchJmp(node) || is_ia32_CMov(node) || is_ia32_Set(node) || is_ia32_Jcc(node)); return cc_attr; } @@ -435,7 +456,6 @@ ia32_copyb_attr_t *get_ia32_copyb_attr(ir_node *node) { ia32_attr_t *attr = get_ia32_attr(node); ia32_copyb_attr_t *copyb_attr = CAST_IA32_ATTR(ia32_copyb_attr_t, attr); - assert(is_ia32_CopyB(node) || is_ia32_CopyB_i(node)); return copyb_attr; } @@ -443,7 +463,6 @@ const ia32_copyb_attr_t *get_ia32_copyb_attr_const(const ir_node *node) { const ia32_attr_t *attr = get_ia32_attr_const(node); const ia32_copyb_attr_t *copyb_attr = CONST_CAST_IA32_ATTR(ia32_copyb_attr_t, attr); - assert(is_ia32_CopyB(node) || is_ia32_CopyB_i(node)); return copyb_attr; } @@ -563,7 +582,8 @@ int get_ia32_am_scale(const ir_node *node) { * Sets the index register scale for address mode. */ void set_ia32_am_scale(ir_node *node, int scale) { - ia32_attr_t *attr = get_ia32_attr(node); + ia32_attr_t *attr = get_ia32_attr(node); + assert(0 <= scale && scale < 4 && "AM scale out of range"); attr->data.am_scale = scale; } @@ -643,6 +663,16 @@ int is_ia32_need_stackent(const ir_node *node) { return attr->data.need_stackent; } +void set_ia32_is_reload(ir_node *node) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.is_reload = 1; +} + +int is_ia32_is_reload(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + return attr->data.is_reload; +} + /** * Gets the mode of the stored/loaded value (only set for Store/Load) */ @@ -684,16 +714,9 @@ void set_ia32_frame_ent(ir_node *node, ir_entity *ent) { * Gets the instruction latency. */ unsigned get_ia32_latency(const ir_node *node) { - const ia32_attr_t *attr = get_ia32_attr_const(node); - return attr->latency; -} - -/** -* Sets the instruction latency. -*/ -void set_ia32_latency(ir_node *node, unsigned latency) { - ia32_attr_t *attr = get_ia32_attr(node); - attr->latency = latency; + const ir_op *op = get_irn_op(node); + const ia32_op_attr_t *op_attr = (ia32_op_attr_t*) get_op_attr(op); + return op_attr->latency; } /** @@ -782,6 +805,11 @@ void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) { attr->data.flags = flags; } +void add_ia32_flags(ir_node *node, arch_irn_flags_t flags) { + ia32_attr_t *attr = get_ia32_attr(node); + attr->data.flags |= flags; +} + /** * Returns the result register slots of an ia32 node. */ @@ -856,7 +884,7 @@ const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) { */ unsigned get_ia32_exc_label(const ir_node *node) { const ia32_attr_t *attr = get_ia32_attr_const(node); - return attr->data.except_label; + return attr->data.has_except_label; } /** @@ -864,7 +892,27 @@ unsigned get_ia32_exc_label(const ir_node *node) { */ void set_ia32_exc_label(ir_node *node, unsigned flag) { ia32_attr_t *attr = get_ia32_attr(node); - attr->data.except_label = flag; + attr->data.has_except_label = flag; +} + +/** + * Return the exception label id. + */ +ir_label_t get_ia32_exc_label_id(const ir_node *node) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + + assert(attr->data.has_except_label); + return attr->exc_label; +} + +/** + * Assign the exception label id. + */ +void set_ia32_exc_label_id(ir_node *node, ir_label_t id) { + ia32_attr_t *attr = get_ia32_attr(node); + + assert(attr->data.has_except_label); + attr->exc_label = id; } #ifndef NDEBUG @@ -993,7 +1041,7 @@ void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags, const arch_register_req_t **in_reqs, const arch_register_req_t **out_reqs, const be_execution_unit_t ***execution_units, - int n_res, unsigned latency) + int n_res) { ir_graph *irg = get_irn_irg(node); struct obstack *obst = get_irg_obstack(irg); @@ -1002,7 +1050,6 @@ void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags, set_ia32_flags(node, flags); set_ia32_in_req_all(node, in_reqs); set_ia32_out_req_all(node, out_reqs); - set_ia32_latency(node, latency); attr->exec_units = execution_units; #ifndef NDEBUG @@ -1123,7 +1170,7 @@ int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) { if (a->data.tp != b->data.tp) return 1; - if (a->data.except_label != b->data.except_label) + if (a->data.has_except_label != b->data.has_except_label) return 1; if (a->data.ins_permuted != b->data.ins_permuted @@ -1201,6 +1248,15 @@ int ia32_compare_asm_attr(ir_node *a, ir_node *b) return 0; } +/** + * Hash function for Immediates + */ +static unsigned ia32_hash_Immediate(const ir_node *irn) { + const ia32_immediate_attr_t *a = get_ia32_immediate_attr_const(irn); + + return HASH_PTR(a->symconst) + (a->sc_sign << 16) + a->offset; +} + /** Compare node attributes for Immediates. */ static int ia32_compare_immediate_attr(ir_node *a, ir_node *b)