X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_map_regs.c;h=df14074121712efe67531dc9d9800b3ee250aef8;hb=efdb09dd64658e15cd9fd2599884bfe72bba7fd2;hp=2083d25661aa123b8359b66272be0179b5d6499d;hpb=bf27182dad1cb8762178a0cd18a9c473e046c2f2;p=libfirm diff --git a/ir/be/ia32/ia32_map_regs.c b/ir/be/ia32/ia32_map_regs.c index 2083d2566..df1407412 100644 --- a/ir/be/ia32/ia32_map_regs.c +++ b/ir/be/ia32/ia32_map_regs.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved. + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. * * This file is part of libFirm. * @@ -23,9 +23,7 @@ * @author Christian Wuerdig * @version $Id$ */ -#ifdef HAVE_CONFIG_H #include "config.h" -#endif #include @@ -34,95 +32,15 @@ #include "ia32_map_regs.h" #include "ia32_new_nodes.h" +#include "ia32_architecture.h" #include "gen_ia32_regalloc_if.h" #include "bearch_ia32_t.h" -#include "../benodesets.h" -#define MAXNUM_GPREG_ARGS 3 -#define MAXNUM_SSE_ARGS 5 +/* this is the order of the assigned registers used for parameter passing */ -/* this is the order of the assigned registers usesd for parameter passing */ -const arch_register_t *gpreg_param_reg_std[] = { - &ia32_gp_regs[REG_EAX], - &ia32_gp_regs[REG_EDX], - &ia32_gp_regs[REG_ECX], - &ia32_gp_regs[REG_EBX], - &ia32_gp_regs[REG_EDI], - &ia32_gp_regs[REG_ESI] -}; - -const arch_register_t *gpreg_param_reg_this[] = { - &ia32_gp_regs[REG_ECX], - &ia32_gp_regs[REG_EAX], - &ia32_gp_regs[REG_EDX], - &ia32_gp_regs[REG_EBX], - &ia32_gp_regs[REG_EDI], - &ia32_gp_regs[REG_ESI] -}; - -const arch_register_t *fpreg_sse_param_reg_std[] = { - &ia32_xmm_regs[REG_XMM0], - &ia32_xmm_regs[REG_XMM1], - &ia32_xmm_regs[REG_XMM2], - &ia32_xmm_regs[REG_XMM3], - &ia32_xmm_regs[REG_XMM4], - &ia32_xmm_regs[REG_XMM5], - &ia32_xmm_regs[REG_XMM6], - &ia32_xmm_regs[REG_XMM7] -}; - -const arch_register_t *fpreg_sse_param_reg_this[] = { - NULL, /* in case of a "this" pointer, the first parameter must not be a float */ - &ia32_xmm_regs[REG_XMM0], - &ia32_xmm_regs[REG_XMM1], - &ia32_xmm_regs[REG_XMM2], - &ia32_xmm_regs[REG_XMM3], - &ia32_xmm_regs[REG_XMM4], - &ia32_xmm_regs[REG_XMM5], - &ia32_xmm_regs[REG_XMM6], - &ia32_xmm_regs[REG_XMM7] -}; - - - -/* Mapping to store registers in firm nodes */ - -struct ia32_irn_reg_assoc { - const ir_node *irn; - const arch_register_t *reg; -}; - -int ia32_cmp_irn_reg_assoc(const void *a, const void *b, size_t len) { - const struct ia32_irn_reg_assoc *x = a; - const struct ia32_irn_reg_assoc *y = b; - (void) len; - - return x->irn != y->irn; -} - -static struct ia32_irn_reg_assoc *get_irn_reg_assoc(const ir_node *irn, set *reg_set) { - struct ia32_irn_reg_assoc templ; - unsigned int hash; - - templ.irn = irn; - templ.reg = NULL; - hash = nodeset_hash(irn); - - return set_insert(reg_set, &templ, sizeof(templ), hash); -} - -void ia32_set_firm_reg(ir_node *irn, const arch_register_t *reg, set *reg_set) { - struct ia32_irn_reg_assoc *assoc = get_irn_reg_assoc(irn, reg_set); - assoc->reg = reg; -} - -const arch_register_t *ia32_get_firm_reg(const ir_node *irn, set *reg_set) { - struct ia32_irn_reg_assoc *assoc = get_irn_reg_assoc(irn, reg_set); - return assoc->reg; -} - -void ia32_build_16bit_reg_map(pmap *reg_map) { +void ia32_build_16bit_reg_map(pmap *reg_map) +{ pmap_insert(reg_map, &ia32_gp_regs[REG_EAX], "ax"); pmap_insert(reg_map, &ia32_gp_regs[REG_EBX], "bx"); pmap_insert(reg_map, &ia32_gp_regs[REG_ECX], "cx"); @@ -133,21 +51,24 @@ void ia32_build_16bit_reg_map(pmap *reg_map) { pmap_insert(reg_map, &ia32_gp_regs[REG_ESP], "sp"); } -void ia32_build_8bit_reg_map(pmap *reg_map) { +void ia32_build_8bit_reg_map(pmap *reg_map) +{ pmap_insert(reg_map, &ia32_gp_regs[REG_EAX], "al"); pmap_insert(reg_map, &ia32_gp_regs[REG_EBX], "bl"); pmap_insert(reg_map, &ia32_gp_regs[REG_ECX], "cl"); pmap_insert(reg_map, &ia32_gp_regs[REG_EDX], "dl"); } -void ia32_build_8bit_reg_map_high(pmap *reg_map) { +void ia32_build_8bit_reg_map_high(pmap *reg_map) +{ pmap_insert(reg_map, &ia32_gp_regs[REG_EAX], "ah"); pmap_insert(reg_map, &ia32_gp_regs[REG_EBX], "bh"); pmap_insert(reg_map, &ia32_gp_regs[REG_ECX], "ch"); pmap_insert(reg_map, &ia32_gp_regs[REG_EDX], "dh"); } -const char *ia32_get_mapped_reg_name(pmap *reg_map, const arch_register_t *reg) { +const char *ia32_get_mapped_reg_name(pmap *reg_map, const arch_register_t *reg) +{ pmap_entry *e = pmap_find(reg_map, (void *)reg); //assert(e && "missing map init?"); @@ -158,38 +79,3 @@ const char *ia32_get_mapped_reg_name(pmap *reg_map, const arch_register_t *reg) return e->value; } - -/** - * Returns the register for parameter nr. - */ -const arch_register_t *ia32_get_RegParam_reg(ia32_code_gen_t *cg, unsigned cc, - size_t nr, const ir_mode *mode) -{ - if(! (cc & cc_reg_param)) - return NULL; - - if(mode_is_float(mode)) { - if(!USE_SSE2(cg)) - return NULL; - if(nr >= MAXNUM_SSE_ARGS) - return NULL; - - if(cc & cc_this_call) { - return fpreg_sse_param_reg_this[nr]; - } - return fpreg_sse_param_reg_std[nr]; - } else if(mode_is_int(mode) || mode_is_reference(mode)) { - if(get_mode_size_bits(mode) > 32) - return NULL; - - if(nr >= MAXNUM_GPREG_ARGS) - return NULL; - - if(cc & cc_this_call) { - return gpreg_param_reg_this[nr]; - } - return gpreg_param_reg_std[nr]; - } - - panic("unknown argument mode"); -}