X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_map_regs.c;h=49110979b11f8bab8e98520d74523e4692bdbd6f;hb=bc7b5ee69d084e629590a6977b79a2fab7cd1aa1;hp=8c94426462c4ebe0e0ae780c37759276b0eeb418;hpb=9c9aa4c39f524635f26bb014bd4a83013a304166;p=libfirm

diff --git a/ir/be/ia32/ia32_map_regs.c b/ir/be/ia32/ia32_map_regs.c
index 8c9442646..49110979b 100644
--- a/ir/be/ia32/ia32_map_regs.c
+++ b/ir/be/ia32/ia32_map_regs.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 1995-2007 University of Karlsruhe.  All right reserved.
+ * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
  *
  * This file is part of libFirm.
  *
@@ -23,9 +23,7 @@
  * @author      Christian Wuerdig
  * @version     $Id$
  */
-#ifdef HAVE_CONFIG_H
 #include "config.h"
-#endif
 
 #include <stdlib.h>
 
@@ -34,46 +32,34 @@
 
 #include "ia32_map_regs.h"
 #include "ia32_new_nodes.h"
+#include "ia32_architecture.h"
 #include "gen_ia32_regalloc_if.h"
 #include "bearch_ia32_t.h"
-#include "../benodesets.h"
 
-static int maxnum_gpreg_args = 3;   /* maximum number of int arguments passed in registers; default 3 */
-static int maxnum_sse_args = 5;   /* maximum number of float arguments passed in registers; default 5 */
+#define MAXNUM_GPREG_ARGS     3
+#define MAXNUM_SSE_ARGS       8
 
-/* this is the order of the assigned registers usesd for parameter passing */
+/* this is the order of the assigned registers used for parameter passing */
 
-const arch_register_t *gpreg_param_reg_std[] = {
-	&ia32_gp_regs[REG_EAX],
-	&ia32_gp_regs[REG_EDX],
+static const arch_register_t *gpreg_param_reg_fastcall[] = {
 	&ia32_gp_regs[REG_ECX],
-	&ia32_gp_regs[REG_EBX],
-	&ia32_gp_regs[REG_EDI],
-	&ia32_gp_regs[REG_ESI]
+	&ia32_gp_regs[REG_EDX],
+	NULL
 };
 
-const arch_register_t *gpreg_param_reg_this[] = {
-	&ia32_gp_regs[REG_ECX],
+static const arch_register_t *gpreg_param_reg_regparam[] = {
 	&ia32_gp_regs[REG_EAX],
 	&ia32_gp_regs[REG_EDX],
-	&ia32_gp_regs[REG_EBX],
-	&ia32_gp_regs[REG_EDI],
-	&ia32_gp_regs[REG_ESI]
+	&ia32_gp_regs[REG_ECX]
 };
 
-const arch_register_t *fpreg_sse_param_reg_std[] = {
-	&ia32_xmm_regs[REG_XMM0],
-	&ia32_xmm_regs[REG_XMM1],
-	&ia32_xmm_regs[REG_XMM2],
-	&ia32_xmm_regs[REG_XMM3],
-	&ia32_xmm_regs[REG_XMM4],
-	&ia32_xmm_regs[REG_XMM5],
-	&ia32_xmm_regs[REG_XMM6],
-	&ia32_xmm_regs[REG_XMM7]
+static const arch_register_t *gpreg_param_reg_this[] = {
+	&ia32_gp_regs[REG_ECX],
+	NULL,
+	NULL
 };
 
-const arch_register_t *fpreg_sse_param_reg_this[] = {
-	NULL,  /* in case of a "this" pointer, the first parameter must not be a float */
+static const arch_register_t *fpreg_sse_param_reg_std[] = {
 	&ia32_xmm_regs[REG_XMM0],
 	&ia32_xmm_regs[REG_XMM1],
 	&ia32_xmm_regs[REG_XMM2],
@@ -84,6 +70,9 @@ const arch_register_t *fpreg_sse_param_reg_this[] = {
 	&ia32_xmm_regs[REG_XMM7]
 };
 
+static const arch_register_t *fpreg_sse_param_reg_this[] = {
+	NULL,  /* in case of a "this" pointer, the first parameter must not be a float */
+};
 
 
 /* Mapping to store registers in firm nodes */
@@ -96,6 +85,7 @@ struct ia32_irn_reg_assoc {
 int ia32_cmp_irn_reg_assoc(const void *a, const void *b, size_t len) {
 	const struct ia32_irn_reg_assoc *x = a;
 	const struct ia32_irn_reg_assoc *y = b;
+	(void) len;
 
 	return x->irn != y->irn;
 }
@@ -106,7 +96,7 @@ static struct ia32_irn_reg_assoc *get_irn_reg_assoc(const ir_node *irn, set *reg
 
 	templ.irn = irn;
 	templ.reg = NULL;
-	hash = nodeset_hash(irn);
+	hash      = hash_irn(irn);
 
 	return set_insert(reg_set, &templ, sizeof(templ), hash);
 }
@@ -158,67 +148,46 @@ const char *ia32_get_mapped_reg_name(pmap *reg_map, const arch_register_t *reg)
 	return e->value;
 }
 
-/**
- * Check all parameters and determine the maximum number of parameters
- * to pass in gp regs resp. in fp regs.
- */
-int ia32_get_n_regparam_class(ia32_code_gen_t *cg, int n, ir_mode **modes)
-{
-	int i;
-	int max_fp_regs;
-	int n_int       = 0;
-	int n_float     = 0;
-
-	if(USE_SSE2(cg)) {
-		max_fp_regs = maxnum_sse_args;
-	} else {
-		max_fp_regs = 0;
-	}
-
-	for (i = 0; i < n; i++) {
-		if (mode_is_int(modes[i]) || mode_is_reference(modes[i])) {
-			++n_int;
-		} else if (mode_is_float(modes[i])) {
-			++n_float;
-		} else {
-			panic("Unknown parameter mode encountered");
-		}
-
-		if (n_int >= maxnum_gpreg_args || n_float >= max_fp_regs)
-			break;
-	}
-
-	return i;
-}
-
-
 /**
  * Returns the register for parameter nr.
- *
- * @param n     The number of parameters
- * @param modes The list of the parameter modes
- * @param nr    The number of the parameter to return the requirements for
- * @param cc    The calling convention
- * @return      The register
  */
-const arch_register_t *ia32_get_RegParam_reg(ia32_code_gen_t *cg, unsigned cc,
-                                             unsigned nr, ir_mode *mode)
+const arch_register_t *ia32_get_RegParam_reg(unsigned cc, size_t nr,
+                                             const ir_mode *mode)
 {
-	if(mode_is_float(mode)) {
-		if(!USE_SSE2(cg))
+	if (! (cc & cc_reg_param))
+		return NULL;
+
+	if (mode_is_float(mode)) {
+		if (!ia32_cg_config.use_sse2 || (cc & cc_fpreg_param) == 0)
 			return NULL;
-		assert(nr < maxnum_sse_args);
-		if(cc & cc_this_call) {
+		if (nr >= MAXNUM_SSE_ARGS)
+			return NULL;
+
+		if (cc & cc_this_call) {
 			return fpreg_sse_param_reg_this[nr];
 		}
 		return fpreg_sse_param_reg_std[nr];
-	}
+	} else if (mode_is_int(mode) || mode_is_reference(mode)) {
+		unsigned num_regparam;
 
-	assert(mode_is_int(mode) || mode_is_reference(mode));
+		if (get_mode_size_bits(mode) > 32)
+			return NULL;
 
-	if(cc & cc_this_call) {
-		assert(nr < maxnum_gpreg_args);
-		return gpreg_param_reg_this[nr];
+		if (nr >= MAXNUM_GPREG_ARGS)
+			return NULL;
+
+		if (cc & cc_this_call) {
+			return gpreg_param_reg_this[nr];
+		}
+		num_regparam = cc & ~cc_bits;
+		if (num_regparam == 0) {
+			/* default fastcall */
+			return gpreg_param_reg_fastcall[nr];
+		}
+		if (nr < num_regparam)
+			return gpreg_param_reg_regparam[nr];
+		return NULL;
 	}
-	return gpreg_param_reg_std[nr];
+
+	panic("unknown argument mode");
 }