X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_intrinsics.c;h=a2dc0619a3c5c6df9e75b25cd303e1d018a5ed27;hb=0f4eb60a2e04ea5205276589b8f43171816965be;hp=88c02f27fd0dfa170d09da020744d82ecb1ddac6;hpb=ed00af335a4266f1b2573bb0463ec3c7ad39f125;p=libfirm diff --git a/ir/be/ia32/ia32_intrinsics.c b/ir/be/ia32/ia32_intrinsics.c index 88c02f27f..a2dc0619a 100644 --- a/ir/be/ia32/ia32_intrinsics.c +++ b/ir/be/ia32/ia32_intrinsics.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved. + * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved. * * This file is part of libFirm. * @@ -24,9 +24,7 @@ * @author Michael Beck * @version $Id$ */ -#ifdef HAVE_CONFIG_H #include "config.h" -#endif #include "irgmod.h" #include "irop.h" @@ -44,8 +42,8 @@ /** The array of all intrinsics that must be mapped. */ static i_record *intrinsics; -/** An array to cache all entities */ -static ir_entity *i_ents[iro_MaxOpcode]; +/** An array to cache all entities. */ +static ir_entity *i_ents[iro_Last + 1]; /* * Maps all intrinsic calls that the backend support @@ -120,9 +118,9 @@ static int map_Add(ir_node *call, void *ctx) { /* l_res = a_l + b_l */ /* h_res = a_h + b_h + carry */ - add_low = new_rd_ia32_l_Add(dbg, irg, block, a_l, b_l, mode_T); + add_low = new_bd_ia32_l_Add(dbg, block, a_l, b_l, mode_T); flags = new_r_Proj(irg, block, add_low, mode_flags, pn_ia32_flags); - add_high = new_rd_ia32_l_Adc(dbg, irg, block, a_h, b_h, flags, h_mode); + add_high = new_bd_ia32_l_Adc(dbg, block, a_h, b_h, flags, h_mode); l_res = new_r_Proj(irg, block, add_low, l_mode, pn_ia32_res); h_res = add_high; @@ -155,9 +153,9 @@ static int map_Sub(ir_node *call, void *ctx) /* l_res = a_l - b_l */ /* h_res = a_h - b_h - carry */ - sub_low = new_rd_ia32_l_Sub(dbg, irg, block, a_l, b_l, mode_T); + sub_low = new_bd_ia32_l_Sub(dbg, block, a_l, b_l, mode_T); flags = new_r_Proj(irg, block, sub_low, mode_flags, pn_ia32_flags); - sub_high = new_rd_ia32_l_Sbb(dbg, irg, block, a_h, b_h, flags, h_mode); + sub_high = new_bd_ia32_l_Sbb(dbg, block, a_h, b_h, flags, h_mode); l_res = new_r_Proj(irg, block, sub_low, l_mode, pn_ia32_res); h_res = sub_high; @@ -193,14 +191,14 @@ static int map_Shl(ir_node *call, void *ctx) { need to reduce the constant here, this is done by the hardware. */ ir_node *conv = new_rd_Conv(dbg, irg, block, a_l, h_mode); h_res = new_rd_Shl(dbg, irg, block, conv, cnt, h_mode); - l_res = new_rd_Const(dbg, irg, block, l_mode, get_mode_null(l_mode)); + l_res = new_rd_Const(dbg, irg, l_mode, get_mode_null(l_mode)); } else { /* h_res = SHLD a_h, a_l, cnt */ - h_res = new_rd_ia32_l_ShlD(dbg, irg, block, a_h, a_l, cnt, h_mode); + h_res = new_bd_ia32_l_ShlD(dbg, block, a_h, a_l, cnt, h_mode); /* l_res = SHL a_l, cnt */ - l_res = new_rd_ia32_l_ShlDep(dbg, irg, block, a_l, cnt, h_res, l_mode); + l_res = new_bd_ia32_l_ShlDep(dbg, block, a_l, cnt, h_res, l_mode); } resolve_call(call, l_res, h_res, irg, block); @@ -211,15 +209,15 @@ static int map_Shl(ir_node *call, void *ctx) { upper = get_nodes_block(call); /* h_res = SHLD a_h, a_l, cnt */ - h1 = new_rd_ia32_l_ShlD(dbg, irg, upper, a_h, a_l, cnt, h_mode); + h1 = new_bd_ia32_l_ShlD(dbg, upper, a_h, a_l, cnt, h_mode); /* l_res = SHL a_l, cnt */ - l1 = new_rd_ia32_l_ShlDep(dbg, irg, upper, a_l, cnt, h1, l_mode); + l1 = new_bd_ia32_l_ShlDep(dbg, upper, a_l, cnt, h1, l_mode); c_mode = get_irn_mode(cnt); - irn = new_r_Const_long(irg, upper, c_mode, 32); + irn = new_r_Const_long(irg, c_mode, 32); irn = new_rd_And(dbg, irg, upper, cnt, irn, c_mode); - irn = new_rd_Cmp(dbg, irg, upper, irn, new_r_Const(irg, upper, c_mode, get_mode_null(c_mode))); + irn = new_rd_Cmp(dbg, irg, upper, irn, new_r_Const(irg, c_mode, get_mode_null(c_mode))); irn = new_r_Proj(irg, upper, irn, mode_b, pn_Cmp_Eq); cond = new_rd_Cond(dbg, irg, upper, irn); @@ -229,7 +227,7 @@ static int map_Shl(ir_node *call, void *ctx) { /* the block for cnt >= 32 */ n_block = new_rd_Block(dbg, irg, 1, &in[1]); h2 = new_rd_Conv(dbg, irg, n_block, l1, h_mode); - l2 = new_r_Const(irg, n_block, l_mode, get_mode_null(l_mode)); + l2 = new_r_Const(irg, l_mode, get_mode_null(l_mode)); in[1] = new_r_Jmp(irg, n_block); set_irn_in(block, 2, in); @@ -237,13 +235,13 @@ static int map_Shl(ir_node *call, void *ctx) { in[0] = l1; in[1] = l2; l_res = new_r_Phi(irg, block, 2, in, l_mode); - set_irn_link(block, l_res); + set_Block_phis(block, l_res); in[0] = h1; in[1] = h2; h_res = new_r_Phi(irg, block, 2, in, h_mode); - set_irn_link(l_res, h_res); - set_irn_link(h_res, NULL); + set_Phi_next(l_res, h_res); + set_Phi_next(h_res, NULL); /* move it down */ set_nodes_block(call, block); @@ -280,14 +278,14 @@ static int map_Shr(ir_node *call, void *ctx) { /* simplest case: shift only the higher bits. Note that there is no need to reduce the constant here, this is done by the hardware. */ ir_node *conv = new_rd_Conv(dbg, irg, block, a_h, l_mode); - h_res = new_rd_Const(dbg, irg, block, h_mode, get_mode_null(h_mode)); + h_res = new_rd_Const(dbg, irg, h_mode, get_mode_null(h_mode)); l_res = new_rd_Shr(dbg, irg, block, conv, cnt, l_mode); } else { /* l_res = SHRD a_h:a_l, cnt */ - l_res = new_rd_ia32_l_ShrD(dbg, irg, block, a_l, a_h, cnt, l_mode); + l_res = new_bd_ia32_l_ShrD(dbg, block, a_l, a_h, cnt, l_mode); /* h_res = SHR a_h, cnt */ - h_res = new_rd_ia32_l_ShrDep(dbg, irg, block, a_h, cnt, l_res, h_mode); + h_res = new_bd_ia32_l_ShrDep(dbg, block, a_h, cnt, l_res, h_mode); } resolve_call(call, l_res, h_res, irg, block); return 1; @@ -297,15 +295,15 @@ static int map_Shr(ir_node *call, void *ctx) { upper = get_nodes_block(call); /* l_res = SHRD a_h:a_l, cnt */ - l1 = new_rd_ia32_l_ShrD(dbg, irg, upper, a_l, a_h, cnt, l_mode); + l1 = new_bd_ia32_l_ShrD(dbg, upper, a_l, a_h, cnt, l_mode); /* h_res = SHR a_h, cnt */ - h1 = new_rd_ia32_l_ShrDep(dbg, irg, upper, a_h, cnt, l1, h_mode); + h1 = new_bd_ia32_l_ShrDep(dbg, upper, a_h, cnt, l1, h_mode); c_mode = get_irn_mode(cnt); - irn = new_r_Const_long(irg, upper, c_mode, 32); + irn = new_r_Const_long(irg, c_mode, 32); irn = new_rd_And(dbg, irg, upper, cnt, irn, c_mode); - irn = new_rd_Cmp(dbg, irg, upper, irn, new_r_Const(irg, upper, c_mode, get_mode_null(c_mode))); + irn = new_rd_Cmp(dbg, irg, upper, irn, new_r_Const(irg, c_mode, get_mode_null(c_mode))); irn = new_r_Proj(irg, upper, irn, mode_b, pn_Cmp_Eq); cond = new_rd_Cond(dbg, irg, upper, irn); @@ -315,7 +313,7 @@ static int map_Shr(ir_node *call, void *ctx) { /* the block for cnt >= 32 */ n_block = new_rd_Block(dbg, irg, 1, &in[1]); l2 = new_rd_Conv(dbg, irg, n_block, h1, l_mode); - h2 = new_r_Const(irg, n_block, l_mode, get_mode_null(h_mode)); + h2 = new_r_Const(irg, h_mode, get_mode_null(h_mode)); in[1] = new_r_Jmp(irg, n_block); set_irn_in(block, 2, in); @@ -323,13 +321,13 @@ static int map_Shr(ir_node *call, void *ctx) { in[0] = l1; in[1] = l2; l_res = new_r_Phi(irg, block, 2, in, l_mode); - set_irn_link(block, l_res); + set_Block_phis(block, l_res); in[0] = h1; in[1] = h2; h_res = new_r_Phi(irg, block, 2, in, h_mode); - set_irn_link(l_res, h_res); - set_irn_link(h_res, NULL); + set_Phi_next(l_res, h_res); + set_Phi_next(h_res, NULL); /* move it down */ set_nodes_block(call, block); @@ -368,14 +366,14 @@ static int map_Shrs(ir_node *call, void *ctx) { ir_node *conv = new_rd_Conv(dbg, irg, block, a_h, l_mode); ir_mode *c_mode = get_irn_mode(cnt); - h_res = new_rd_Shrs(dbg, irg, block, a_h, new_r_Const_long(irg, block, c_mode, 31), h_mode); + h_res = new_rd_Shrs(dbg, irg, block, a_h, new_r_Const_long(irg, c_mode, 31), h_mode); l_res = new_rd_Shrs(dbg, irg, block, conv, cnt, l_mode); } else { /* l_res = SHRD a_h:a_l, cnt */ - l_res = new_rd_ia32_l_ShrD(dbg, irg, block, a_l, a_h, cnt, l_mode); + l_res = new_bd_ia32_l_ShrD(dbg, block, a_l, a_h, cnt, l_mode); /* h_res = SAR a_h, cnt */ - h_res = new_rd_ia32_l_SarDep(dbg, irg, block, a_h, cnt, l_res, h_mode); + h_res = new_bd_ia32_l_SarDep(dbg, block, a_h, cnt, l_res, h_mode); } resolve_call(call, l_res, h_res, irg, block); return 1; @@ -385,15 +383,15 @@ static int map_Shrs(ir_node *call, void *ctx) { upper = get_nodes_block(call); /* l_res = SHRD a_h:a_l, cnt */ - l1 = new_rd_ia32_l_ShrD(dbg, irg, upper, a_l, a_h, cnt, l_mode); + l1 = new_bd_ia32_l_ShrD(dbg, upper, a_l, a_h, cnt, l_mode); /* h_res = SAR a_h, cnt */ - h1 = new_rd_ia32_l_SarDep(dbg, irg, upper, a_h, cnt, l1, h_mode); + h1 = new_bd_ia32_l_SarDep(dbg, upper, a_h, cnt, l1, h_mode); c_mode = get_irn_mode(cnt); - irn = new_r_Const_long(irg, upper, c_mode, 32); + irn = new_r_Const_long(irg, c_mode, 32); irn = new_rd_And(dbg, irg, upper, cnt, irn, c_mode); - irn = new_rd_Cmp(dbg, irg, upper, irn, new_r_Const(irg, upper, c_mode, get_mode_null(c_mode))); + irn = new_rd_Cmp(dbg, irg, upper, irn, new_r_Const(irg, c_mode, get_mode_null(c_mode))); irn = new_r_Proj(irg, upper, irn, mode_b, pn_Cmp_Eq); cond = new_rd_Cond(dbg, irg, upper, irn); @@ -403,7 +401,7 @@ static int map_Shrs(ir_node *call, void *ctx) { /* the block for cnt >= 32 */ n_block = new_rd_Block(dbg, irg, 1, &in[1]); l2 = new_rd_Conv(dbg, irg, n_block, h1, l_mode); - h2 = new_rd_Shrs(dbg, irg, n_block, a_h, new_r_Const_long(irg, block, c_mode, 31), h_mode); + h2 = new_rd_Shrs(dbg, irg, n_block, a_h, new_r_Const_long(irg, c_mode, 31), h_mode); in[1] = new_r_Jmp(irg, n_block); set_irn_in(block, 2, in); @@ -411,13 +409,13 @@ static int map_Shrs(ir_node *call, void *ctx) { in[0] = l1; in[1] = l2; l_res = new_r_Phi(irg, block, 2, in, l_mode); - set_irn_link(block, l_res); + set_Block_phis(block, l_res); in[0] = h1; in[1] = h2; h_res = new_r_Phi(irg, block, 2, in, h_mode); - set_irn_link(l_res, h_res); - set_irn_link(h_res, NULL); + set_Phi_next(l_res, h_res); + set_Phi_next(h_res, NULL); /* move it down */ set_nodes_block(call, block); @@ -491,14 +489,14 @@ static int map_Mul(ir_node *call, void *ctx) { /* handle the often used case of 32x32=64 mul */ if (is_sign_extend(a_l, a_h) && is_sign_extend(b_l, b_h)) { - mul = new_rd_ia32_l_IMul(dbg, irg, block, a_l, b_l); + mul = new_bd_ia32_l_IMul(dbg, block, a_l, b_l); h_res = new_rd_Proj(dbg, irg, block, mul, h_mode, pn_ia32_l_Mul_EDX); l_res = new_rd_Proj(dbg, irg, block, mul, l_mode, pn_ia32_l_Mul_EAX); goto end; } - mul = new_rd_ia32_l_Mul(dbg, irg, block, a_l, b_l); + mul = new_bd_ia32_l_Mul(dbg, block, a_l, b_l); pEDX = new_rd_Proj(dbg, irg, block, mul, h_mode, pn_ia32_l_Mul_EDX); l_res = new_rd_Proj(dbg, irg, block, mul, l_mode, pn_ia32_l_Mul_EAX); @@ -531,7 +529,7 @@ static int map_Minus(ir_node *call, void *ctx) { ir_node *l_res, *h_res, *res; (void) ctx; - res = new_rd_ia32_Minus64Bit(dbg, irg, block, a_l, a_h); + res = new_bd_ia32_Minus64Bit(dbg, block, a_l, a_h); l_res = new_r_Proj(irg, block, res, l_mode, pn_ia32_Minus64Bit_low_res); h_res = new_r_Proj(irg, block, res, h_mode, pn_ia32_Minus64Bit_high_res); @@ -580,10 +578,10 @@ static int map_Abs(ir_node *call, void *ctx) { sub_l = new_rd_Eor(dbg, irg, block, a_l, sign_l, l_mode); sub_h = new_rd_Eor(dbg, irg, block, a_h, sign, h_mode); - l_sub = new_rd_ia32_l_Sub(dbg, irg, block, sub_l, sign_l, mode_T); + l_sub = new_bd_ia32_l_Sub(dbg, block, sub_l, sign_l, mode_T); l_res = new_r_Proj(irg, block, l_sub, l_mode, pn_ia32_res); flags = new_r_Proj(irg, block, l_sub, mode_flags, pn_ia32_flags); - h_res = new_rd_ia32_l_Sbb(dbg, irg, block, sub_h, sign, flags, h_mode); + h_res = new_bd_ia32_l_Sbb(dbg, block, sub_h, sign, flags, h_mode); resolve_call(call, l_res, h_res, irg, block); @@ -634,7 +632,7 @@ static int map_Div(ir_node *call, void *ctx) { static int map_Mod(ir_node *call, void *ctx) { ia32_intrinsic_env_t *env = ctx; ir_type *method = get_Call_type(call); - ir_mode *h_mode = get_type_mode(get_method_res_type(method, 0)); + ir_mode *h_mode = get_type_mode(get_method_res_type(method, 1)); ir_node *ptr; ir_entity *ent; symconst_symbol sym; @@ -668,20 +666,18 @@ static int map_Mod(ir_node *call, void *ctx) { * Maps a Conv. */ static int map_Conv(ir_node *call, void *ctx) { - ia32_intrinsic_env_t *env = ctx; - ir_graph *irg = current_ir_graph; - dbg_info *dbg = get_irn_dbg_info(call); - ir_node *block = get_nodes_block(call); - ir_node **params = get_Call_param_arr(call); - ir_type *method = get_Call_type(call); - int n = get_Call_n_params(call); - int gp_bytes = get_mode_size_bytes(ia32_reg_classes[CLASS_ia32_gp].mode); - ir_entity *ent; - ir_node *l_res, *h_res, *frame, *fres; - ir_node *store_l, *store_h; - ir_node *op_mem[2], *mem; + ir_graph *irg = current_ir_graph; + dbg_info *dbg = get_irn_dbg_info(call); + ir_node *block = get_nodes_block(call); + ir_node **params = get_Call_param_arr(call); + ir_type *method = get_Call_type(call); + int n = get_Call_n_params(call); + ir_node *l_res, *h_res; + (void) ctx; if (n == 1) { + ir_node *float_to_ll; + /* We have a Conv float -> long long here */ ir_node *a_f = params[0]; ir_mode *l_res_mode = get_type_mode(get_method_res_type(method, 0)); @@ -689,60 +685,74 @@ static int map_Conv(ir_node *call, void *ctx) { assert(mode_is_float(get_irn_mode(a_f)) && "unexpected Conv call"); - /* allocate memory on frame to store args */ - ent = env->irg == irg ? env->d_ll_conv : NULL; - if (! ent) { - ent = env->d_ll_conv = frame_alloc_area(get_irg_frame_type(irg), 2 * gp_bytes, 16, 0); - env->irg = irg; - } + if (mode_is_signed(h_res_mode)) { + /* convert from float to signed 64bit */ + float_to_ll = new_bd_ia32_l_FloattoLL(dbg, block, a_f); - /* Store arg */ - frame = get_irg_frame(irg); + l_res = new_r_Proj(irg, block, float_to_ll, l_res_mode, + pn_ia32_l_FloattoLL_res_low); + h_res = new_r_Proj(irg, block, float_to_ll, h_res_mode, + pn_ia32_l_FloattoLL_res_high); + } else { + /* convert from float to signed 64bit */ + ir_mode *flt_mode = get_irn_mode(a_f); + tarval *flt_tv = new_tarval_from_str("9223372036854775808", 19, flt_mode); + ir_node *flt_corr = new_Const(flt_mode, flt_tv); + ir_node *lower_blk = block; + ir_node *upper_blk; + ir_node *cmp, *proj, *cond, *blk, *int_phi, *flt_phi; + ir_node *in[2]; - /* - Now we create a node to move the value from a XMM register into - x87 FPU because it is unknown here, which FPU is used. - This node is killed in transformation phase when not needed. - Otherwise it is split up into a movsd + fld - */ - a_f = new_rd_ia32_l_SSEtoX87(dbg, irg, block, frame, a_f, get_irg_no_mem(irg), mode_D); - set_ia32_frame_ent(a_f, ent); - set_ia32_use_frame(a_f); - set_ia32_ls_mode(a_f, mode_D); + part_block(call); + upper_blk = get_nodes_block(call); - if (mode_is_signed(h_res_mode)) { - /* a float to signed conv, the simple case */ - - /* store from FPU as Int */ - a_f = new_rd_ia32_l_vfist(dbg, irg, block, frame, a_f, get_irg_no_mem(irg)); - set_ia32_frame_ent(a_f, ent); - set_ia32_use_frame(a_f); - set_ia32_ls_mode(a_f, mode_Ls); - mem = a_f; - - /* load low part of the result */ - l_res = new_rd_ia32_l_Load(dbg, irg, block, frame, mem); - set_ia32_frame_ent(l_res, ent); - set_ia32_use_frame(l_res); - set_ia32_ls_mode(l_res, l_res_mode); - l_res = new_r_Proj(irg, block, l_res, l_res_mode, pn_ia32_l_Load_res); - - /* load hight part of the result */ - h_res = new_rd_ia32_l_Load(dbg, irg, block, frame, mem); - set_ia32_frame_ent(h_res, ent); - add_ia32_am_offs_int(h_res, gp_bytes); - set_ia32_use_frame(h_res); - set_ia32_ls_mode(h_res, h_res_mode); - h_res = new_r_Proj(irg, block, h_res, h_res_mode, pn_ia32_l_Load_res); - } else { - /* a float to unsigned conv, more complicated */ - panic("Float->unsigned64 NYI\n"); - } + cmp = new_rd_Cmp(dbg, irg, upper_blk, a_f, flt_corr); + proj = new_r_Proj(irg, upper_blk, cmp, mode_b, pn_Cmp_Lt); + cond = new_rd_Cond(dbg, irg, upper_blk, proj); + in[0] = new_r_Proj(irg, upper_blk, cond, mode_X, pn_Cond_true); + in[1] = new_r_Proj(irg, upper_blk, cond, mode_X, pn_Cond_false); + blk = new_r_Block(irg, 1, &in[1]); + in[1] = new_r_Jmp(irg, blk); + + set_irn_in(lower_blk, 2, in); + + /* create to Phis */ + in[0] = new_Const(h_res_mode, get_mode_null(h_res_mode)); + in[1] = new_Const_long(h_res_mode, 0x80000000); + + int_phi = new_r_Phi(irg, lower_blk, 2, in, h_res_mode); + in[0] = a_f; + in[1] = new_rd_Sub(dbg, irg, upper_blk, a_f, flt_corr, flt_mode); + + flt_phi = new_r_Phi(irg, lower_blk, 2, in, flt_mode); + + /* fix Phi links for next part_block() */ + set_Block_phis(lower_blk, int_phi); + set_Phi_next(int_phi, flt_phi); + set_Phi_next(flt_phi, NULL); + + float_to_ll = new_bd_ia32_l_FloattoLL(dbg, lower_blk, flt_phi); + + l_res = new_r_Proj(irg, lower_blk, float_to_ll, l_res_mode, + pn_ia32_l_FloattoLL_res_low); + h_res = new_r_Proj(irg, lower_blk, float_to_ll, h_res_mode, + pn_ia32_l_FloattoLL_res_high); + + h_res = new_rd_Add(dbg, irg, lower_blk, h_res, int_phi, h_res_mode); + + /* move the call and its Proj's to the lower block */ + set_nodes_block(call, lower_blk); + + for (proj = get_irn_link(call); proj != NULL; proj = get_irn_link(proj)) + set_nodes_block(proj, lower_blk); + block = lower_blk; + } /* lower the call */ resolve_call(call, l_res, h_res, irg, block); - } - else if (n == 2) { + } else if (n == 2) { + ir_node *ll_to_float; + /* We have a Conv long long -> float here */ ir_node *a_l = params[BINOP_Left_Low]; ir_node *a_h = params[BINOP_Left_High]; @@ -751,57 +761,12 @@ static int map_Conv(ir_node *call, void *ctx) { assert(! mode_is_float(get_irn_mode(a_l)) && ! mode_is_float(get_irn_mode(a_h))); - /* allocate memory on frame to store args */ - ent = env->irg == irg ? env->ll_d_conv : NULL; - if (! ent) { - ent = env->ll_d_conv = frame_alloc_area(get_irg_frame_type(irg), 2 * gp_bytes, 16, 0); - env->irg = irg; - } - - /* Store arg */ - frame = get_irg_frame(irg); - - /* store first arg (low part) */ - store_l = new_rd_ia32_l_Store(dbg, irg, block, frame, a_l, get_irg_no_mem(irg)); - set_ia32_frame_ent(store_l, ent); - set_ia32_use_frame(store_l); - set_ia32_ls_mode(store_l, get_irn_mode(a_l)); - op_mem[0] = store_l; - - /* store second arg (high part) */ - store_h = new_rd_ia32_l_Store(dbg, irg, block, frame, a_h, get_irg_no_mem(irg)); - set_ia32_frame_ent(store_h, ent); - add_ia32_am_offs_int(store_h, gp_bytes); - set_ia32_use_frame(store_h); - set_ia32_ls_mode(store_h, get_irn_mode(a_h)); - op_mem[1] = store_h; - - mem = new_r_Sync(irg, block, 2, op_mem); - - /* Load arg into x87 FPU (implicit convert) */ - fres = new_rd_ia32_l_vfild(dbg, irg, block, frame, mem); - set_ia32_frame_ent(fres, ent); - set_ia32_use_frame(fres); - set_ia32_ls_mode(fres, mode_D); - mem = new_r_Proj(irg, block, fres, mode_M, pn_ia32_l_vfild_M); - fres = new_r_Proj(irg, block, fres, fres_mode, pn_ia32_l_vfild_res); - - /* - Now we create a node to move the loaded value into a XMM - register because it is unknown here, which FPU is used. - This node is killed in transformation phase when not needed. - Otherwise it is split up into a fst + movsd - */ - fres = new_rd_ia32_l_X87toSSE(dbg, irg, block, frame, fres, mem, fres_mode); - set_ia32_frame_ent(fres, ent); - set_ia32_use_frame(fres); - set_ia32_ls_mode(fres, fres_mode); + ll_to_float = new_bd_ia32_l_LLtoFloat(dbg, block, a_h, a_l, fres_mode); /* lower the call */ - resolve_call(call, fres, NULL, irg, block); - } - else { - assert(0 && "unexpected Conv call"); + resolve_call(call, ll_to_float, NULL, irg, block); + } else { + panic("unexpected Conv call %+F", call); } return 1; @@ -872,7 +837,7 @@ ir_entity *ia32_create_intrinsic_fkt(ir_type *method, const ir_op *op, if (ent && ! *ent) { #define IDENT(s) new_id_from_chars(s, sizeof(s)-1) - ident *id = mangle(IDENT("L"), get_op_ident(op)); + ident *id = id_mangle(IDENT("L"), get_op_ident(op)); *ent = new_entity(get_glob_type(), id, method); }