X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_intrinsics.c;h=738b66773d68e61e5ca48a3bc01dbb2894b4a9da;hb=6981dd3274e6753e50f66c8cbe17b37bd41708e5;hp=a77ce9abadb918a21e6358eab23f086838d9e955;hpb=b2d5fe7c1210acc77a73cc2f146d8dd9761fe3ec;p=libfirm diff --git a/ir/be/ia32/ia32_intrinsics.c b/ir/be/ia32/ia32_intrinsics.c index a77ce9aba..738b66773 100644 --- a/ir/be/ia32/ia32_intrinsics.c +++ b/ir/be/ia32/ia32_intrinsics.c @@ -27,7 +27,7 @@ static i_record *intrinsics; /** An array to cache all entities */ -static entity *i_ents[iro_MaxOpcode]; +static ir_entity *i_ents[iro_MaxOpcode]; /* * Maps all intrinsic calls that the backend support @@ -132,12 +132,12 @@ static int map_Shl(ir_node *call, void *ctx) { ir_node *l_res, *h_res; /* h_res = SHLD a_h, a_l, cnt */ - l_res = new_rd_ia32_l_ShlD(dbg, irg, block, a_h, a_l, cnt, l_res_mode); + h_res = new_rd_ia32_l_ShlD(dbg, irg, block, a_h, a_l, cnt, l_res_mode); /* l_res = SHL a_l, cnt */ - h_res = new_rd_ia32_l_Shl(dbg, irg, block, a_l, cnt, h_res_mode); + l_res = new_rd_ia32_l_Shl(dbg, irg, block, a_l, cnt, h_res_mode); - add_irn_dep(h_res, l_res); + //add_irn_dep(l_res, h_res); resolve_call(call, l_res, h_res, irg, block); return 1; @@ -165,7 +165,7 @@ static int map_Shr(ir_node *call, void *ctx) { /* h_res = SHR a_h, cnt */ h_res = new_rd_ia32_l_Shr(dbg, irg, block, a_h, cnt, h_res_mode); - add_irn_dep(h_res, l_res); + //add_irn_dep(h_res, l_res); resolve_call(call, l_res, h_res, irg, block); return 1; @@ -191,9 +191,9 @@ static int map_Shrs(ir_node *call, void *ctx) { l_res = new_rd_ia32_l_ShrD(dbg, irg, block, a_l, a_h, cnt, l_res_mode); /* h_res = SAR a_h, cnt */ - h_res = new_rd_ia32_l_Shrs(dbg, irg, block, a_h, cnt, h_res_mode); + h_res = new_rd_ia32_l_Sar(dbg, irg, block, a_h, cnt, h_res_mode); - add_irn_dep(h_res, l_res); + //add_irn_dep(h_res, l_res); resolve_call(call, l_res, h_res, irg, block); return 1; @@ -225,14 +225,13 @@ static int map_Mul(ir_node *call, void *ctx) { t3 = a_l * b_h h_res = t2 + t3 */ - mul = new_rd_ia32_l_MulS(dbg, irg, block, a_l, b_l); - set_ia32_res_mode(mul, l_res_mode); - pEDX = new_rd_Proj(dbg, irg, block, mul, l_res_mode, pn_ia32_l_MulS_EDX); - l_res = new_rd_Proj(dbg, irg, block, mul, l_res_mode, pn_ia32_l_MulS_EAX); + mul = new_rd_ia32_l_Mul(dbg, irg, block, a_l, b_l); + pEDX = new_rd_Proj(dbg, irg, block, mul, l_res_mode, pn_ia32_l_Mul_EDX); + l_res = new_rd_Proj(dbg, irg, block, mul, l_res_mode, pn_ia32_l_Mul_EAX); - mul = new_rd_ia32_l_Mul(dbg, irg, block, a_h, b_l, h_res_mode); + mul = new_rd_ia32_l_Mul(dbg, irg, block, a_h, b_l); add = new_rd_ia32_l_Add(dbg, irg, block, mul, pEDX, h_res_mode); - mul = new_rd_ia32_l_Mul(dbg, irg, block, a_l, b_h, h_res_mode); + mul = new_rd_ia32_l_Mul(dbg, irg, block, a_l, b_h); h_res = new_rd_ia32_l_Add(dbg, irg, block, add, mul, h_res_mode); resolve_call(call, l_res, h_res, irg, block); @@ -299,9 +298,9 @@ static int map_Abs(ir_node *call, void *ctx) { */ - sign = new_rd_ia32_l_Shrs(dbg, irg, block, a_h, new_Const_long(h_res_mode, 31), h_res_mode); - sub_l = new_rd_ia32_l_Eor(dbg, irg, block, a_l, sign, l_res_mode); - sub_h = new_rd_ia32_l_Eor(dbg, irg, block, a_h, sign, h_res_mode); + sign = new_rd_ia32_l_Sar(dbg, irg, block, a_h, new_Const_long(h_res_mode, 31), h_res_mode); + sub_l = new_rd_ia32_l_Xor(dbg, irg, block, a_l, sign, l_res_mode); + sub_h = new_rd_ia32_l_Xor(dbg, irg, block, a_h, sign, h_res_mode); res = new_rd_ia32_Sub64Bit(dbg, irg, block, sub_l, sub_h, sign, sign); l_res = new_r_Proj(irg, block, res, l_res_mode, pn_ia32_Sub64Bit_low_res); h_res = new_r_Proj(irg, block, res, h_res_mode, pn_ia32_Sub64Bit_high_res); @@ -311,32 +310,36 @@ static int map_Abs(ir_node *call, void *ctx) { return 1; } +typedef enum { + IA32_INTRINSIC_DIV, + IA32_INTRINSIC_MOD, +} ia32_intrinsic_divmod_t; + /** * Maps a Div/Mod (a_l, a_h, b_l, b_h) */ -static int DivMod_mapper(ir_node *call, void *ctx, int need_mod) { +static int DivMod_mapper(ir_node *call, void *ctx, ia32_intrinsic_divmod_t dmtp) { ia32_intrinsic_env_t *env = ctx; - ir_graph *irg = current_ir_graph; - dbg_info *dbg = get_irn_dbg_info(call); - ir_node *block = get_nodes_block(call); - ir_node **params = get_Call_param_arr(call); - ir_type *method = get_Call_type(call); - ir_node *a_l = params[BINOP_Left_Low]; - ir_node *a_h = params[BINOP_Left_High]; - ir_node *b_l = params[BINOP_Right_Low]; - ir_node *b_h = params[BINOP_Right_High]; - ir_mode *l_res_mode = get_type_mode(get_method_res_type(method, 0)); - ir_mode *h_res_mode = get_type_mode(get_method_res_type(method, 1)); - int mode_bytes = get_mode_size_bytes(ia32_reg_classes[CLASS_ia32_gp].mode); - entity *ent_a = env->irg == irg ? env->ll_div_op1 : NULL; - entity *ent_b = env->irg == irg ? env->ll_div_op2 : NULL; - ir_node *l_res, *h_res, *frame; - ir_node *store_l, *store_h; - ir_node *op_mem[2], *mem, *fa_mem, *fb_mem; - ir_node *fa, *fb, *fres; + ir_graph *irg = current_ir_graph; + dbg_info *dbg = get_irn_dbg_info(call); + ir_node *block = get_nodes_block(call); + ir_node **params = get_Call_param_arr(call); + ir_type *method = get_Call_type(call); + ir_node *a_l = params[BINOP_Left_Low]; + ir_node *a_h = params[BINOP_Left_High]; + ir_node *b_l = params[BINOP_Right_Low]; + ir_node *b_h = params[BINOP_Right_High]; + ir_mode *l_res_mode = get_type_mode(get_method_res_type(method, 0)); + ir_mode *h_res_mode = get_type_mode(get_method_res_type(method, 1)); + int mode_bytes = get_mode_size_bytes(ia32_reg_classes[CLASS_ia32_gp].mode); + ir_entity *ent_a = env->irg == irg ? env->ll_div_op1 : NULL; + ir_entity *ent_b = env->irg == irg ? env->ll_div_op2 : NULL; + ir_node *l_res, *h_res, *frame; + ir_node *store_l, *store_h; + ir_node *op_mem[2], *mem, *fa_mem, *fb_mem; + ir_node *fa, *fb, *fres; /* allocate memory on frame to store args */ - if (! ent_a) { ent_a = env->ll_div_op1 = frame_alloc_area(get_irg_frame_type(irg), 2 * mode_bytes, 16, 0); @@ -356,14 +359,14 @@ static int DivMod_mapper(ir_node *call, void *ctx, int need_mod) { set_ia32_frame_ent(store_l, ent_a); set_ia32_use_frame(store_l); set_ia32_ls_mode(store_l, get_irn_mode(a_l)); - op_mem[0] = new_r_Proj(irg, block, store_l, mode_M, pn_ia32_l_Store_M); + op_mem[0] = store_l; store_h = new_rd_ia32_l_Store(dbg, irg, block, frame, a_h, get_irg_no_mem(irg)); set_ia32_frame_ent(store_h, ent_a); add_ia32_am_offs_int(store_h, mode_bytes); set_ia32_use_frame(store_h); set_ia32_ls_mode(store_h, get_irn_mode(a_h)); - op_mem[1] = new_r_Proj(irg, block, store_h, mode_M, pn_ia32_l_Store_M); + op_mem[1] = store_h; mem = new_r_Sync(irg, block, 2, op_mem); @@ -373,21 +376,21 @@ static int DivMod_mapper(ir_node *call, void *ctx, int need_mod) { set_ia32_use_frame(fa); set_ia32_ls_mode(fa, mode_D); fa_mem = new_r_Proj(irg, block, fa, mode_M, pn_ia32_l_vfild_M); - fa = new_r_Proj(irg, block, fa, mode_D, pn_ia32_l_vfild_res); + fa = new_r_Proj(irg, block, fa, mode_E, pn_ia32_l_vfild_res); /* store second arg */ store_l = new_rd_ia32_l_Store(dbg, irg, block, frame, b_l, get_irg_no_mem(irg)); set_ia32_frame_ent(store_l, ent_b); set_ia32_use_frame(store_l); set_ia32_ls_mode(store_l, get_irn_mode(b_l)); - op_mem[0] = new_r_Proj(irg, block, store_l, mode_M, pn_ia32_l_Store_M); + op_mem[0] = store_l; store_h = new_rd_ia32_l_Store(dbg, irg, block, frame, b_h, get_irg_no_mem(irg)); set_ia32_frame_ent(store_h, ent_b); add_ia32_am_offs_int(store_h, mode_bytes); set_ia32_use_frame(store_h); set_ia32_ls_mode(store_h, get_irn_mode(b_h)); - op_mem[1] = new_r_Proj(irg, block, store_h, mode_M, pn_ia32_l_Store_M); + op_mem[1] = store_h; mem = new_r_Sync(irg, block, 2, op_mem); @@ -397,7 +400,7 @@ static int DivMod_mapper(ir_node *call, void *ctx, int need_mod) { set_ia32_use_frame(fb); set_ia32_ls_mode(fb, mode_D); fb_mem = new_r_Proj(irg, block, fb, mode_M, pn_ia32_l_vfild_M); - fb = new_r_Proj(irg, block, fb, mode_D, pn_ia32_l_vfild_res); + fb = new_r_Proj(irg, block, fb, mode_E, pn_ia32_l_vfild_res); op_mem[0] = fa_mem; op_mem[1] = fb_mem; @@ -405,13 +408,16 @@ static int DivMod_mapper(ir_node *call, void *ctx, int need_mod) { mem = new_r_Sync(irg, block, 2, op_mem); /* perform division */ - fres = new_rd_ia32_l_vfdiv(dbg, irg, block, fa, fb, mode_D); - - if (need_mod) { - /* we need modulo: mod = a - b * res */ - - fres = new_rd_ia32_l_vfmul(dbg, irg, block, fb, fres, mode_D); - fres = new_rd_ia32_l_vfsub(dbg, irg, block, fa, fres, mode_D); + switch (dmtp) { + case IA32_INTRINSIC_DIV: + fres = new_rd_ia32_l_vfdiv(dbg, irg, block, fa, fb); + fres = new_rd_Proj(dbg, irg, block, fres, mode_E, pn_ia32_l_vfdiv_res); + break; + case IA32_INTRINSIC_MOD: + fres = new_rd_ia32_l_vfprem(dbg, irg, block, fa, fb, mode_E); + break; + default: + assert(0); } /* store back result, we use ent_a here */ @@ -419,7 +425,7 @@ static int DivMod_mapper(ir_node *call, void *ctx, int need_mod) { set_ia32_frame_ent(fres, ent_a); set_ia32_use_frame(fres); set_ia32_ls_mode(fres, mode_D); - mem = new_r_Proj(irg, block, fres, mode_M, pn_ia32_l_vfist_M); + mem = fres; /* load low part of the result */ l_res = new_rd_ia32_l_Load(dbg, irg, block, frame, mem); @@ -443,11 +449,11 @@ static int DivMod_mapper(ir_node *call, void *ctx, int need_mod) { } static int map_Div(ir_node *call, void *ctx) { - return DivMod_mapper(call, ctx, 0); + return DivMod_mapper(call, ctx, IA32_INTRINSIC_DIV); } static int map_Mod(ir_node *call, void *ctx) { - return DivMod_mapper(call, ctx, 1); + return DivMod_mapper(call, ctx, IA32_INTRINSIC_MOD); } /** @@ -455,17 +461,17 @@ static int map_Mod(ir_node *call, void *ctx) { */ static int map_Conv(ir_node *call, void *ctx) { ia32_intrinsic_env_t *env = ctx; - ir_graph *irg = current_ir_graph; - dbg_info *dbg = get_irn_dbg_info(call); - ir_node *block = get_nodes_block(call); - ir_node **params = get_Call_param_arr(call); - ir_type *method = get_Call_type(call); - int n = get_Call_n_params(call); - int gp_bytes = get_mode_size_bytes(ia32_reg_classes[CLASS_ia32_gp].mode); - entity *ent; - ir_node *l_res, *h_res, *frame, *fres; - ir_node *store_l, *store_h; - ir_node *op_mem[2], *mem; + ir_graph *irg = current_ir_graph; + dbg_info *dbg = get_irn_dbg_info(call); + ir_node *block = get_nodes_block(call); + ir_node **params = get_Call_param_arr(call); + ir_type *method = get_Call_type(call); + int n = get_Call_n_params(call); + int gp_bytes = get_mode_size_bytes(ia32_reg_classes[CLASS_ia32_gp].mode); + ir_entity *ent; + ir_node *l_res, *h_res, *frame, *fres; + ir_node *store_l, *store_h; + ir_node *op_mem[2], *mem; if (n == 1) { /* We have a Conv float -> long long here */ @@ -501,7 +507,7 @@ static int map_Conv(ir_node *call, void *ctx) { set_ia32_frame_ent(a_f, ent); set_ia32_use_frame(a_f); set_ia32_ls_mode(a_f, mode_D); - mem = new_r_Proj(irg, block, a_f, mode_M, pn_ia32_l_vfist_M); + mem = a_f; /* load low part of the result */ l_res = new_rd_ia32_l_Load(dbg, irg, block, frame, mem); @@ -546,7 +552,7 @@ static int map_Conv(ir_node *call, void *ctx) { set_ia32_frame_ent(store_l, ent); set_ia32_use_frame(store_l); set_ia32_ls_mode(store_l, get_irn_mode(a_l)); - op_mem[0] = new_r_Proj(irg, block, store_l, mode_M, pn_ia32_l_Store_M); + op_mem[0] = store_l; /* store second arg (high part) */ store_h = new_rd_ia32_l_Store(dbg, irg, block, frame, a_h, get_irg_no_mem(irg)); @@ -554,7 +560,7 @@ static int map_Conv(ir_node *call, void *ctx) { add_ia32_am_offs_int(store_h, gp_bytes); set_ia32_use_frame(store_h); set_ia32_ls_mode(store_h, get_irn_mode(a_h)); - op_mem[1] = new_r_Proj(irg, block, store_h, mode_M, pn_ia32_l_Store_M); + op_mem[1] = store_h; mem = new_r_Sync(irg, block, 2, op_mem); @@ -588,12 +594,12 @@ static int map_Conv(ir_node *call, void *ctx) { } /* Ia32 implementation of intrinsic mapping. */ -entity *ia32_create_intrinsic_fkt(ir_type *method, const ir_op *op, - const ir_mode *imode, const ir_mode *omode, - void *context) +ir_entity *ia32_create_intrinsic_fkt(ir_type *method, const ir_op *op, + const ir_mode *imode, const ir_mode *omode, + void *context) { i_record elt; - entity **ent = NULL; + ir_entity **ent = NULL; i_mapper_func mapper; if (! intrinsics)