X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_fpu.c;h=54e068037025dea5a47ccf1d08cc8a68a5ad2c90;hb=bd734c8925a048face4e8420228eb2deb3fc2154;hp=bb3ab792a93bdcceeb2833ce73e95a4628686fe1;hpb=2ba0d75357dc87479522d0db5b6e4ba6de5c9585;p=libfirm

diff --git a/ir/be/ia32/ia32_fpu.c b/ir/be/ia32/ia32_fpu.c
index bb3ab792a..54e068037 100644
--- a/ir/be/ia32/ia32_fpu.c
+++ b/ir/be/ia32/ia32_fpu.c
@@ -21,7 +21,6 @@
  * @file
  * @brief   Handles fpu rounding modes
  * @author  Matthias Braun
- * @version $Id$
  *
  * The problem we deal with here is that the x86 ABI says the user can control
  * the fpu rounding mode, which means that when we do some operations like float
@@ -40,15 +39,15 @@
 #include "tv.h"
 #include "array.h"
 
-#include "../beirgmod.h"
-#include "../bearch.h"
-#include "../besched.h"
-#include "../beabi.h"
-#include "../benode.h"
-#include "../bestate.h"
-#include "../beutil.h"
-#include "../bessaconstr.h"
-#include "../beirg.h"
+#include "beirgmod.h"
+#include "bearch.h"
+#include "besched.h"
+#include "beabi.h"
+#include "benode.h"
+#include "bestate.h"
+#include "beutil.h"
+#include "bessaconstr.h"
+#include "beirg.h"
 
 static ir_entity *fpcw_round    = NULL;
 static ir_entity *fpcw_truncate = NULL;
@@ -87,7 +86,6 @@ static void create_fpcw_entities(void)
 static ir_node *create_fpu_mode_spill(void *env, ir_node *state, int force,
                                       ir_node *after)
 {
-	ir_node *spill = NULL;
 	(void) env;
 
 	/* we don't spill the fpcw in unsafe mode */
@@ -107,17 +105,18 @@ static ir_node *create_fpu_mode_spill(void *env, ir_node *state, int force,
 		ir_node *noreg = ia32_new_NoReg_gp(irg);
 		ir_node *nomem = get_irg_no_mem(irg);
 		ir_node *frame = get_irg_frame(irg);
-
-		spill = new_bd_ia32_FnstCW(NULL, block, frame, noreg, nomem, state);
+		ir_node *spill
+			= new_bd_ia32_FnstCW(NULL, block, frame, noreg, nomem, state);
 		set_ia32_op_type(spill, ia32_AddrModeD);
 		/* use mode_Iu, as movl has a shorter opcode than movw */
 		set_ia32_ls_mode(spill, mode_Iu);
 		set_ia32_use_frame(spill);
 
 		sched_add_after(skip_Proj(after), spill);
+		return spill;
 	}
 
-	return spill;
+	return NULL;
 }
 
 static ir_node *create_fldcw_ent(ir_node *block, ir_entity *entity)
@@ -173,6 +172,7 @@ static ir_node *create_fpu_mode_reload(void *env, ir_node *state,
 		ir_mode *lsmode = ia32_reg_classes[CLASS_ia32_fp_cw].mode;
 		ir_node *nomem  = get_irg_no_mem(irg);
 		ir_node *cwstore, *load, *load_res, *orn, *store, *fldcw;
+		ir_node *store_proj;
 		ir_node *or_const;
 
 		assert(last_state != NULL);
@@ -204,9 +204,10 @@ static ir_node *create_fpu_mode_reload(void *env, ir_node *state,
 		/* use mode_Iu, as movl has a shorter opcode than movw */
 		set_ia32_ls_mode(store, mode_Iu);
 		set_ia32_use_frame(store);
+		store_proj = new_r_Proj(store, mode_M, pn_ia32_Store_M);
 		sched_add_before(before, store);
 
-		fldcw = new_bd_ia32_FldCW(NULL, block, frame, noreg, store);
+		fldcw = new_bd_ia32_FldCW(NULL, block, frame, noreg, store_proj);
 		set_ia32_op_type(fldcw, ia32_AddrModeS);
 		set_ia32_ls_mode(fldcw, lsmode);
 		set_ia32_use_frame(fldcw);
@@ -274,7 +275,7 @@ static void rewire_fpu_mode_nodes(ir_graph *irg)
 			be_liveness_update(lv, env.state_nodes[i]);
 		}
 	} else {
-		be_liveness_invalidate(be_get_irg_liveness(irg));
+		be_invalidate_live_sets(irg);
 	}
 
 	/* set registers for the phis */
@@ -287,7 +288,7 @@ static void rewire_fpu_mode_nodes(ir_graph *irg)
 	be_ssa_construction_destroy(&senv);
 	DEL_ARR_F(env.state_nodes);
 
-	be_liveness_invalidate(be_get_irg_liveness(irg));
+	be_invalidate_live_sets(irg);
 }
 
 void ia32_setup_fpu_mode(ir_graph *irg)