X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_fpu.c;h=0642c0d88f0012be1f45783d23f6c8a9e239e33d;hb=a1e9069afa4fa1e16e2d176bcd7905d6a1ed4677;hp=076cfcc9ab79847511d1842354fdb9c991cd9812;hpb=18814151f8c0ea17b2a7bf84c82ee3c2e66d6a6b;p=libfirm

diff --git a/ir/be/ia32/ia32_fpu.c b/ir/be/ia32/ia32_fpu.c
index 076cfcc9a..0642c0d88 100644
--- a/ir/be/ia32/ia32_fpu.c
+++ b/ir/be/ia32/ia32_fpu.c
@@ -87,8 +87,8 @@ static void create_fpcw_entities(void)
 static ir_node *create_fpu_mode_spill(void *env, ir_node *state, int force,
                                       ir_node *after)
 {
-	ia32_code_gen_t *cg = env;
 	ir_node *spill = NULL;
+	(void) env;
 
 	/* we don't spill the fpcw in unsafe mode */
 	if (ia32_cg_config.use_unsafe_floatconv) {
@@ -104,7 +104,7 @@ static ir_node *create_fpu_mode_spill(void *env, ir_node *state, int force,
 	if (force == 1 || !is_ia32_ChangeCW(state)) {
 		ir_graph *irg = get_irn_irg(state);
 		ir_node *block = get_nodes_block(state);
-		ir_node *noreg = ia32_new_NoReg_gp(cg);
+		ir_node *noreg = ia32_new_NoReg_gp(irg);
 		ir_node *nomem = new_NoMem();
 		ir_node *frame = get_irg_frame(irg);
 
@@ -120,11 +120,11 @@ static ir_node *create_fpu_mode_spill(void *env, ir_node *state, int force,
 	return spill;
 }
 
-static ir_node *create_fldcw_ent(ia32_code_gen_t *cg, ir_node *block,
-                                 ir_entity *entity)
+static ir_node *create_fldcw_ent(ir_node *block, ir_entity *entity)
 {
+	ir_graph *irg   = get_irn_irg(block);
 	ir_node  *nomem = new_NoMem();
-	ir_node  *noreg = ia32_new_NoReg_gp(cg);
+	ir_node  *noreg = ia32_new_NoReg_gp(irg);
 	ir_node  *reload;
 
 	reload = new_bd_ia32_FldCW(NULL, block, noreg, noreg, nomem);
@@ -141,21 +141,21 @@ static ir_node *create_fpu_mode_reload(void *env, ir_node *state,
                                        ir_node *spill, ir_node *before,
                                        ir_node *last_state)
 {
-	ia32_code_gen_t *cg    = env;
-	ir_graph        *irg   = get_irn_irg(state);
-	ir_node         *block = get_nodes_block(before);
-	ir_node         *frame = get_irg_frame(irg);
-	ir_node         *noreg = ia32_new_NoReg_gp(cg);
-	ir_node         *reload = NULL;
+	ir_graph *irg    = get_irn_irg(state);
+	ir_node  *block  = get_nodes_block(before);
+	ir_node  *frame  = get_irg_frame(irg);
+	ir_node  *noreg  = ia32_new_NoReg_gp(irg);
+	ir_node  *reload = NULL;
+	(void) env;
 
 	if (ia32_cg_config.use_unsafe_floatconv) {
 		if (fpcw_round == NULL) {
 			create_fpcw_entities();
 		}
 		if (spill != NULL) {
-			reload = create_fldcw_ent(cg, block, fpcw_round);
+			reload = create_fldcw_ent(block, fpcw_round);
 		} else {
-			reload = create_fldcw_ent(cg, block, fpcw_truncate);
+			reload = create_fldcw_ent(block, fpcw_truncate);
 		}
 		sched_add_before(before, reload);
 		return reload;
@@ -237,12 +237,11 @@ static void collect_fpu_mode_nodes_walker(ir_node *node, void *data)
 	}
 }
 
-static void rewire_fpu_mode_nodes(be_irg_t *birg)
+static void rewire_fpu_mode_nodes(ir_graph *irg)
 {
 	collect_fpu_mode_nodes_env_t env;
 	be_ssa_construction_env_t senv;
 	const arch_register_t *reg = &ia32_fp_cw_regs[REG_FPCW];
-	ir_graph *irg = be_get_birg_irg(birg);
 	ir_node *initial_value;
 	ir_node **phis;
 	be_lv_t *lv = be_get_irg_liveness(irg);
@@ -252,7 +251,7 @@ static void rewire_fpu_mode_nodes(be_irg_t *birg)
 	env.state_nodes = NEW_ARR_F(ir_node*, 0);
 	irg_walk_graph(irg, collect_fpu_mode_nodes_walker, NULL, &env);
 
-	initial_value = be_abi_get_ignore_irn(birg->abi, reg);
+	initial_value = be_abi_get_ignore_irn(be_get_irg_abi(irg), reg);
 
 	/* nothing needs to be done, in fact we must not continue as for endless
 	 * loops noone is using the initial_value and it will point to a bad node
@@ -276,7 +275,7 @@ static void rewire_fpu_mode_nodes(be_irg_t *birg)
 			be_liveness_update(lv, env.state_nodes[i]);
 		}
 	} else {
-		be_liveness_invalidate(birg->lv);
+		be_liveness_invalidate(be_get_irg_liveness(irg));
 	}
 
 	/* set registers for the phis */
@@ -292,12 +291,12 @@ static void rewire_fpu_mode_nodes(be_irg_t *birg)
 	be_liveness_invalidate(be_get_irg_liveness(irg));
 }
 
-void ia32_setup_fpu_mode(ia32_code_gen_t *cg)
+void ia32_setup_fpu_mode(ir_graph *irg)
 {
 	/* do ssa construction for the fpu modes */
-	rewire_fpu_mode_nodes(cg->birg);
+	rewire_fpu_mode_nodes(irg);
 
 	/* ensure correct fpu mode for operations */
-	be_assure_state(cg->birg, &ia32_fp_cw_regs[REG_FPCW],
-	                cg, create_fpu_mode_spill, create_fpu_mode_reload);
+	be_assure_state(irg, &ia32_fp_cw_regs[REG_FPCW],
+	                NULL, create_fpu_mode_spill, create_fpu_mode_reload);
 }