X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_finish.c;h=804202b8b633d5a0c414b0d8ea86197031ac271c;hb=4d66883acde3a424b3523610582e7391ed09a4dd;hp=15ec9ea3d09a57760fc7b5d424fc26c7f3ab32d0;hpb=0a2cfa0e6966cfaf4e479e30c75093274a809c9f;p=libfirm diff --git a/ir/be/ia32/ia32_finish.c b/ir/be/ia32/ia32_finish.c index 15ec9ea3d..804202b8b 100644 --- a/ir/be/ia32/ia32_finish.c +++ b/ir/be/ia32/ia32_finish.c @@ -1,9 +1,9 @@ /** - * This file implements functions to finalize the irg for emit. - * @author Christian Wuerdig - * $Id$ + * @file + * @brief This file implements functions to finalize the irg for emit. + * @author Christian Wuerdig + * @version $Id$ */ - #ifdef HAVE_CONFIG_H #include "config.h" #endif @@ -29,6 +29,8 @@ #include "ia32_optimize.h" #include "gen_ia32_regalloc_if.h" +DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;) + /** * Transforms a Sub or xSub into Neg--Add iff OUT_REG == SRC2_REG. * THIS FUNCTIONS MUST BE CALLED AFTER REGISTER ALLOCATION. @@ -65,12 +67,12 @@ static void ia32_transform_sub_to_neg_add(ir_node *irn, ia32_code_gen_t *cg) { /* generate the neg src2 */ if(mode_is_float(mode)) { int size; - ident *name; + ir_entity *entity; res = new_rd_ia32_xXor(dbg, irg, block, noreg, noreg, in2, noreg_fp, nomem); size = get_mode_size_bits(mode); - name = ia32_gen_fp_known_const(size == 32 ? ia32_SSIGN : ia32_DSIGN); - set_ia32_am_sc(res, name); + entity = ia32_gen_fp_known_const(size == 32 ? ia32_SSIGN : ia32_DSIGN); + set_ia32_am_sc(res, entity); set_ia32_op_type(res, ia32_AddrModeS); set_ia32_ls_mode(res, get_ia32_ls_mode(irn)); } else { @@ -294,7 +296,7 @@ static void ia32_finish_node(ir_node *irn, void *env) { } else { insert_copy: - DBG((cg->mod, LEVEL_1, "inserting copy for %+F in_pos %d\n", irn, same_pos)); + DBG((dbg, LEVEL_1, "inserting copy for %+F in_pos %d\n", irn, same_pos)); /* create copy from in register */ copy = be_new_Copy(arch_register_get_class(in_reg), cg->irg, block, in_node); @@ -423,7 +425,7 @@ static void fix_am_source(ir_node *irn, void *env) { /* insert the load into schedule */ sched_add_before(irn, load); - DBG((cg->mod, LEVEL_3, "irg %+F: build back AM source for node %+F, inserted load %+F\n", cg->irg, irn, load)); + DBG((dbg, LEVEL_3, "irg %+F: build back AM source for node %+F, inserted load %+F\n", cg->irg, irn, load)); load = new_r_Proj(cg->irg, block, load, ls_mode, pnres); arch_set_irn_register(cg->arch_env, load, out_reg); @@ -494,3 +496,8 @@ void ia32_finish_irg(ir_graph *irg, ia32_code_gen_t *cg) { } del_waitq(wq); } + +void ia32_init_finish(void) +{ + FIRM_DBG_REGISTER(dbg, "firm.be.ia32.finish"); +}