X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_finish.c;h=2e3519ceeda43ecaa4cc83f5f3e089260e976da3;hb=5427ad0b567409445284277a9c48d652179755ea;hp=09858aa536604a8548584bc9e84c0b2d5103bc9c;hpb=ca21c59ea00ff05918de26952e91ac39f1589e01;p=libfirm

diff --git a/ir/be/ia32/ia32_finish.c b/ir/be/ia32/ia32_finish.c
index 09858aa53..2e3519cee 100644
--- a/ir/be/ia32/ia32_finish.c
+++ b/ir/be/ia32/ia32_finish.c
@@ -41,7 +41,6 @@
 #include "bearch_ia32_t.h"
 #include "ia32_finish.h"
 #include "ia32_new_nodes.h"
-#include "ia32_map_regs.h"
 #include "ia32_common_transform.h"
 #include "ia32_transform.h"
 #include "ia32_dbg_stat.h"
@@ -51,10 +50,10 @@
 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
 
 /**
- * Transforms a Sub or xSub into Neg--Add iff OUT_REG == SRC2_REG.
+ * Transforms a Sub or xSub into Neg--Add iff OUT_REG != SRC1_REG && OUT_REG == SRC2_REG.
  * THIS FUNCTIONS MUST BE CALLED AFTER REGISTER ALLOCATION.
  */
-static void ia32_transform_sub_to_neg_add(ir_node *irn, ia32_code_gen_t *cg)
+static void ia32_transform_sub_to_neg_add(ir_node *irn)
 {
 	ir_graph *irg;
 	ir_node *in1, *in2, *noreg, *nomem, *res;
@@ -66,23 +65,25 @@ static void ia32_transform_sub_to_neg_add(ir_node *irn, ia32_code_gen_t *cg)
 	if (get_ia32_op_type(irn) != ia32_Normal)
 		return;
 
-	noreg    = ia32_new_NoReg_gp(cg);
-	noreg_fp = ia32_new_NoReg_xmm(cg);
-	nomem    = new_NoMem();
+	irg      = get_irn_irg(irn);
+	noreg    = ia32_new_NoReg_gp(irg);
+	noreg_fp = ia32_new_NoReg_xmm(irg);
+	nomem    = new_r_NoMem(irg);
 	in1      = get_irn_n(irn, n_ia32_binary_left);
 	in2      = get_irn_n(irn, n_ia32_binary_right);
 	in1_reg  = arch_get_irn_register(in1);
 	in2_reg  = arch_get_irn_register(in2);
 	out_reg  = arch_irn_get_register(irn, 0);
 
-	irg     = cg->irg;
-	block   = get_nodes_block(irn);
+	if (out_reg == in1_reg)
+		return;
 
 	/* in case of sub and OUT == SRC2 we can transform the sequence into neg src2 -- add */
 	if (out_reg != in2_reg)
 		return;
 
-	dbg = get_irn_dbg_info(irn);
+	block = get_nodes_block(irn);
+	dbg   = get_irn_dbg_info(irn);
 
 	/* generate the neg src2 */
 	if (is_ia32_xSub(irn)) {
@@ -109,7 +110,7 @@ static void ia32_transform_sub_to_neg_add(ir_node *irn, ia32_code_gen_t *cg)
 		set_ia32_ls_mode(res, get_ia32_ls_mode(irn));
 
 		/* exchange the add and the sub */
-		edges_reroute(irn, res, irg);
+		edges_reroute(irn, res);
 
 		/* add to schedule */
 		sched_add_before(irn, res);
@@ -147,12 +148,12 @@ static void ia32_transform_sub_to_neg_add(ir_node *irn, ia32_code_gen_t *cg)
 			set_ia32_commutative(res);
 
 			/* exchange the add and the sub */
-			edges_reroute(irn, res, irg);
+			edges_reroute(irn, res);
 
 			/* add to schedule */
 			sched_add_before(irn, res);
 		} else {
-			ir_node *stc, *cmc, *not, *adc;
+			ir_node *stc, *cmc, *nnot, *adc;
 			ir_node *adc_flags;
 
 			/*
@@ -164,24 +165,24 @@ static void ia32_transform_sub_to_neg_add(ir_node *irn, ia32_code_gen_t *cg)
 			 *
 			 * a + -b = a + (~b + 1)  would set the carry flag IF a == b ...
 			 */
-			not = new_bd_ia32_Not(dbg, block, in2);
-			arch_set_irn_register(not, in2_reg);
-			sched_add_before(irn, not);
+			nnot = new_bd_ia32_Not(dbg, block, in2);
+			arch_set_irn_register(nnot, in2_reg);
+			sched_add_before(irn, nnot);
 
 			stc = new_bd_ia32_Stc(dbg, block);
-			arch_set_irn_register(stc, &ia32_flags_regs[REG_EFLAGS]);
+			arch_set_irn_register(stc, &ia32_registers[REG_EFLAGS]);
 			sched_add_before(irn, stc);
 
-			adc = new_bd_ia32_Adc(dbg, block, noreg, noreg, nomem, not, in1, stc);
+			adc = new_bd_ia32_Adc(dbg, block, noreg, noreg, nomem, nnot, in1, stc);
 			arch_set_irn_register(adc, out_reg);
 			sched_add_before(irn, adc);
 
 			set_irn_mode(adc, mode_T);
 			adc_flags = new_r_Proj(adc, mode_Iu, pn_ia32_Adc_flags);
-			arch_set_irn_register(adc_flags, &ia32_flags_regs[REG_EFLAGS]);
+			arch_set_irn_register(adc_flags, &ia32_registers[REG_EFLAGS]);
 
 			cmc = new_bd_ia32_Cmc(dbg, block, adc_flags);
-			arch_set_irn_register(cmc, &ia32_flags_regs[REG_EFLAGS]);
+			arch_set_irn_register(cmc, &ia32_registers[REG_EFLAGS]);
 			sched_add_before(irn, cmc);
 
 			exchange(flags_proj, cmc);
@@ -238,18 +239,7 @@ static int get_first_same(const arch_register_req_t* req)
 	for (i = 0; i < 32; ++i) {
 		if (other & (1U << i)) return i;
 	}
-	assert(! "same position not found");
-	return 32;
-}
-
-static inline bool is_unknown_reg(const arch_register_t *reg)
-{
-	if (reg == &ia32_gp_regs[REG_GP_UKNWN]
-			|| reg == &ia32_xmm_regs[REG_XMM_UKNWN]
-			|| reg == &ia32_vfp_regs[REG_VFP_UKNWN])
-		return true;
-
-	return false;
+	panic("same position not found");
 }
 
 /**
@@ -292,9 +282,6 @@ static void assure_should_be_same_requirements(ir_node *node)
 		/* requirement already fulfilled? */
 		if (in_reg == out_reg)
 			continue;
-		/* unknowns can be changed to any register we want on emitting */
-		if (is_unknown_reg(in_reg))
-			continue;
 		cls = arch_register_get_class(in_reg);
 		assert(cls == arch_register_get_class(out_reg));
 
@@ -438,7 +425,7 @@ static void fix_am_source(ir_node *irn)
 				out_reg != arch_get_irn_register(get_irn_n(irn, n_ia32_index)))
 			continue;
 
-		load_res = turn_back_am(irn);
+		load_res = ia32_turn_back_am(irn);
 		arch_set_irn_register(load_res, out_reg);
 
 		DBG((dbg, LEVEL_3,
@@ -453,8 +440,8 @@ static void fix_am_source(ir_node *irn)
  */
 static void ia32_finish_irg_walker(ir_node *block, void *env)
 {
-	ia32_code_gen_t *cg = env;
 	ir_node *irn, *next;
+	(void) env;
 
 	/* first: turn back AM source if necessary */
 	for (irn = sched_first(block); ! sched_is_end(irn); irn = next) {
@@ -467,7 +454,7 @@ static void ia32_finish_irg_walker(ir_node *block, void *env)
 
 		/* check if there is a sub which need to be transformed */
 		if (is_ia32_Sub(irn) || is_ia32_xSub(irn)) {
-			ia32_transform_sub_to_neg_add(irn, cg);
+			ia32_transform_sub_to_neg_add(irn);
 		}
 	}
 
@@ -488,7 +475,7 @@ static void ia32_finish_irg_walker(ir_node *block, void *env)
  */
 static void ia32_push_on_queue_walker(ir_node *block, void *env)
 {
-	waitq *wq = env;
+	waitq *wq = (waitq*)env;
 	waitq_put(wq, block);
 }
 
@@ -496,7 +483,7 @@ static void ia32_push_on_queue_walker(ir_node *block, void *env)
 /**
  * Add Copy nodes for not fulfilled should_be_equal constraints
  */
-void ia32_finish_irg(ir_graph *irg, ia32_code_gen_t *cg)
+void ia32_finish_irg(ir_graph *irg)
 {
 	waitq *wq = new_waitq();
 
@@ -504,8 +491,8 @@ void ia32_finish_irg(ir_graph *irg, ia32_code_gen_t *cg)
 	irg_block_walk_graph(irg, NULL, ia32_push_on_queue_walker, wq);
 
 	while (! waitq_empty(wq)) {
-		ir_node *block = waitq_get(wq);
-		ia32_finish_irg_walker(block, cg);
+		ir_node *block = (ir_node*)waitq_get(wq);
+		ia32_finish_irg_walker(block, NULL);
 	}
 	del_waitq(wq);
 }