X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_emitter.c;h=feb720082cb7970429c687b133b693defab6cd12;hb=e86f1bc36650e0978d66ffb5fcd347a525840655;hp=131f441186eee541adcc26fc889a807196161c51;hpb=4d7ff7390a3db1ec53ed28076d187df97d6f844e;p=libfirm diff --git a/ir/be/ia32/ia32_emitter.c b/ir/be/ia32/ia32_emitter.c index 131f44118..feb720082 100644 --- a/ir/be/ia32/ia32_emitter.c +++ b/ir/be/ia32/ia32_emitter.c @@ -37,18 +37,20 @@ #include "irargs_t.h" #include "irprog_t.h" #include "iredges_t.h" +#include "irtools.h" #include "execfreq.h" #include "error.h" #include "raw_bitset.h" #include "dbginfo.h" +#include "lc_opts.h" -#include "../besched_t.h" +#include "../besched.h" #include "../benode_t.h" #include "../beabi.h" #include "../be_dbgout.h" #include "../beemitter.h" #include "../begnuas.h" -#include "../beirg_t.h" +#include "../beirg.h" #include "../be_dbgout.h" #include "ia32_emitter.h" @@ -68,10 +70,10 @@ DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;) static const ia32_isa_t *isa; static ia32_code_gen_t *cg; -static int do_pic; static char pic_base_label[128]; static ir_label_t exc_label_id; static int mark_spill_reload = 0; +static int do_pic; /** Return the next block in Block schedule */ static ir_node *get_prev_block_sched(const ir_node *block) @@ -79,6 +81,7 @@ static ir_node *get_prev_block_sched(const ir_node *block) return get_irn_link(block); } +/** Checks if the current block is a fall-through target. */ static int is_fallthrough(const ir_node *cfgpred) { ir_node *pred; @@ -92,11 +95,18 @@ static int is_fallthrough(const ir_node *cfgpred) return 1; } +/** + * returns non-zero if the given block needs a label + * because of being a jump-target (and not a fall-through) + */ static int block_needs_label(const ir_node *block) { int need_label = 1; int n_cfgpreds = get_Block_n_cfgpreds(block); + if (has_Block_entity(block)) + return 1; + if (n_cfgpreds == 0) { need_label = 0; } else if (n_cfgpreds == 1) { @@ -206,6 +216,9 @@ static char *get_unique_label(char *buf, size_t buflen, const char *prefix) * |_| |_| *************************************************************/ +/** + * Emit the name of the 8bit low register + */ static void emit_8bit_register(const arch_register_t *reg) { const char *reg_name = arch_register_get_name(reg); @@ -215,6 +228,18 @@ static void emit_8bit_register(const arch_register_t *reg) be_emit_char('l'); } +/** + * Emit the name of the 8bit high register + */ +static void emit_8bit_register_high(const arch_register_t *reg) +{ + const char *reg_name = arch_register_get_name(reg); + + be_emit_char('%'); + be_emit_char(reg_name[1]); + be_emit_char('h'); +} + static void emit_16bit_register(const arch_register_t *reg) { const char *reg_name = ia32_get_mapped_reg_name(isa->regs_16bit, reg); @@ -223,6 +248,12 @@ static void emit_16bit_register(const arch_register_t *reg) be_emit_string(reg_name); } +/** + * emit a register, possible shortened by a mode + * + * @param reg the register + * @param mode the mode of the register or NULL for full register + */ static void emit_register(const arch_register_t *reg, const ir_mode *mode) { const char *reg_name; @@ -251,11 +282,8 @@ void ia32_emit_source_register(const ir_node *node, int pos) static void ia32_emit_entity(ir_entity *entity, int no_pic_adjust) { - ident *id; - set_entity_backend_marked(entity, 1); - id = get_entity_ld_ident(entity); - be_emit_ident(id); + be_gas_emit_entity(entity); if (get_entity_owner(entity) == get_tls_type()) { if (get_entity_visibility(entity) == visibility_external_allocated) { @@ -265,8 +293,7 @@ static void ia32_emit_entity(ir_entity *entity, int no_pic_adjust) } } - if (!no_pic_adjust && do_pic) { - /* TODO: only do this when necessary */ + if (do_pic && !no_pic_adjust) { be_emit_char('-'); be_emit_string(pic_base_label); } @@ -279,7 +306,7 @@ static void emit_ia32_Immediate_no_prefix(const ir_node *node) if (attr->symconst != NULL) { if (attr->sc_sign) be_emit_char('-'); - ia32_emit_entity(attr->symconst, 0); + ia32_emit_entity(attr->symconst, attr->no_pic_adjust); } if (attr->symconst == NULL || attr->offset != 0) { if (attr->symconst != NULL) { @@ -299,7 +326,7 @@ static void emit_ia32_Immediate(const ir_node *node) void ia32_emit_8bit_source_register_or_immediate(const ir_node *node, int pos) { const arch_register_t *reg; - ir_node *in = get_irn_n(node, pos); + const ir_node *in = get_irn_n(node, pos); if (is_ia32_Immediate(in)) { emit_ia32_Immediate(in); return; @@ -309,6 +336,25 @@ void ia32_emit_8bit_source_register_or_immediate(const ir_node *node, int pos) emit_8bit_register(reg); } +void ia32_emit_8bit_high_source_register(const ir_node *node, int pos) +{ + const arch_register_t *reg = get_in_reg(node, pos); + emit_8bit_register_high(reg); +} + +void ia32_emit_16bit_source_register_or_immediate(const ir_node *node, int pos) +{ + const arch_register_t *reg; + const ir_node *in = get_irn_n(node, pos); + if (is_ia32_Immediate(in)) { + emit_ia32_Immediate(in); + return; + } + + reg = get_in_reg(node, pos); + emit_16bit_register(reg); +} + void ia32_emit_dest_register(const ir_node *node, int pos) { const arch_register_t *reg = get_out_reg(node, pos); @@ -316,6 +362,13 @@ void ia32_emit_dest_register(const ir_node *node, int pos) emit_register(reg, NULL); } +void ia32_emit_dest_register_size(const ir_node *node, int pos) +{ + const arch_register_t *reg = get_out_reg(node, pos); + + emit_register(reg, get_ia32_ls_mode(node)); +} + void ia32_emit_8bit_dest_register(const ir_node *node, int pos) { const arch_register_t *reg = get_out_reg(node, pos); @@ -411,11 +464,13 @@ void ia32_emit_xmm_mode_suffix_s(const ir_node *node) be_emit_char(get_xmm_mode_suffix(mode)); } -void ia32_emit_extend_suffix(const ir_mode *mode) +void ia32_emit_extend_suffix(const ir_node *node) { + ir_mode *mode = get_ia32_ls_mode(node); if (get_mode_size_bits(mode) == 32) return; be_emit_char(mode_is_signed(mode) ? 's' : 'z'); + ia32_emit_mode_suffix_mode(mode); } void ia32_emit_source_register_or_immediate(const ir_node *node, int pos) @@ -444,9 +499,9 @@ static ir_node *get_cfop_target_block(const ir_node *irn) */ static void ia32_emit_block_name(const ir_node *block) { - if (has_Block_label(block)) { - be_emit_string(be_gas_block_label_prefix()); - be_emit_irprintf("%lu", get_Block_label(block)); + if (has_Block_entity(block)) { + ir_entity *entity = get_Block_entity(block); + be_gas_emit_entity(entity); } else { be_emit_cstring(BLOCK_PREFIX); be_emit_irprintf("%ld", get_irn_node_nr(block)); @@ -490,10 +545,17 @@ static const char *const cmp2condition_u[] = { NULL /* always true */ }; +/** + * Emit the suffix for a compare instruction. + */ static void ia32_emit_cmp_suffix(int pnc) { const char *str; + if (pnc == ia32_pn_Cmp_parity) { + be_emit_char('p'); + return; + } if (pnc & ia32_pn_Cmp_float || pnc & ia32_pn_Cmp_unsigned) { str = cmp2condition_u[pnc & 7]; } else { @@ -505,9 +567,67 @@ static void ia32_emit_cmp_suffix(int pnc) typedef enum ia32_emit_mod_t { EMIT_RESPECT_LS = 1U << 0, - EMIT_ALTERNATE_AM = 1U << 1 + EMIT_ALTERNATE_AM = 1U << 1, + EMIT_LONG = 1U << 2 } ia32_emit_mod_t; +/** + * Emits address mode. + */ +void ia32_emit_am(const ir_node *node) +{ + ir_entity *ent = get_ia32_am_sc(node); + int offs = get_ia32_am_offs_int(node); + ir_node *base = get_irn_n(node, n_ia32_base); + int has_base = !is_ia32_NoReg_GP(base); + ir_node *index = get_irn_n(node, n_ia32_index); + int has_index = !is_ia32_NoReg_GP(index); + + /* just to be sure... */ + assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL); + + /* emit offset */ + if (ent != NULL) { + const ia32_attr_t *attr = get_ia32_attr_const(node); + if (is_ia32_am_sc_sign(node)) + be_emit_char('-'); + ia32_emit_entity(ent, attr->data.am_sc_no_pic_adjust); + } + + /* also handle special case if nothing is set */ + if (offs != 0 || (ent == NULL && !has_base && !has_index)) { + if (ent != NULL) { + be_emit_irprintf("%+d", offs); + } else { + be_emit_irprintf("%d", offs); + } + } + + if (has_base || has_index) { + be_emit_char('('); + + /* emit base */ + if (has_base) { + const arch_register_t *reg = get_in_reg(node, n_ia32_base); + emit_register(reg, NULL); + } + + /* emit index + scale */ + if (has_index) { + const arch_register_t *reg = get_in_reg(node, n_ia32_index); + int scale; + be_emit_char(','); + emit_register(reg, NULL); + + scale = get_ia32_am_scale(node); + if (scale > 0) { + be_emit_irprintf(",%d", 1 << scale); + } + } + be_emit_char(')'); + } +} + /** * fmt parameter output * ---- ---------------------- --------------------------------------------- @@ -524,10 +644,12 @@ typedef enum ia32_emit_mod_t { * %Sx source register x * %s const char* string * %u unsigned int unsigned int + * %d signed int signed int * * x starts at 0 * # modifier for %ASx, %D and %S uses ls mode of node to alter register width * * modifier does not prefix immediates with $, but AM with * + * l modifier for %lu and %ld */ static void ia32_emitf(const ir_node *node, const char *fmt, ...) { @@ -566,6 +688,11 @@ static void ia32_emitf(const ir_node *node, const char *fmt, ...) ++fmt; } + if (*fmt == 'l') { + mod |= EMIT_LONG; + ++fmt; + } + switch (*fmt++) { case '%': be_emit_char('%'); @@ -576,6 +703,7 @@ static void ia32_emitf(const ir_node *node, const char *fmt, ...) case 'M': if (mod & EMIT_ALTERNATE_AM) be_emit_char('*'); + ia32_emit_am(node); break; @@ -679,15 +807,29 @@ emit_S: break; } - case 'u': { - unsigned num = va_arg(ap, unsigned); - be_emit_irprintf("%u", num); + case 'u': + if (mod & EMIT_LONG) { + unsigned long num = va_arg(ap, unsigned long); + be_emit_irprintf("%lu", num); + } else { + unsigned num = va_arg(ap, unsigned); + be_emit_irprintf("%u", num); + } + break; + + case 'd': + if (mod & EMIT_LONG) { + long num = va_arg(ap, long); + be_emit_irprintf("%ld", num); + } else { + int num = va_arg(ap, int); + be_emit_irprintf("%d", num); + } break; - } default: unknown: - panic("unknown conversion"); + panic("unknown format conversion in ia32_emitf()"); } } @@ -750,62 +892,6 @@ void ia32_emit_unop(const ir_node *node, int pos) ia32_emitf(node, fmt); } -/** - * Emits address mode. - */ -void ia32_emit_am(const ir_node *node) -{ - ir_entity *ent = get_ia32_am_sc(node); - int offs = get_ia32_am_offs_int(node); - ir_node *base = get_irn_n(node, n_ia32_base); - int has_base = !is_ia32_NoReg_GP(base); - ir_node *index = get_irn_n(node, n_ia32_index); - int has_index = !is_ia32_NoReg_GP(index); - - /* just to be sure... */ - assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL); - - /* emit offset */ - if (ent != NULL) { - if (is_ia32_am_sc_sign(node)) - be_emit_char('-'); - ia32_emit_entity(ent, 0); - } - - /* also handle special case if nothing is set */ - if (offs != 0 || (ent == NULL && !has_base && !has_index)) { - if (ent != NULL) { - be_emit_irprintf("%+d", offs); - } else { - be_emit_irprintf("%d", offs); - } - } - - if (has_base || has_index) { - be_emit_char('('); - - /* emit base */ - if (has_base) { - const arch_register_t *reg = get_in_reg(node, n_ia32_base); - emit_register(reg, NULL); - } - - /* emit index + scale */ - if (has_index) { - const arch_register_t *reg = get_in_reg(node, n_ia32_index); - int scale; - be_emit_char(','); - emit_register(reg, NULL); - - scale = get_ia32_am_scale(node); - if (scale > 0) { - be_emit_irprintf(",%d", 1 << scale); - } - } - be_emit_char(')'); - } -} - static void emit_ia32_IMul(const ir_node *node) { ir_node *left = get_irn_n(node, n_ia32_IMul_left); @@ -904,6 +990,12 @@ static int determine_final_pnc(const ir_node *node, int flags_pos, return pnc; } +static pn_Cmp ia32_get_negated_pnc(pn_Cmp pnc) +{ + ir_mode *mode = pnc & ia32_pn_Cmp_float ? mode_F : mode_Iu; + return get_negated_pnc(pnc, mode); +} + void ia32_emit_cmp_suffix_node(const ir_node *node, int flags_pos) { @@ -912,13 +1004,8 @@ void ia32_emit_cmp_suffix_node(const ir_node *node, pn_Cmp pnc = get_ia32_condcode(node); pnc = determine_final_pnc(node, flags_pos, pnc); - if (attr->data.ins_permuted) { - if (pnc & ia32_pn_Cmp_float) { - pnc = get_negated_pnc(pnc, mode_F); - } else { - pnc = get_negated_pnc(pnc, mode_Iu); - } - } + if (attr->data.ins_permuted) + pnc = ia32_get_negated_pnc(pnc); ia32_emit_cmp_suffix(pnc); } @@ -990,11 +1077,7 @@ static void emit_ia32_Jcc(const ir_node *node) proj_true = proj_false; proj_false = t; - if (pnc & ia32_pn_Cmp_float) { - pnc = get_negated_pnc(pnc, mode_F); - } else { - pnc = get_negated_pnc(pnc, mode_Iu); - } + pnc = ia32_get_negated_pnc(pnc); } if (pnc & ia32_pn_Cmp_float) { @@ -1081,17 +1164,12 @@ static void emit_ia32_CMov(const ir_node *node) ia32_emitf(node, "\tmovl %R, %R\n", in_false, out); } - if (ins_permuted) { - if (pnc & ia32_pn_Cmp_float) { - pnc = get_negated_pnc(pnc, mode_F); - } else { - pnc = get_negated_pnc(pnc, mode_Iu); - } - } + if (ins_permuted) + pnc = ia32_get_negated_pnc(pnc); /* TODO: handling of Nans isn't correct yet */ - ia32_emitf(node, "\tcmov%P %AR, %#R\n", pnc, in_true, out); + ia32_emitf(node, "\tcmov%P %#AR, %#R\n", pnc, in_true, out); } /********************************************************* @@ -1270,7 +1348,7 @@ static const char* emit_asm_operand(const ir_node *node, const char *s) /* parse modifiers */ switch(c) { case 0: - ir_fprintf(stderr, "Warning: asm text (%+F) ends with %\n", node); + ir_fprintf(stderr, "Warning: asm text (%+F) ends with %%\n", node); be_emit_char('%'); return s + 1; case '%': @@ -1294,8 +1372,9 @@ static const char* emit_asm_operand(const ir_node *node, const char *s) case '9': break; default: - ir_fprintf(stderr, "Warning: asm text (%+F) contains unknown modifier " - "'%c' for asm op\n", node, c); + ir_fprintf(stderr, + "Warning: asm text (%+F) contains unknown modifier '%c' for asm op\n", + node, c); ++s; break; } @@ -1310,9 +1389,10 @@ static const char* emit_asm_operand(const ir_node *node, const char *s) s += p; } - if (num < 0 || num >= ARR_LEN(asm_regs)) { - ir_fprintf(stderr, "Error: Custom assembler references invalid " - "input/output (%+F)\n", node); + if (num < 0 || ARR_LEN(asm_regs) <= num) { + ir_fprintf(stderr, + "Error: Custom assembler references invalid input/output (%+F)\n", + node); return s; } asm_reg = & asm_regs[num]; @@ -1332,8 +1412,9 @@ static const char* emit_asm_operand(const ir_node *node, const char *s) reg = get_in_reg(node, asm_reg->inout_pos); } if (reg == NULL) { - ir_fprintf(stderr, "Warning: no register assigned for %d asm op " - "(%+F)\n", num, node); + ir_fprintf(stderr, + "Warning: no register assigned for %d asm op (%+F)\n", + num, node); return s; } @@ -1459,49 +1540,29 @@ static void emit_ia32_CopyB_i(const ir_node *node) /** * Emit code for conversions (I, FP), (FP, I) and (FP, FP). */ -static void emit_ia32_Conv_with_FP(const ir_node *node) +static void emit_ia32_Conv_with_FP(const ir_node *node, const char* conv_f, + const char* conv_d) { ir_mode *ls_mode = get_ia32_ls_mode(node); int ls_bits = get_mode_size_bits(ls_mode); - const char *conv; - - if (is_ia32_Conv_I2FP(node)) { - if (ls_bits == 32) { - conv = "si2ss"; - } else { - conv = "si2sd"; - } - } else if (is_ia32_Conv_FP2I(node)) { - if (ls_bits == 32) { - conv = "ss2si"; - } else { - conv = "sd2si"; - } - } else { - assert(is_ia32_Conv_FP2FP(node)); - if (ls_bits == 32) { - conv = "sd2ss"; - } else { - conv = "ss2sd"; - } - } + const char *conv = ls_bits == 32 ? conv_f : conv_d; ia32_emitf(node, "\tcvt%s %AS3, %D0\n", conv); } static void emit_ia32_Conv_I2FP(const ir_node *node) { - emit_ia32_Conv_with_FP(node); + emit_ia32_Conv_with_FP(node, "si2ss", "si2sd"); } static void emit_ia32_Conv_FP2I(const ir_node *node) { - emit_ia32_Conv_with_FP(node); + emit_ia32_Conv_with_FP(node, "ss2si", "sd2si"); } static void emit_ia32_Conv_FP2FP(const ir_node *node) { - emit_ia32_Conv_with_FP(node); + emit_ia32_Conv_with_FP(node, "sd2ss", "ss2sd"); } /** @@ -1510,25 +1571,13 @@ static void emit_ia32_Conv_FP2FP(const ir_node *node) static void emit_ia32_Conv_I2I(const ir_node *node) { ir_mode *smaller_mode = get_ia32_ls_mode(node); - int smaller_bits = get_mode_size_bits(smaller_mode); int signed_mode = mode_is_signed(smaller_mode); - const arch_register_t *eax = &ia32_gp_regs[REG_EAX]; + const char *sign_suffix; assert(!mode_is_float(smaller_mode)); - assert(smaller_bits == 8 || smaller_bits == 16); - - if (signed_mode && - smaller_bits == 16 && - ia32_cg_config.use_short_sex_eax && - eax == get_out_reg(node, 0) && - eax == arch_get_irn_register(get_irn_n(node, n_ia32_unary_op))) { - /* argument and result are both in EAX and signedness is ok: use the - * smaller cwtl opcode */ - ia32_emitf(node, "\tcwtl\n"); - } else { - const char *sign_suffix = signed_mode ? "s" : "z"; - ia32_emitf(node, "\tmov%s%Ml %#AS3, %D0\n", sign_suffix); - } + + sign_suffix = signed_mode ? "s" : "z"; + ia32_emitf(node, "\tmov%s%Ml %#AS3, %D0\n", sign_suffix); } /** @@ -1747,6 +1796,18 @@ static void emit_ia32_GetEIP(const ir_node *node) ia32_emitf(node, "\tpopl %D0\n"); } +static void emit_ia32_ClimbFrame(const ir_node *node) +{ + const ia32_climbframe_attr_t *attr = get_ia32_climbframe_attr_const(node); + + ia32_emitf(node, "\tmovl %S0, %D0\n"); + ia32_emitf(node, "\tmovl $%u, %S1\n", attr->count); + ia32_emitf(NULL, BLOCK_PREFIX "%ld:\n", get_irn_node_nr(node)); + ia32_emitf(node, "\tmovl (%D0), %D0\n"); + ia32_emitf(node, "\tdec %S1\n"); + ia32_emitf(node, "\tjnz " BLOCK_PREFIX "%ld\n", get_irn_node_nr(node)); +} + static void emit_be_Return(const ir_node *node) { unsigned pop = be_Return_get_pop(node); @@ -1811,6 +1872,7 @@ static void ia32_register_emitters(void) IA32_EMIT(LdTls); IA32_EMIT(Minus64Bit); IA32_EMIT(SwitchJmp); + IA32_EMIT(ClimbFrame); /* benode emitter */ BE_EMIT(Copy); @@ -1969,7 +2031,7 @@ static void ia32_emit_block_header(ir_node *block) int i, arity; ir_exec_freq *exec_freq = cg->birg->exec_freq; - if (block == get_irg_end_block(irg) || block == get_irg_start_block(irg)) + if (block == get_irg_end_block(irg)) return; if (ia32_cg_config.label_alignment > 0) { @@ -1998,7 +2060,7 @@ static void ia32_emit_block_header(ir_node *block) } } - if (need_label || has_Block_label(block)) { + if (need_label) { ia32_emit_block_name(block); be_emit_char(':'); @@ -2014,12 +2076,16 @@ static void ia32_emit_block_header(ir_node *block) /* emit list of pred blocks in comment */ arity = get_irn_arity(block); - for (i = 0; i < arity; ++i) { - ir_node *predblock = get_Block_cfgpred_block(block, i); - be_emit_irprintf(" %d", get_irn_node_nr(predblock)); + if (arity <= 0) { + be_emit_cstring(" none"); + } else { + for (i = 0; i < arity; ++i) { + ir_node *predblock = get_Block_cfgpred_block(block, i); + be_emit_irprintf(" %d", get_irn_node_nr(predblock)); + } } if (exec_freq != NULL) { - be_emit_irprintf(" freq: %f", + be_emit_irprintf(", freq: %f", get_block_execfreq(exec_freq, block)); } be_emit_cstring(" */\n");