X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_emitter.c;h=c6a7ec268d537e73d10119f2d8bb07aa62b2aa30;hb=ffb3cd49207934dfff98359a6fc6e05231384fa6;hp=babfd970a178075ec0b629913fefb8507bb8e809;hpb=fd07b1498438629b4ef81343573377e3e535048f;p=libfirm diff --git a/ir/be/ia32/ia32_emitter.c b/ir/be/ia32/ia32_emitter.c index babfd970a..c6a7ec268 100644 --- a/ir/be/ia32/ia32_emitter.c +++ b/ir/be/ia32/ia32_emitter.c @@ -23,9 +23,7 @@ * @author Christian Wuerdig, Matthias Braun * @version $Id$ */ -#ifdef HAVE_CONFIG_H #include "config.h" -#endif #include @@ -68,7 +66,6 @@ DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;) #define SNPRINTF_BUF_LEN 128 -static const arch_env_t *arch_env; static const ia32_isa_t *isa; static ia32_code_gen_t *cg; static int do_pic; @@ -129,7 +126,7 @@ static const arch_register_t *get_in_reg(const ir_node *irn, int pos) in register we need. */ op = get_irn_n(irn, pos); - reg = arch_get_irn_register(arch_env, op); + reg = arch_get_irn_register(op); assert(reg && "no in register found"); @@ -138,10 +135,7 @@ static const arch_register_t *get_in_reg(const ir_node *irn, int pos) /* in case of unknown register: just return a valid register */ if (reg == &ia32_gp_regs[REG_GP_UKNWN]) { - const arch_register_req_t *req; - - /* ask for the requirements */ - req = arch_get_register_req(arch_env, irn, pos); + const arch_register_req_t *req = arch_get_register_req(irn, pos); if (arch_register_req_is(req, limited)) { /* in case of limited requirements: get the first allowed register */ @@ -171,9 +165,9 @@ static const arch_register_t *get_out_reg(const ir_node *irn, int pos) if (get_irn_mode(irn) != mode_T) { assert(pos == 0); - reg = arch_get_irn_register(arch_env, irn); + reg = arch_get_irn_register(irn); } else if (is_ia32_irn(irn)) { - reg = get_ia32_out_reg(irn, pos); + reg = arch_irn_get_register(irn, pos); } else { const ir_edge_t *edge; @@ -181,7 +175,7 @@ static const arch_register_t *get_out_reg(const ir_node *irn, int pos) proj = get_edge_src_irn(edge); assert(is_Proj(proj) && "non-Proj from mode_T node"); if (get_Proj_proj(proj) == pos) { - reg = arch_get_irn_register(arch_env, proj); + reg = arch_get_irn_register(proj); break; } } @@ -468,54 +462,42 @@ static void ia32_emit_cfop_target(const ir_node *node) ia32_emit_block_name(block); } -/* - * coding of conditions - */ -struct cmp2conditon_t { - const char *name; - int num; -}; - /* * positive conditions for signed compares */ -static const struct cmp2conditon_t cmp2condition_s[] = { - { NULL, pn_Cmp_False }, /* always false */ - { "e", pn_Cmp_Eq }, /* == */ - { "l", pn_Cmp_Lt }, /* < */ - { "le", pn_Cmp_Le }, /* <= */ - { "g", pn_Cmp_Gt }, /* > */ - { "ge", pn_Cmp_Ge }, /* >= */ - { "ne", pn_Cmp_Lg }, /* != */ - { NULL, pn_Cmp_Leg}, /* always true */ +static const char *const cmp2condition_s[] = { + NULL, /* always false */ + "e", /* == */ + "l", /* < */ + "le", /* <= */ + "g", /* > */ + "ge", /* >= */ + "ne", /* != */ + NULL /* always true */ }; /* * positive conditions for unsigned compares */ -static const struct cmp2conditon_t cmp2condition_u[] = { - { NULL, pn_Cmp_False }, /* always false */ - { "e", pn_Cmp_Eq }, /* == */ - { "b", pn_Cmp_Lt }, /* < */ - { "be", pn_Cmp_Le }, /* <= */ - { "a", pn_Cmp_Gt }, /* > */ - { "ae", pn_Cmp_Ge }, /* >= */ - { "ne", pn_Cmp_Lg }, /* != */ - { NULL, pn_Cmp_Leg }, /* always true */ +static const char *const cmp2condition_u[] = { + NULL, /* always false */ + "e", /* == */ + "b", /* < */ + "be", /* <= */ + "a", /* > */ + "ae", /* >= */ + "ne", /* != */ + NULL /* always true */ }; static void ia32_emit_cmp_suffix(int pnc) { const char *str; - if ((pnc & ia32_pn_Cmp_float) || (pnc & ia32_pn_Cmp_unsigned)) { - pnc = pnc & 7; - assert(cmp2condition_u[pnc].num == pnc); - str = cmp2condition_u[pnc].name; + if (pnc & ia32_pn_Cmp_float || pnc & ia32_pn_Cmp_unsigned) { + str = cmp2condition_u[pnc & 7]; } else { - pnc = pnc & 7; - assert(cmp2condition_s[pnc].num == pnc); - str = cmp2condition_s[pnc].name; + str = cmp2condition_s[pnc & 7]; } be_emit_string(str); @@ -599,9 +581,9 @@ static void ia32_emitf(const ir_node *node, const char *fmt, ...) case 'R': { const arch_register_t *reg = va_arg(ap, const arch_register_t*); + if (mod & EMIT_ALTERNATE_AM) + be_emit_char('*'); if (get_ia32_op_type(node) == ia32_AddrModeS) { - if (mod & EMIT_ALTERNATE_AM) - be_emit_char('*'); ia32_emit_am(node); } else { emit_register(reg, NULL); @@ -681,7 +663,11 @@ emit_S: be_emit_char('$'); emit_ia32_Immediate_no_prefix(in); } else { - const arch_register_t *reg = get_in_reg(node, pos); + const arch_register_t *reg; + + if (mod & EMIT_ALTERNATE_AM) + be_emit_char('*'); + reg = get_in_reg(node, pos); emit_register(reg, mod & EMIT_RESPECT_LS ? get_ia32_ls_mode(node) : NULL); } break; @@ -918,6 +904,12 @@ static int determine_final_pnc(const ir_node *node, int flags_pos, return pnc; } +static pn_Cmp ia32_get_negated_pnc(pn_Cmp pnc) +{ + ir_mode *mode = pnc & ia32_pn_Cmp_float ? mode_F : mode_Iu; + return get_negated_pnc(pnc, mode); +} + void ia32_emit_cmp_suffix_node(const ir_node *node, int flags_pos) { @@ -926,13 +918,8 @@ void ia32_emit_cmp_suffix_node(const ir_node *node, pn_Cmp pnc = get_ia32_condcode(node); pnc = determine_final_pnc(node, flags_pos, pnc); - if (attr->data.ins_permuted) { - if (pnc & ia32_pn_Cmp_float) { - pnc = get_negated_pnc(pnc, mode_F); - } else { - pnc = get_negated_pnc(pnc, mode_Iu); - } - } + if (attr->data.ins_permuted) + pnc = ia32_get_negated_pnc(pnc); ia32_emit_cmp_suffix(pnc); } @@ -1004,11 +991,7 @@ static void emit_ia32_Jcc(const ir_node *node) proj_true = proj_false; proj_false = t; - if (pnc & ia32_pn_Cmp_float) { - pnc = get_negated_pnc(pnc, mode_F); - } else { - pnc = get_negated_pnc(pnc, mode_Iu); - } + pnc = ia32_get_negated_pnc(pnc); } if (pnc & ia32_pn_Cmp_float) { @@ -1067,17 +1050,15 @@ static void emit_ia32_CMov(const ir_node *node) { const ia32_attr_t *attr = get_ia32_attr_const(node); int ins_permuted = attr->data.ins_permuted; - const arch_register_t *out = arch_get_irn_register(arch_env, node); + const arch_register_t *out = arch_irn_get_register(node, pn_ia32_res); pn_Cmp pnc = get_ia32_condcode(node); const arch_register_t *in_true; const arch_register_t *in_false; pnc = determine_final_pnc(node, n_ia32_CMov_eflags, pnc); - in_true = arch_get_irn_register(arch_env, - get_irn_n(node, n_ia32_CMov_val_true)); - in_false = arch_get_irn_register(arch_env, - get_irn_n(node, n_ia32_CMov_val_false)); + in_true = arch_get_irn_register(get_irn_n(node, n_ia32_CMov_val_true)); + in_false = arch_get_irn_register(get_irn_n(node, n_ia32_CMov_val_false)); /* should be same constraint fullfilled? */ if (out == in_false) { @@ -1097,17 +1078,12 @@ static void emit_ia32_CMov(const ir_node *node) ia32_emitf(node, "\tmovl %R, %R\n", in_false, out); } - if (ins_permuted) { - if (pnc & ia32_pn_Cmp_float) { - pnc = get_negated_pnc(pnc, mode_F); - } else { - pnc = get_negated_pnc(pnc, mode_Iu); - } - } + if (ins_permuted) + pnc = ia32_get_negated_pnc(pnc); /* TODO: handling of Nans isn't correct yet */ - ia32_emitf(node, "\tcmov%P %AR, %#R\n", pnc, in_true, out); + ia32_emitf(node, "\tcmov%P %#AR, %#R\n", pnc, in_true, out); } /********************************************************* @@ -1286,7 +1262,7 @@ static const char* emit_asm_operand(const ir_node *node, const char *s) /* parse modifiers */ switch(c) { case 0: - ir_fprintf(stderr, "Warning: asm text (%+F) ends with %\n", node); + ir_fprintf(stderr, "Warning: asm text (%+F) ends with %%\n", node); be_emit_char('%'); return s + 1; case '%': @@ -1310,8 +1286,9 @@ static const char* emit_asm_operand(const ir_node *node, const char *s) case '9': break; default: - ir_fprintf(stderr, "Warning: asm text (%+F) contains unknown modifier " - "'%c' for asm op\n", node, c); + ir_fprintf(stderr, + "Warning: asm text (%+F) contains unknown modifier '%c' for asm op\n", + node, c); ++s; break; } @@ -1326,9 +1303,10 @@ static const char* emit_asm_operand(const ir_node *node, const char *s) s += p; } - if (num < 0 || num >= ARR_LEN(asm_regs)) { - ir_fprintf(stderr, "Error: Custom assembler references invalid " - "input/output (%+F)\n", node); + if (num < 0 || ARR_LEN(asm_regs) <= num) { + ir_fprintf(stderr, + "Error: Custom assembler references invalid input/output (%+F)\n", + node); return s; } asm_reg = & asm_regs[num]; @@ -1348,8 +1326,9 @@ static const char* emit_asm_operand(const ir_node *node, const char *s) reg = get_in_reg(node, asm_reg->inout_pos); } if (reg == NULL) { - ir_fprintf(stderr, "Warning: no register assigned for %d asm op " - "(%+F)\n", num, node); + ir_fprintf(stderr, + "Warning: no register assigned for %d asm op (%+F)\n", + num, node); return s; } @@ -1475,49 +1454,29 @@ static void emit_ia32_CopyB_i(const ir_node *node) /** * Emit code for conversions (I, FP), (FP, I) and (FP, FP). */ -static void emit_ia32_Conv_with_FP(const ir_node *node) +static void emit_ia32_Conv_with_FP(const ir_node *node, const char* conv_f, + const char* conv_d) { ir_mode *ls_mode = get_ia32_ls_mode(node); int ls_bits = get_mode_size_bits(ls_mode); - const char *conv; - - if (is_ia32_Conv_I2FP(node)) { - if (ls_bits == 32) { - conv = "si2ss"; - } else { - conv = "si2sd"; - } - } else if (is_ia32_Conv_FP2I(node)) { - if (ls_bits == 32) { - conv = "ss2si"; - } else { - conv = "sd2si"; - } - } else { - assert(is_ia32_Conv_FP2FP(node)); - if (ls_bits == 32) { - conv = "sd2ss"; - } else { - conv = "ss2sd"; - } - } + const char *conv = ls_bits == 32 ? conv_f : conv_d; ia32_emitf(node, "\tcvt%s %AS3, %D0\n", conv); } static void emit_ia32_Conv_I2FP(const ir_node *node) { - emit_ia32_Conv_with_FP(node); + emit_ia32_Conv_with_FP(node, "si2ss", "si2sd"); } static void emit_ia32_Conv_FP2I(const ir_node *node) { - emit_ia32_Conv_with_FP(node); + emit_ia32_Conv_with_FP(node, "ss2si", "sd2si"); } static void emit_ia32_Conv_FP2FP(const ir_node *node) { - emit_ia32_Conv_with_FP(node); + emit_ia32_Conv_with_FP(node, "sd2ss", "ss2sd"); } /** @@ -1526,23 +1485,13 @@ static void emit_ia32_Conv_FP2FP(const ir_node *node) static void emit_ia32_Conv_I2I(const ir_node *node) { ir_mode *smaller_mode = get_ia32_ls_mode(node); - int smaller_bits = get_mode_size_bits(smaller_mode); int signed_mode = mode_is_signed(smaller_mode); + const char *sign_suffix; assert(!mode_is_float(smaller_mode)); - assert(smaller_bits == 8 || smaller_bits == 16); - - if (signed_mode && - smaller_bits == 16 && - &ia32_gp_regs[REG_EAX] == get_out_reg(node, 0) && - &ia32_gp_regs[REG_EAX] == arch_get_irn_register(arch_env, get_irn_n(node, n_ia32_unary_op))) { - /* argument and result are both in EAX and signedness is ok: use the - * smaller cwtl opcode */ - ia32_emitf(node, "\tcwtl\n"); - } else { - const char *sign_suffix = signed_mode ? "s" : "z"; - ia32_emitf(node, "\tmov%s%Ml %#AS3, %D0\n", sign_suffix); - } + + sign_suffix = signed_mode ? "s" : "z"; + ia32_emitf(node, "\tmov%s%Ml %#AS3, %D0\n", sign_suffix); } /** @@ -1588,8 +1537,8 @@ static void emit_be_IncSP(const ir_node *node) */ static void Copy_emitter(const ir_node *node, const ir_node *op) { - const arch_register_t *in = arch_get_irn_register(arch_env, op); - const arch_register_t *out = arch_get_irn_register(arch_env, node); + const arch_register_t *in = arch_get_irn_register(op); + const arch_register_t *out = arch_get_irn_register(node); if (in == out) { return; @@ -1625,8 +1574,8 @@ static void emit_be_Perm(const ir_node *node) const arch_register_t *in0, *in1; const arch_register_class_t *cls0, *cls1; - in0 = arch_get_irn_register(arch_env, get_irn_n(node, 0)); - in1 = arch_get_irn_register(arch_env, get_irn_n(node, 1)); + in0 = arch_get_irn_register(get_irn_n(node, 0)); + in1 = arch_get_irn_register(get_irn_n(node, 1)); cls0 = arch_register_get_class(in0); cls1 = arch_register_get_class(in1); @@ -2112,8 +2061,7 @@ void ia32_gen_routine(ia32_code_gen_t *ia32_cg, ir_graph *irg) int i, n; cg = ia32_cg; - isa = (const ia32_isa_t*) cg->arch_env; - arch_env = cg->arch_env; + isa = cg->isa; do_pic = cg->birg->main_env->options->pic; ia32_register_emitters();