X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_emitter.c;h=a944b3cceb673697b83bee0e52843a13b701cffe;hb=b24c359be385d38d535efe35df5a937a8ee9cc0c;hp=c502d1b4327e8ef3e3796977144eb4c88a58850b;hpb=ab1618f4bbc67155c4ccba5d1b44a194b5362baa;p=libfirm

diff --git a/ir/be/ia32/ia32_emitter.c b/ir/be/ia32/ia32_emitter.c
index c502d1b43..a944b3cce 100644
--- a/ir/be/ia32/ia32_emitter.c
+++ b/ir/be/ia32/ia32_emitter.c
@@ -22,6 +22,22 @@
  * @brief       This file implements the ia32 node emitter.
  * @author      Christian Wuerdig, Matthias Braun
  * @version     $Id$
+ *
+ * Summary table for x86 floatingpoint compares:
+ *   pnc_Eq  => !P && E
+ *   pnc_Lt  => !P && B
+ *   pnc_Le  => !P && BE
+ *   pnc_Gt  => A
+ *   pnc_Ge  => AE
+ *   pnc_Lg  => P || NE
+ *   pnc_Leg => NP  (ordered)
+ *   pnc_Uo  => P
+ *   pnc_Ue  => E
+ *   pnc_Ul  => B
+ *   pnc_Ule => BE
+ *   pnc_Ug  => P || A
+ *   pnc_Uge => P || AE
+ *   pnc_Ne  => NE
  */
 #include "config.h"
 
@@ -54,6 +70,7 @@
 #include "../be_dbgout.h"
 
 #include "ia32_emitter.h"
+#include "ia32_common_transform.h"
 #include "gen_ia32_emitter.h"
 #include "gen_ia32_regalloc_if.h"
 #include "ia32_nodes_attr.h"
@@ -64,12 +81,9 @@
 
 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
 
-#define BLOCK_PREFIX ".L"
-
 #define SNPRINTF_BUF_LEN 128
 
 static const ia32_isa_t *isa;
-static ia32_code_gen_t  *cg;
 static char              pic_base_label[128];
 static ir_label_t        exc_label_id;
 static int               mark_spill_reload = 0;
@@ -140,23 +154,9 @@ static const arch_register_t *get_in_reg(const ir_node *irn, int pos)
 
 	assert(reg && "no in register found");
 
-	if (reg == &ia32_gp_regs[REG_GP_NOREG])
+	if (reg == &ia32_registers[REG_GP_NOREG])
 		panic("trying to emit noreg for %+F input %d", irn, pos);
 
-	/* in case of unknown register: just return a valid register */
-	if (reg == &ia32_gp_regs[REG_GP_UKNWN]) {
-		const arch_register_req_t *req = arch_get_register_req(irn, pos);
-
-		if (arch_register_req_is(req, limited)) {
-			/* in case of limited requirements: get the first allowed register */
-			unsigned idx = rbitset_next(req->limited, 0, 1);
-			reg = arch_register_for_index(req->cls, idx);
-		} else {
-			/* otherwise get first register in class */
-			reg = arch_register_for_index(req->cls, 0);
-		}
-	}
-
 	return reg;
 }
 
@@ -201,20 +201,10 @@ static const arch_register_t *get_out_reg(const ir_node *irn, int pos)
 static char *get_unique_label(char *buf, size_t buflen, const char *prefix)
 {
 	static unsigned long id = 0;
-	snprintf(buf, buflen, "%s%lu", prefix, ++id);
+	snprintf(buf, buflen, "%s%s%lu", be_gas_get_private_prefix(), prefix, ++id);
 	return buf;
 }
 
-/*************************************************************
- *             _       _    __   _          _
- *            (_)     | |  / _| | |        | |
- *  _ __  _ __ _ _ __ | |_| |_  | |__   ___| |_ __   ___ _ __
- * | '_ \| '__| | '_ \| __|  _| | '_ \ / _ \ | '_ \ / _ \ '__|
- * | |_) | |  | | | | | |_| |   | | | |  __/ | |_) |  __/ |
- * | .__/|_|  |_|_| |_|\__|_|   |_| |_|\___|_| .__/ \___|_|
- * | |                                       | |
- * |_|                                       |_|
- *************************************************************/
 
 /**
  * Emit the name of the 8bit low register
@@ -282,11 +272,10 @@ void ia32_emit_source_register(const ir_node *node, int pos)
 
 static void ia32_emit_entity(ir_entity *entity, int no_pic_adjust)
 {
-	set_entity_backend_marked(entity, 1);
 	be_gas_emit_entity(entity);
 
 	if (get_entity_owner(entity) == get_tls_type()) {
-		if (get_entity_visibility(entity) == visibility_external_allocated) {
+		if (get_entity_visibility(entity) == ir_visibility_external) {
 			be_emit_cstring("@INDNTPOFF");
 		} else {
 			be_emit_cstring("@NTPOFF");
@@ -421,13 +410,16 @@ void ia32_emit_x87_mode_suffix(const ir_node *node)
 
 	if (mode_is_float(mode)) {
 		switch (get_mode_size_bits(mode)) {
-			case 32: be_emit_char('s'); return;
-			case 64: be_emit_char('l'); return;
-			case 80:
-			case 96: be_emit_char('t'); return;
+			case  32: be_emit_char('s'); return;
+			case  64: be_emit_char('l'); return;
+			/* long doubles have different sizes due to alignment on different
+			 * platforms. */
+			case  80:
+			case  96:
+			case 128: be_emit_char('t'); return;
 		}
 	} else {
-		assert(mode_is_int(mode));
+		assert(mode_is_int(mode) || mode_is_reference(mode));
 		switch (get_mode_size_bits(mode)) {
 			case 16: be_emit_char('s');     return;
 			case 32: be_emit_char('l');     return;
@@ -442,7 +434,7 @@ void ia32_emit_x87_mode_suffix(const ir_node *node)
 static char get_xmm_mode_suffix(ir_mode *mode)
 {
 	assert(mode_is_float(mode));
-	switch(get_mode_size_bits(mode)) {
+	switch (get_mode_size_bits(mode)) {
 	case 32: return 's';
 	case 64: return 'd';
 	default: panic("Invalid XMM mode");
@@ -494,27 +486,13 @@ static ir_node *get_cfop_target_block(const ir_node *irn)
 	return get_irn_link(irn);
 }
 
-/**
- * Emits a block label for the given block.
- */
-static void ia32_emit_block_name(const ir_node *block)
-{
-	if (has_Block_entity(block)) {
-		ir_entity *entity = get_Block_entity(block);
-		be_gas_emit_entity(entity);
-	} else {
-		be_emit_cstring(BLOCK_PREFIX);
-		be_emit_irprintf("%ld", get_irn_node_nr(block));
-	}
-}
-
 /**
  * Emits the target label for a control flow node.
  */
 static void ia32_emit_cfop_target(const ir_node *node)
 {
 	ir_node *block = get_cfop_target_block(node);
-	ia32_emit_block_name(block);
+	be_gas_emit_block_name(block);
 }
 
 /*
@@ -556,6 +534,7 @@ static void ia32_emit_cmp_suffix(int pnc)
 		be_emit_char('p');
 		return;
 	}
+
 	if (pnc & ia32_pn_Cmp_float || pnc & ia32_pn_Cmp_unsigned) {
 		str = cmp2condition_u[pnc & 7];
 	} else {
@@ -568,7 +547,9 @@ static void ia32_emit_cmp_suffix(int pnc)
 typedef enum ia32_emit_mod_t {
 	EMIT_RESPECT_LS   = 1U << 0,
 	EMIT_ALTERNATE_AM = 1U << 1,
-	EMIT_LONG         = 1U << 2
+	EMIT_LONG         = 1U << 2,
+	EMIT_HIGH_REG     = 1U << 3,
+	EMIT_LOW_REG      = 1U << 4
 } ia32_emit_mod_t;
 
 /**
@@ -647,9 +628,11 @@ void ia32_emit_am(const ir_node *node)
  * %d   signed int              signed int
  *
  * x starts at 0
- * # modifier for %ASx, %D and %S uses ls mode of node to alter register width
+ * # modifier for %ASx, %D, %R, and %S uses ls mode of node to alter register width
  * * modifier does not prefix immediates with $, but AM with *
  * l modifier for %lu and %ld
+ * > modifier to output high 8bit register (ah, bh)
+ * < modifier to output low 8bit register (al, bl)
  */
 static void ia32_emitf(const ir_node *node, const char *fmt, ...)
 {
@@ -678,20 +661,19 @@ static void ia32_emitf(const ir_node *node, const char *fmt, ...)
 			break;
 
 		++fmt;
-		if (*fmt == '*') {
-			mod |= EMIT_ALTERNATE_AM;
-			++fmt;
-		}
-
-		if (*fmt == '#') {
-			mod |= EMIT_RESPECT_LS;
-			++fmt;
-		}
-
-		if (*fmt == 'l') {
-			mod |= EMIT_LONG;
+		for (;;) {
+			switch (*fmt) {
+			case '*': mod |= EMIT_ALTERNATE_AM; break;
+			case '#': mod |= EMIT_RESPECT_LS;   break;
+			case 'l': mod |= EMIT_LONG;         break;
+			case '>': mod |= EMIT_HIGH_REG;     break;
+			case '<': mod |= EMIT_LOW_REG;      break;
+			default:
+				goto end_of_mods;
+			}
 			++fmt;
 		}
+end_of_mods:
 
 		switch (*fmt++) {
 			case '%':
@@ -700,20 +682,20 @@ static void ia32_emitf(const ir_node *node, const char *fmt, ...)
 
 			case 'A': {
 				switch (*fmt++) {
+emit_AM:
 					case 'M':
 						if (mod & EMIT_ALTERNATE_AM)
 							be_emit_char('*');
-
 						ia32_emit_am(node);
 						break;
 
 					case 'R': {
 						const arch_register_t *reg = va_arg(ap, const arch_register_t*);
-						if (mod & EMIT_ALTERNATE_AM)
-							be_emit_char('*');
 						if (get_ia32_op_type(node) == ia32_AddrModeS) {
-							ia32_emit_am(node);
+							goto emit_AM;
 						} else {
+							if (mod & EMIT_ALTERNATE_AM)
+								be_emit_char('*');
 							emit_register(reg, NULL);
 						}
 						break;
@@ -721,10 +703,8 @@ static void ia32_emitf(const ir_node *node, const char *fmt, ...)
 
 					case 'S':
 						if (get_ia32_op_type(node) == ia32_AddrModeS) {
-							if (mod & EMIT_ALTERNATE_AM)
-								be_emit_char('*');
-							ia32_emit_am(node);
 							++fmt;
+							goto emit_AM;
 						} else {
 							assert(get_ia32_op_type(node) == ia32_Normal);
 							goto emit_S;
@@ -772,7 +752,13 @@ static void ia32_emitf(const ir_node *node, const char *fmt, ...)
 
 			case 'R': {
 				const arch_register_t *reg = va_arg(ap, const arch_register_t*);
-				emit_register(reg, NULL);
+				if (mod & EMIT_HIGH_REG) {
+					emit_8bit_register_high(reg);
+				} else if (mod & EMIT_LOW_REG) {
+					emit_8bit_register(reg);
+				} else {
+					emit_register(reg, mod & EMIT_RESPECT_LS ? get_ia32_ls_mode(node) : NULL);
+				}
 				break;
 			}
 
@@ -853,7 +839,7 @@ void ia32_emit_binop(const ir_node *node)
  */
 void ia32_emit_x87_binop(const ir_node *node)
 {
-	switch(get_ia32_op_type(node)) {
+	switch (get_ia32_op_type(node)) {
 		case ia32_Normal:
 			{
 				const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
@@ -949,8 +935,7 @@ static ir_node *find_original_value(ir_node *node)
 	}
 }
 
-static int determine_final_pnc(const ir_node *node, int flags_pos,
-                               int pnc)
+static int determine_final_pnc(const ir_node *node, int flags_pos, int pnc)
 {
 	ir_node           *flags = get_irn_n(node, flags_pos);
 	const ia32_attr_t *flags_attr;
@@ -996,16 +981,10 @@ static pn_Cmp ia32_get_negated_pnc(pn_Cmp pnc)
 	return get_negated_pnc(pnc, mode);
 }
 
-void ia32_emit_cmp_suffix_node(const ir_node *node,
-                               int flags_pos)
+void ia32_emit_cmp_suffix_node(const ir_node *node, int flags_pos)
 {
-	const ia32_attr_t *attr = get_ia32_attr_const(node);
-
 	pn_Cmp pnc = get_ia32_condcode(node);
-
 	pnc = determine_final_pnc(node, flags_pos, pnc);
-	if (attr->data.ins_permuted)
-		pnc = ia32_get_negated_pnc(pnc);
 
 	ia32_emit_cmp_suffix(pnc);
 }
@@ -1057,7 +1036,6 @@ static void emit_ia32_Jcc(const ir_node *node)
 	int            need_parity_label = 0;
 	const ir_node *proj_true;
 	const ir_node *proj_false;
-	const ir_node *block;
 	pn_Cmp         pnc = get_ia32_condcode(node);
 
 	pnc = determine_final_pnc(node, 0, pnc);
@@ -1069,8 +1047,6 @@ static void emit_ia32_Jcc(const ir_node *node)
 	proj_false = get_proj(node, pn_ia32_Jcc_false);
 	assert(proj_false && "Jcc without false Proj");
 
-	block      = get_nodes_block(node);
-
 	if (can_be_fallthrough(proj_true)) {
 		/* exchange both proj's so the second one can be omitted */
 		const ir_node *t = proj_true;
@@ -1083,37 +1059,37 @@ static void emit_ia32_Jcc(const ir_node *node)
 	if (pnc & ia32_pn_Cmp_float) {
 		/* Some floating point comparisons require a test of the parity flag,
 		 * which indicates that the result is unordered */
-		switch (pnc & 15) {
-			case pn_Cmp_Uo: {
-				ia32_emitf(proj_true, "\tjp %L\n");
-				break;
-			}
+		switch (pnc & 0x0f) {
+		case pn_Cmp_Uo: {
+			ia32_emitf(proj_true, "\tjp %L\n");
+			break;
+		}
 
-			case pn_Cmp_Leg:
-				ia32_emitf(proj_true, "\tjnp %L\n");
-				break;
+		case pn_Cmp_Leg:
+			ia32_emitf(proj_true, "\tjnp %L\n");
+			break;
 
-			case pn_Cmp_Eq:
-			case pn_Cmp_Lt:
-			case pn_Cmp_Le:
-				/* we need a local label if the false proj is a fallthrough
-				 * as the falseblock might have no label emitted then */
-				if (can_be_fallthrough(proj_false)) {
-					need_parity_label = 1;
-					ia32_emitf(proj_false, "\tjp 1f\n");
-				} else {
-					ia32_emitf(proj_false, "\tjp %L\n");
-				}
-				goto emit_jcc;
+		case pn_Cmp_Eq:
+		case pn_Cmp_Lt:
+		case pn_Cmp_Le:
+			/* we need a local label if the false proj is a fallthrough
+			 * as the falseblock might have no label emitted then */
+			if (can_be_fallthrough(proj_false)) {
+				need_parity_label = 1;
+				ia32_emitf(proj_false, "\tjp 1f\n");
+			} else {
+				ia32_emitf(proj_false, "\tjp %L\n");
+			}
+			goto emit_jcc;
 
-			case pn_Cmp_Ug:
-			case pn_Cmp_Uge:
-			case pn_Cmp_Ne:
-				ia32_emitf(proj_true, "\tjp %L\n");
-				goto emit_jcc;
+		case pn_Cmp_Ug:
+		case pn_Cmp_Uge:
+		case pn_Cmp_Ne:
+			ia32_emitf(proj_true, "\tjp %L\n");
+			goto emit_jcc;
 
-			default:
-				goto emit_jcc;
+		default:
+			goto emit_jcc;
 		}
 	} else {
 emit_jcc:
@@ -1132,19 +1108,67 @@ emit_jcc:
 	}
 }
 
-static void emit_ia32_CMov(const ir_node *node)
+/**
+ * Emits an ia32 Setcc. This is mostly easy but some floating point compares
+ * are tricky.
+ */
+static void emit_ia32_Setcc(const ir_node *node)
+{
+	const arch_register_t *dreg = get_out_reg(node, pn_ia32_Setcc_res);
+
+	pn_Cmp pnc = get_ia32_condcode(node);
+	pnc        = determine_final_pnc(node, n_ia32_Setcc_eflags, pnc);
+	if (pnc & ia32_pn_Cmp_float) {
+		switch (pnc & 0x0f) {
+		case pn_Cmp_Uo:
+			ia32_emitf(node, "\tsetp %#R\n", dreg);
+			return;
+
+		case pn_Cmp_Leg:
+			ia32_emitf(node, "\tsetnp %#R\n", dreg);
+			return;
+
+		case pn_Cmp_Eq:
+		case pn_Cmp_Lt:
+		case pn_Cmp_Le:
+			ia32_emitf(node, "\tset%P %<R\n", pnc, dreg);
+			ia32_emitf(node, "\tsetnp %>R\n", dreg);
+			ia32_emitf(node, "\tandb %>R, %<R\n", dreg, dreg);
+			return;
+
+		case pn_Cmp_Ug:
+		case pn_Cmp_Uge:
+		case pn_Cmp_Ne:
+			ia32_emitf(node, "\tset%P %<R\n", pnc, dreg);
+			ia32_emitf(node, "\tsetp %>R\n", dreg);
+			ia32_emitf(node, "\torb %>R, %<R\n", dreg, dreg);
+			return;
+
+		default:
+			break;
+		}
+	}
+	ia32_emitf(node, "\tset%P %#R\n", pnc, dreg);
+}
+
+static void emit_ia32_CMovcc(const ir_node *node)
 {
 	const ia32_attr_t     *attr         = get_ia32_attr_const(node);
-	int                    ins_permuted = attr->data.ins_permuted;
 	const arch_register_t *out          = arch_irn_get_register(node, pn_ia32_res);
 	pn_Cmp                 pnc          = get_ia32_condcode(node);
 	const arch_register_t *in_true;
 	const arch_register_t *in_false;
 
-	pnc = determine_final_pnc(node, n_ia32_CMov_eflags, pnc);
+	pnc = determine_final_pnc(node, n_ia32_CMovcc_eflags, pnc);
+	/* although you can't set ins_permuted in the constructor it might still
+	 * be set by memory operand folding
+	 * Permuting inputs of a cmov means the condition is negated!
+	 */
+	if (attr->data.ins_permuted)
+		pnc = ia32_get_negated_pnc(pnc);
 
-	in_true  = arch_get_irn_register(get_irn_n(node, n_ia32_CMov_val_true));
-	in_false = arch_get_irn_register(get_irn_n(node, n_ia32_CMov_val_false));
+	in_true  = arch_get_irn_register(get_irn_n(node, n_ia32_CMovcc_val_true));
+	in_false = arch_get_irn_register(get_irn_n(node, n_ia32_CMovcc_val_false));
 
 	/* should be same constraint fullfilled? */
 	if (out == in_false) {
@@ -1154,7 +1178,7 @@ static void emit_ia32_CMov(const ir_node *node)
 
 		assert(get_ia32_op_type(node) == ia32_Normal);
 
-		ins_permuted = !ins_permuted;
+		pnc = ia32_get_negated_pnc(pnc);
 
 		tmp      = in_true;
 		in_true  = in_false;
@@ -1164,39 +1188,39 @@ static void emit_ia32_CMov(const ir_node *node)
 		ia32_emitf(node, "\tmovl %R, %R\n", in_false, out);
 	}
 
-	if (ins_permuted)
-		pnc = ia32_get_negated_pnc(pnc);
-
 	/* TODO: handling of Nans isn't correct yet */
+	if (pnc & ia32_pn_Cmp_float) {
+		switch (pnc & 0x0f) {
+		case pn_Cmp_Uo:
+		case pn_Cmp_Leg:
+		case pn_Cmp_Eq:
+		case pn_Cmp_Lt:
+		case pn_Cmp_Le:
+		case pn_Cmp_Ug:
+		case pn_Cmp_Uge:
+		case pn_Cmp_Ne:
+			panic("CMov with floatingpoint compare/parity not supported yet");
+		}
+	}
 
 	ia32_emitf(node, "\tcmov%P %#AR, %#R\n", pnc, in_true, out);
 }
 
-/*********************************************************
- *                 _ _       _
- *                (_) |     (_)
- *   ___ _ __ ___  _| |_     _ _   _ _ __ ___  _ __  ___
- *  / _ \ '_ ` _ \| | __|   | | | | | '_ ` _ \| '_ \/ __|
- * |  __/ | | | | | | |_    | | |_| | | | | | | |_) \__ \
- *  \___|_| |_| |_|_|\__|   | |\__,_|_| |_| |_| .__/|___/
- *                         _/ |               | |
- *                        |__/                |_|
- *********************************************************/
 
 /* jump table entry (target and corresponding number) */
-typedef struct _branch_t {
+typedef struct branch_t {
 	ir_node *target;
 	int      value;
 } branch_t;
 
 /* jump table for switch generation */
-typedef struct _jmp_tbl_t {
-	ir_node  *defProj;         /**< default target */
-	long      min_value;       /**< smallest switch case */
-	long      max_value;       /**< largest switch case */
-	long      num_branches;    /**< number of jumps */
-	char     *label;           /**< label of the jump table */
-	branch_t *branches;        /**< jump array */
+typedef struct jmp_tbl_t {
+	ir_node  *defProj;                 /**< default target */
+	long      min_value;               /**< smallest switch case */
+	long      max_value;               /**< largest switch case */
+	long      num_branches;            /**< number of jumps */
+	char      label[SNPRINTF_BUF_LEN]; /**< label of the jump table */
+	branch_t *branches;                /**< jump array */
 } jmp_tbl_t;
 
 /**
@@ -1213,29 +1237,21 @@ static int ia32_cmp_branch_t(const void *a, const void *b)
 		return 1;
 }
 
-/**
- * Emits code for a SwitchJmp (creates a jump table if
- * possible otherwise a cmp-jmp cascade). Port from
- * cggg ia32 backend
- */
-static void emit_ia32_SwitchJmp(const ir_node *node)
+static void generate_jump_table(jmp_tbl_t *tbl, const ir_node *node)
 {
-	unsigned long       interval;
-	int                 last_value, i;
+	int                 i;
 	long                pnc;
 	long                default_pn;
-	jmp_tbl_t           tbl;
 	ir_node            *proj;
 	const ir_edge_t    *edge;
 
 	/* fill the table structure */
-	tbl.label        = XMALLOCN(char, SNPRINTF_BUF_LEN);
-	tbl.label        = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
-	tbl.defProj      = NULL;
-	tbl.num_branches = get_irn_n_edges(node) - 1;
-	tbl.branches     = XMALLOCNZ(branch_t, tbl.num_branches);
-	tbl.min_value    = INT_MAX;
-	tbl.max_value    = INT_MIN;
+	get_unique_label(tbl->label, SNPRINTF_BUF_LEN, "TBL_");
+	tbl->defProj      = NULL;
+	tbl->num_branches = get_irn_n_edges(node) - 1;
+	tbl->branches     = XMALLOCNZ(branch_t, tbl->num_branches);
+	tbl->min_value    = LONG_MAX;
+	tbl->max_value    = LONG_MIN;
 
 	default_pn = get_ia32_condcode(node);
 	i = 0;
@@ -1248,23 +1264,38 @@ static void emit_ia32_SwitchJmp(const ir_node *node)
 
 		/* check for default proj */
 		if (pnc == default_pn) {
-			assert(tbl.defProj == NULL && "found two default Projs at SwitchJmp");
-			tbl.defProj = proj;
+			assert(tbl->defProj == NULL && "found two default Projs at SwitchJmp");
+			tbl->defProj = proj;
 		} else {
-			tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
-			tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
+			tbl->min_value = pnc < tbl->min_value ? pnc : tbl->min_value;
+			tbl->max_value = pnc > tbl->max_value ? pnc : tbl->max_value;
 
 			/* create branch entry */
-			tbl.branches[i].target = proj;
-			tbl.branches[i].value  = pnc;
+			tbl->branches[i].target = proj;
+			tbl->branches[i].value  = pnc;
 			++i;
 		}
 
 	}
-	assert(i == tbl.num_branches);
+	assert(i == tbl->num_branches);
 
 	/* sort the branches by their number */
-	qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
+	qsort(tbl->branches, tbl->num_branches, sizeof(tbl->branches[0]), ia32_cmp_branch_t);
+}
+
+/**
+ * Emits code for a SwitchJmp (creates a jump table if
+ * possible otherwise a cmp-jmp cascade). Port from
+ * cggg ia32 backend
+ */
+static void emit_ia32_SwitchJmp(const ir_node *node)
+{
+	unsigned long       interval;
+	int                 last_value, i;
+	jmp_tbl_t           tbl;
+
+	/* fill the table structure */
+	generate_jump_table(&tbl, node);
 
 	/* two-complement's magic make this work without overflow */
 	interval = tbl.max_value - tbl.min_value;
@@ -1296,10 +1327,7 @@ static void emit_ia32_SwitchJmp(const ir_node *node)
 		ia32_emitf(tbl.branches[0].target, "\tjmp %L\n");
 	}
 
-	if (tbl.label)
-		free(tbl.label);
-	if (tbl.branches)
-		free(tbl.branches);
+	free(tbl.branches);
 }
 
 /**
@@ -1346,7 +1374,7 @@ static const char* emit_asm_operand(const ir_node *node, const char *s)
 	c = *(++s);
 
 	/* parse modifiers */
-	switch(c) {
+	switch (c) {
 	case 0:
 		ir_fprintf(stderr, "Warning: asm text (%+F) ends with %%\n", node);
 		be_emit_char('%');
@@ -1425,7 +1453,7 @@ static const char* emit_asm_operand(const ir_node *node, const char *s)
 	/* emit it */
 	if (modifier != 0) {
 		be_emit_char('%');
-		switch(modifier) {
+		switch (modifier) {
 		case 'b':
 			reg_name = ia32_get_mapped_reg_name(isa->regs_8bit, reg);
 			break;
@@ -1466,7 +1494,7 @@ static void emit_ia32_Asm(const ir_node *node)
 	if (s[0] != '\t')
 		be_emit_char('\t');
 
-	while(*s != 0) {
+	while (*s != 0) {
 		if (*s == '%') {
 			s = emit_asm_operand(node, s);
 		} else {
@@ -1477,16 +1505,6 @@ static void emit_ia32_Asm(const ir_node *node)
 	ia32_emitf(NULL, "\n#NO_APP\n");
 }
 
-/**********************************
- *   _____                  ____
- *  / ____|                |  _ \
- * | |     ___  _ __  _   _| |_) |
- * | |    / _ \| '_ \| | | |  _ <
- * | |___| (_) | |_) | |_| | |_) |
- *  \_____\___/| .__/ \__, |____/
- *             | |     __/ |
- *             |_|    |___/
- **********************************/
 
 /**
  * Emit movsb/w instructions to make mov count divideable by 4
@@ -1526,17 +1544,6 @@ static void emit_ia32_CopyB_i(const ir_node *node)
 }
 
 
-
-/***************************
- *   _____
- *  / ____|
- * | |     ___  _ ____   __
- * | |    / _ \| '_ \ \ / /
- * | |___| (_) | | | \ V /
- *  \_____\___/|_| |_|\_/
- *
- ***************************/
-
 /**
  * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
  */
@@ -1591,16 +1598,6 @@ static void emit_ia32_Call(const ir_node *node)
 }
 
 
-/*******************************************
- *  _                          _
- * | |                        | |
- * | |__   ___ _ __   ___   __| | ___  ___
- * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
- * | |_) |  __/ | | | (_) | (_| |  __/\__ \
- * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
- *
- *******************************************/
-
 /**
  * Emits code to increase stack pointer.
  */
@@ -1618,16 +1615,6 @@ static void emit_be_IncSP(const ir_node *node)
 	}
 }
 
-static inline bool is_unknown_reg(const arch_register_t *reg)
-{
-	if(reg == &ia32_gp_regs[REG_GP_UKNWN]
-			|| reg == &ia32_xmm_regs[REG_XMM_UKNWN]
-			|| reg == &ia32_vfp_regs[REG_VFP_UKNWN])
-		return true;
-
-	return false;
-}
-
 /**
  * Emits code for Copy/CopyKeep.
  */
@@ -1639,8 +1626,6 @@ static void Copy_emitter(const ir_node *node, const ir_node *op)
 	if (in == out) {
 		return;
 	}
-	if (is_unknown_reg(in))
-		return;
 	/* copies of vf nodes aren't real... */
 	if (arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp])
 		return;
@@ -1812,10 +1797,14 @@ static void emit_ia32_ClimbFrame(const ir_node *node)
 
 	ia32_emitf(node, "\tmovl %S0, %D0\n");
 	ia32_emitf(node, "\tmovl $%u, %S1\n", attr->count);
-	ia32_emitf(NULL, BLOCK_PREFIX "%ld:\n", get_irn_node_nr(node));
+	be_gas_emit_block_name(node);
+	be_emit_cstring(":\n");
+	be_emit_write_line();
 	ia32_emitf(node, "\tmovl (%D0), %D0\n");
 	ia32_emitf(node, "\tdec %S1\n");
-	ia32_emitf(node, "\tjnz " BLOCK_PREFIX "%ld\n", get_irn_node_nr(node));
+	be_emit_cstring("\tjnz ");
+	be_gas_emit_block_name(node);
+	be_emit_finish_line_gas(node);
 }
 
 static void emit_be_Return(const ir_node *node)
@@ -1835,16 +1824,6 @@ static void emit_Nothing(const ir_node *node)
 }
 
 
-/***********************************************************************************
- *                  _          __                                             _
- *                 (_)        / _|                                           | |
- *  _ __ ___   __ _ _ _ __   | |_ _ __ __ _ _ __ ___   _____      _____  _ __| | __
- * | '_ ` _ \ / _` | | '_ \  |  _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
- * | | | | | | (_| | | | | | | | | | | (_| | | | | | |  __/\ V  V / (_) | |  |   <
- * |_| |_| |_|\__,_|_|_| |_| |_| |_|  \__,_|_| |_| |_|\___| \_/\_/ \___/|_|  |_|\_\
- *
- ***********************************************************************************/
-
 /**
  * Enters the emitter functions for handled nodes into the generic
  * pointer of an opcode.
@@ -1854,9 +1833,9 @@ static void ia32_register_emitters(void)
 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
 #define IA32_EMIT(a)    IA32_EMIT2(a,a)
 #define EMIT(a)         op_##a->ops.generic = (op_func)emit_##a
-#define IGN(a)			op_##a->ops.generic = (op_func)emit_Nothing
+#define IGN(a)          op_##a->ops.generic = (op_func)emit_Nothing
 #define BE_EMIT(a)      op_be_##a->ops.generic = (op_func)emit_be_##a
-#define BE_IGN(a)		op_be_##a->ops.generic = (op_func)emit_Nothing
+#define BE_IGN(a)       op_be_##a->ops.generic = (op_func)emit_Nothing
 
 	/* first clear the generic function pointer for all ops */
 	clear_irp_opcodes_generic_func();
@@ -1867,7 +1846,7 @@ static void ia32_register_emitters(void)
 	/* other ia32 emitter functions */
 	IA32_EMIT2(Conv_I2I8Bit, Conv_I2I);
 	IA32_EMIT(Asm);
-	IA32_EMIT(CMov);
+	IA32_EMIT(CMovcc);
 	IA32_EMIT(Call);
 	IA32_EMIT(Const);
 	IA32_EMIT(Conv_FP2FP);
@@ -1879,6 +1858,7 @@ static void ia32_register_emitters(void)
 	IA32_EMIT(GetEIP);
 	IA32_EMIT(IMul);
 	IA32_EMIT(Jcc);
+	IA32_EMIT(Setcc);
 	IA32_EMIT(LdTls);
 	IA32_EMIT(Minus64Bit);
 	IA32_EMIT(SwitchJmp);
@@ -1991,7 +1971,8 @@ static void ia32_emit_align_label(void)
 static int should_align_block(const ir_node *block)
 {
 	static const double DELTA = .0001;
-	ir_exec_freq *exec_freq   = cg->birg->exec_freq;
+	ir_graph     *irg         = get_irn_irg(block);
+	ir_exec_freq *exec_freq   = be_get_irg_exec_freq(irg);
 	ir_node      *prev        = get_prev_block_sched(block);
 	double        block_freq;
 	double        prev_freq = 0;  /**< execfreq of the fallthrough block */
@@ -2008,7 +1989,7 @@ static int should_align_block(const ir_node *block)
 		return 0;
 
 	n_cfgpreds = get_Block_n_cfgpreds(block);
-	for(i = 0; i < n_cfgpreds; ++i) {
+	for (i = 0; i < n_cfgpreds; ++i) {
 		const ir_node *pred      = get_Block_cfgpred_block(block, i);
 		double         pred_freq = get_block_execfreq(exec_freq, pred);
 
@@ -2038,7 +2019,7 @@ static void ia32_emit_block_header(ir_node *block)
 	ir_graph     *irg = current_ir_graph;
 	int           need_label = block_needs_label(block);
 	int           i, arity;
-	ir_exec_freq *exec_freq = cg->birg->exec_freq;
+	ir_exec_freq *exec_freq = be_get_irg_exec_freq(irg);
 
 	if (block == get_irg_end_block(irg))
 		return;
@@ -2070,14 +2051,14 @@ static void ia32_emit_block_header(ir_node *block)
 	}
 
 	if (need_label) {
-		ia32_emit_block_name(block);
+		be_gas_emit_block_name(block);
 		be_emit_char(':');
 
 		be_emit_pad_comment();
 		be_emit_cstring("   /* ");
 	} else {
 		be_emit_cstring("\t/* ");
-		ia32_emit_block_name(block);
+		be_gas_emit_block_name(block);
 		be_emit_cstring(": ");
 	}
 
@@ -2166,21 +2147,25 @@ static int cmp_exc_entry(const void *a, const void *b)
 /**
  * Main driver. Emits the code for one routine.
  */
-void ia32_gen_routine(ia32_code_gen_t *ia32_cg, ir_graph *irg)
+void ia32_gen_routine(ir_graph *irg)
 {
-	ir_entity *entity     = get_irg_entity(irg);
-	exc_entry *exc_list   = NEW_ARR_F(exc_entry, 0);
+	ir_entity        *entity    = get_irg_entity(irg);
+	exc_entry        *exc_list  = NEW_ARR_F(exc_entry, 0);
+	const arch_env_t *arch_env  = be_get_irg_arch_env(irg);
+	ia32_irg_data_t  *irg_data  = ia32_get_irg_data(irg);
+	ir_node         **blk_sched = irg_data->blk_sched;
 	int i, n;
 
-	cg       = ia32_cg;
-	isa      = cg->isa;
-	do_pic   = cg->birg->main_env->options->pic;
+	isa      = (ia32_isa_t*) arch_env;
+	do_pic   = be_get_irg_options(irg)->pic;
+
+	be_gas_elf_type_char = '@';
 
 	ia32_register_emitters();
 
-	get_unique_label(pic_base_label, sizeof(pic_base_label), ".PIC_BASE");
+	get_unique_label(pic_base_label, sizeof(pic_base_label), "PIC_BASE");
 
-	be_dbg_method_begin(entity, be_abi_get_stack_layout(cg->birg->abi));
+	be_dbg_method_begin(entity);
 	be_gas_emit_function_prolog(entity, ia32_cg_config.function_alignment);
 
 	/* we use links to point to target blocks */
@@ -2188,16 +2173,16 @@ void ia32_gen_routine(ia32_code_gen_t *ia32_cg, ir_graph *irg)
 	irg_block_walk_graph(irg, ia32_gen_labels, NULL, &exc_list);
 
 	/* initialize next block links */
-	n = ARR_LEN(cg->blk_sched);
+	n = ARR_LEN(blk_sched);
 	for (i = 0; i < n; ++i) {
-		ir_node *block = cg->blk_sched[i];
-		ir_node *prev  = i > 0 ? cg->blk_sched[i-1] : NULL;
+		ir_node *block = blk_sched[i];
+		ir_node *prev  = i > 0 ? blk_sched[i-1] : NULL;
 
 		set_irn_link(block, prev);
 	}
 
 	for (i = 0; i < n; ++i) {
-		ir_node *block = cg->blk_sched[i];
+		ir_node *block = blk_sched[i];
 
 		ia32_gen_block(block);
 	}
@@ -2220,7 +2205,7 @@ void ia32_gen_routine(ia32_code_gen_t *ia32_cg, ir_graph *irg)
 			ia32_emit_exc_label(exc_list[i].exc_instr);
 			be_emit_char('\n');
 			be_emit_cstring("\t.long ");
-			ia32_emit_block_name(exc_list[i].block);
+			be_gas_emit_block_name(exc_list[i].block);
 			be_emit_char('\n');
 		}
 	}
@@ -2235,21 +2220,21 @@ static const lc_opt_table_entry_t ia32_emitter_options[] = {
 /* ==== Experimental binary emitter ==== */
 
 static unsigned char reg_gp_map[N_ia32_gp_REGS];
-static unsigned char reg_mmx_map[N_ia32_mmx_REGS];
-static unsigned char reg_sse_map[N_ia32_xmm_REGS];
+//static unsigned char reg_mmx_map[N_ia32_mmx_REGS];
+//static unsigned char reg_sse_map[N_ia32_xmm_REGS];
 static unsigned char pnc_map_signed[8];
 static unsigned char pnc_map_unsigned[8];
 
 static void build_reg_map(void)
 {
-	reg_gp_map[REG_EAX] = 0x0;
-	reg_gp_map[REG_ECX] = 0x1;
-	reg_gp_map[REG_EDX] = 0x2;
-	reg_gp_map[REG_EBX] = 0x3;
-	reg_gp_map[REG_ESP] = 0x4;
-	reg_gp_map[REG_EBP] = 0x5;
-	reg_gp_map[REG_ESI] = 0x6;
-	reg_gp_map[REG_EDI] = 0x7;
+	reg_gp_map[REG_GP_EAX] = 0x0;
+	reg_gp_map[REG_GP_ECX] = 0x1;
+	reg_gp_map[REG_GP_EDX] = 0x2;
+	reg_gp_map[REG_GP_EBX] = 0x3;
+	reg_gp_map[REG_GP_ESP] = 0x4;
+	reg_gp_map[REG_GP_EBP] = 0x5;
+	reg_gp_map[REG_GP_ESI] = 0x6;
+	reg_gp_map[REG_GP_EDI] = 0x7;
 
 	pnc_map_signed[pn_Cmp_Eq]    = 0x04;
 	pnc_map_signed[pn_Cmp_Lt]    = 0x0C;
@@ -2266,6 +2251,7 @@ static void build_reg_map(void)
 	pnc_map_unsigned[pn_Cmp_Lg]    = 0x05;
 }
 
+/** Returns the encoding for a pnc field. */
 static unsigned char pnc2cc(int pnc)
 {
 	unsigned char cc;
@@ -2339,20 +2325,24 @@ static void bemit_entity(ir_entity *entity, bool entity_sign, int offset,
 		return;
 	}
 
-	if (is_relative) {
-		offset -= 4;
-	}
-
 	/* the final version should remember the position in the bytestream
 	   and patch it with the correct address at linktime... */
 	be_emit_cstring("\t.long ");
 	if (entity_sign)
 		be_emit_char('-');
-	set_entity_backend_marked(entity, 1);
 	be_gas_emit_entity(entity);
 
+	if (get_entity_owner(entity) == get_tls_type()) {
+		if (get_entity_visibility(entity) == ir_visibility_external) {
+			be_emit_cstring("@INDNTPOFF");
+		} else {
+			be_emit_cstring("@NTPOFF");
+		}
+	}
+
 	if (is_relative) {
 		be_emit_cstring("-.");
+		offset -= 4;
 	}
 
 	if (offset != 0) {
@@ -2365,7 +2355,7 @@ static void bemit_entity(ir_entity *entity, bool entity_sign, int offset,
 static void bemit_jmp_destination(const ir_node *dest_block)
 {
 	be_emit_cstring("\t.long ");
-	ia32_emit_block_name(dest_block);
+	be_gas_emit_block_name(dest_block);
 	be_emit_cstring(" - . - 4\n");
 	be_emit_write_line();
 }
@@ -2373,6 +2363,11 @@ static void bemit_jmp_destination(const ir_node *dest_block)
 /* end emit routines, all emitters following here should only use the functions
    above. */
 
+typedef enum reg_modifier {
+	REG_LOW  = 0,
+	REG_HIGH = 1
+} reg_modifier_t;
+
 /** Create a ModR/M byte for src1,src2 registers */
 static void bemit_modrr(const arch_register_t *src1,
                         const arch_register_t *src2)
@@ -2383,6 +2378,16 @@ static void bemit_modrr(const arch_register_t *src1,
 	bemit8(modrm);
 }
 
+/** Create a ModR/M8 byte for src1,src2 registers */
+static void bemit_modrr8(reg_modifier_t high_part1, const arch_register_t *src1,
+						 reg_modifier_t high_part2, const arch_register_t *src2)
+{
+	unsigned char modrm = MOD_REG;
+	modrm |= ENC_RM(reg_gp_map[src1->index] +  (high_part1 == REG_HIGH ? 4 : 0));
+	modrm |= ENC_REG(reg_gp_map[src2->index] + (high_part2 == REG_HIGH ? 4 : 0));
+	bemit8(modrm);
+}
+
 /** Create a ModR/M byte for one register and extension */
 static void bemit_modru(const arch_register_t *reg, unsigned ext)
 {
@@ -2393,6 +2398,16 @@ static void bemit_modru(const arch_register_t *reg, unsigned ext)
 	bemit8(modrm);
 }
 
+/** Create a ModR/M8 byte for one register */
+static void bemit_modrm8(reg_modifier_t high_part, const arch_register_t *reg)
+{
+	unsigned char modrm = MOD_REG;
+	assert(reg_gp_map[reg->index] < 4);
+	modrm |= ENC_RM(reg_gp_map[reg->index] + (high_part == REG_HIGH ? 4 : 0));
+	modrm |= MOD_REG;
+	bemit8(modrm);
+}
+
 /**
  * Calculate the size of an signed immediate in bytes.
  *
@@ -2543,7 +2558,7 @@ static void bemit_binop_with_imm(
 			bemit_mod_am(ruval, node);
 		} else {
 			const arch_register_t *reg = get_in_reg(node, n_ia32_binary_left);
-			if (reg->index == REG_EAX) {
+			if (reg->index == REG_GP_EAX) {
 				bemit8(opcode_ax);
 			} else {
 				bemit8(opcode);
@@ -2624,7 +2639,7 @@ static void bemit_copy(const ir_node *copy)
 	const arch_register_t *in  = get_in_reg(copy, 0);
 	const arch_register_t *out = get_out_reg(copy, 0);
 
-	if (in == out || is_unknown_reg(in))
+	if (in == out)
 		return;
 	/* copies of vf nodes aren't real... */
 	if (arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp])
@@ -2648,9 +2663,9 @@ static void bemit_perm(const ir_node *node)
 	assert(cls0 == arch_register_get_class(in1) && "Register class mismatch at Perm");
 
 	if (cls0 == &ia32_reg_classes[CLASS_ia32_gp]) {
-		if (in0->index == REG_EAX) {
+		if (in0->index == REG_GP_EAX) {
 			bemit8(0x90 + reg_gp_map[in1->index]);
-		} else if (in1->index == REG_EAX) {
+		} else if (in1->index == REG_GP_EAX) {
 			bemit8(0x90 + reg_gp_map[in0->index]);
 		} else {
 			bemit8(0x87);
@@ -2706,10 +2721,11 @@ BINOP(test, 0x85, 0xA9, 0xF7, 0)
 #define BINOPMEM(op, ext) \
 static void bemit_##op(const ir_node *node) \
 { \
+	ir_node *val; \
 	unsigned size = get_mode_size_bits(get_ia32_ls_mode(node)); \
 	if (size == 16) \
 		bemit8(0x66); \
-	ir_node *val = get_irn_n(node, n_ia32_unary_op); \
+	val = get_irn_n(node, n_ia32_unary_op); \
 	if (is_ia32_Immediate(val)) { \
 		const ia32_immediate_attr_t *attr   = get_ia32_immediate_attr_const(val); \
 		int                          offset = attr->offset; \
@@ -2793,22 +2809,23 @@ static void bemit_##op(const ir_node *node) \
  \
 static void bemit_##op##mem(const ir_node *node) \
 { \
+	ir_node *count; \
 	unsigned size = get_mode_size_bits(get_ia32_ls_mode(node)); \
 	if (size == 16) \
 		bemit8(0x66); \
-	ir_node *count = get_irn_n(node, 1); \
+	count = get_irn_n(node, 1); \
 	if (is_ia32_Immediate(count)) { \
 		int offset = get_ia32_immediate_attr_const(count)->offset; \
 		if (offset == 1) { \
-			bemit8(size == 1 ? 0xD0 : 0xD1); \
+			bemit8(size == 8 ? 0xD0 : 0xD1); \
 			bemit_mod_am(ext, node); \
 		} else { \
-			bemit8(size == 1 ? 0xC0 : 0xC1); \
+			bemit8(size == 8 ? 0xC0 : 0xC1); \
 			bemit_mod_am(ext, node); \
 			bemit8(offset); \
 		} \
 	} else { \
-		bemit8(size == 1 ? 0xD2 : 0xD3); \
+		bemit8(size == 8 ? 0xD2 : 0xD3); \
 		bemit_mod_am(ext, node); \
 	} \
 }
@@ -2851,7 +2868,78 @@ static void bemit_shrd(const ir_node *node)
 	}
 }
 
-static void bemit_cmov(const ir_node *node)
+/**
+ * binary emitter for setcc.
+ */
+static void bemit_setcc(const ir_node *node)
+{
+	const arch_register_t *dreg = get_out_reg(node, pn_ia32_Setcc_res);
+
+	pn_Cmp pnc = get_ia32_condcode(node);
+	pnc        = determine_final_pnc(node, n_ia32_Setcc_eflags, pnc);
+	if (pnc & ia32_pn_Cmp_float) {
+		switch (pnc & 0x0f) {
+		case pn_Cmp_Uo:
+			 /* setp <dreg */
+			bemit8(0x0F);
+			bemit8(0x9A);
+			bemit_modrm8(REG_LOW, dreg);
+			return;
+
+		case pn_Cmp_Leg:
+			 /* setnp <dreg*/
+			bemit8(0x0F);
+			bemit8(0x9B);
+			bemit_modrm8(REG_LOW, dreg);
+			return;
+
+		case pn_Cmp_Eq:
+		case pn_Cmp_Lt:
+		case pn_Cmp_Le:
+			 /* set%PNC <dreg */
+			bemit8(0x0F);
+			bemit8(0x90 | pnc2cc(pnc));
+			bemit_modrm8(REG_LOW, dreg);
+
+			/* setnp >dreg */
+			bemit8(0x0F);
+			bemit8(0x9B);
+			bemit_modrm8(REG_HIGH, dreg);
+
+			/* andb %>dreg, %<dreg */
+			bemit8(0x20);
+			bemit_modrr8(REG_LOW, dreg, REG_HIGH, dreg);
+			return;
+
+		case pn_Cmp_Ug:
+		case pn_Cmp_Uge:
+		case pn_Cmp_Ne:
+			/* set%PNC <dreg */
+			bemit8(0x0F);
+			bemit8(0x90 | pnc2cc(pnc));
+			bemit_modrm8(REG_LOW, dreg);
+
+			/* setp >dreg */
+			bemit8(0x0F);
+			bemit8(0x9A);
+			bemit_modrm8(REG_HIGH, dreg);
+
+			/* orb %>dreg, %<dreg */
+			bemit8(0x08);
+			bemit_modrr8(REG_LOW, dreg, REG_HIGH, dreg);
+			return;
+
+		default:
+			break;
+		}
+	}
+	/* set%PNC <dreg */
+	bemit8(0x0F);
+	bemit8(0x90 | pnc2cc(pnc));
+	bemit_modrm8(REG_LOW, dreg);
+}
+
+static void bemit_cmovcc(const ir_node *node)
 {
 	const ia32_attr_t     *attr         = get_ia32_attr_const(node);
 	int                    ins_permuted = attr->data.ins_permuted;
@@ -2860,10 +2948,10 @@ static void bemit_cmov(const ir_node *node)
 	const arch_register_t *in_true;
 	const arch_register_t *in_false;
 
-	pnc = determine_final_pnc(node, n_ia32_CMov_eflags, pnc);
+	pnc = determine_final_pnc(node, n_ia32_CMovcc_eflags, pnc);
 
-	in_true  = arch_get_irn_register(get_irn_n(node, n_ia32_CMov_val_true));
-	in_false = arch_get_irn_register(get_irn_n(node, n_ia32_CMov_val_false));
+	in_true  = arch_get_irn_register(get_irn_n(node, n_ia32_CMovcc_val_true));
+	in_false = arch_get_irn_register(get_irn_n(node, n_ia32_CMovcc_val_false));
 
 	/* should be same constraint fullfilled? */
 	if (out == in_false) {
@@ -2884,7 +2972,7 @@ static void bemit_cmov(const ir_node *node)
 	/* TODO: handling of Nans isn't correct yet */
 
 	bemit8(0x0F);
-	bemit8(0x40 + pnc2cc(pnc));
+	bemit8(0x40 | pnc2cc(pnc));
 	if (get_ia32_op_type(node) == ia32_Normal) {
 		bemit_modrr(in_true, out);
 	} else {
@@ -2934,7 +3022,7 @@ static void bemit_cmp(const ir_node *node)
 					bemit_mod_am(7, node);
 				} else {
 					const arch_register_t *reg = get_in_reg(node, n_ia32_binary_left);
-					if (reg->index == REG_EAX) {
+					if (reg->index == REG_GP_EAX) {
 						bemit8(0x3D);
 					} else {
 						bemit8(0x81);
@@ -2967,7 +3055,7 @@ static void bemit_cmp8bit(const ir_node *node)
 	if (is_ia32_Immediate(right)) {
 		if (get_ia32_op_type(node) == ia32_Normal) {
 			const arch_register_t *out = get_in_reg(node, n_ia32_Cmp_left);
-			if (out->index == REG_EAX) {
+			if (out->index == REG_GP_EAX) {
 				bemit8(0x3C);
 			} else {
 				bemit8(0x80);
@@ -2979,8 +3067,8 @@ static void bemit_cmp8bit(const ir_node *node)
 		}
 		bemit8(get_ia32_immediate_attr_const(right)->offset);
 	} else {
-		bemit8(0x3A);
 		const arch_register_t *out = get_in_reg(node, n_ia32_Cmp_left);
+		bemit8(0x3A);
 		if (get_ia32_op_type(node) == ia32_Normal) {
 			const arch_register_t *in = get_in_reg(node, n_ia32_Cmp_right);
 			bemit_modrr(out, in);
@@ -2996,7 +3084,7 @@ static void bemit_test8bit(const ir_node *node)
 	if (is_ia32_Immediate(right)) {
 		if (get_ia32_op_type(node) == ia32_Normal) {
 			const arch_register_t *out = get_in_reg(node, n_ia32_Test8Bit_left);
-			if (out->index == REG_EAX) {
+			if (out->index == REG_GP_EAX) {
 				bemit8(0xA8);
 			} else {
 				bemit8(0xF6);
@@ -3008,8 +3096,8 @@ static void bemit_test8bit(const ir_node *node)
 		}
 		bemit8(get_ia32_immediate_attr_const(right)->offset);
 	} else {
-		bemit8(0x84);
 		const arch_register_t *out = get_in_reg(node, n_ia32_Test8Bit_left);
+		bemit8(0x84);
 		if (get_ia32_op_type(node) == ia32_Normal) {
 			const arch_register_t *in = get_in_reg(node, n_ia32_Test8Bit_right);
 			bemit_modrr(out, in);
@@ -3061,31 +3149,16 @@ UNOPMEM(negmem, 0xF6, 3)
 UNOPMEM(incmem, 0xFE, 0)
 UNOPMEM(decmem, 0xFE, 1)
 
-static void bemit_set(const ir_node *node)
-{
-	pn_Cmp pnc;
-
-	bemit8(0x0F);
-
-	pnc = get_ia32_condcode(node);
-	pnc = determine_final_pnc(node, n_ia32_Set_eflags, pnc);
-	if (get_ia32_attr_const(node)->data.ins_permuted)
-		pnc = ia32_get_negated_pnc(pnc);
-
-	bemit8(0x90 + pnc2cc(pnc));
-	bemit_modru(get_out_reg(node, pn_ia32_Set_res), 2);
-}
-
 static void bemit_ldtls(const ir_node *node)
 {
 	const arch_register_t *out = get_out_reg(node, 0);
 
 	bemit8(0x65); // gs:
-	if (out->index == REG_EAX) {
+	if (out->index == REG_GP_EAX) {
 		bemit8(0xA1); // movl 0, %eax
 	} else {
 		bemit8(0x8B); // movl 0, %reg
-		bemit8(MOD_IND | ENC_REG(out->index) | ENC_RM(0x05));
+		bemit8(MOD_IND | ENC_REG(reg_gp_map[out->index]) | ENC_RM(0x05));
 	}
 	bemit32(0);
 }
@@ -3100,6 +3173,109 @@ static void bemit_lea(const ir_node *node)
 	bemit_mod_am(reg_gp_map[out->index], node);
 }
 
+/* helper function for bemit_minus64bit */
+static void bemit_helper_mov(const arch_register_t *src, const arch_register_t *dst)
+{
+	bemit8(0x8B); // movl %src, %dst
+	bemit_modrr(src, dst);
+}
+
+/* helper function for bemit_minus64bit */
+static void bemit_helper_neg(const arch_register_t *reg)
+{
+	bemit8(0xF7); // negl %reg
+	bemit_modru(reg, 3);
+}
+
+/* helper function for bemit_minus64bit */
+static void bemit_helper_sbb0(const arch_register_t *reg)
+{
+	bemit8(0x83); // sbbl $0, %reg
+	bemit_modru(reg, 3);
+	bemit8(0);
+}
+
+/* helper function for bemit_minus64bit */
+static void bemit_helper_sbb(const arch_register_t *src, const arch_register_t *dst)
+{
+	bemit8(0x1B); // sbbl %src, %dst
+	bemit_modrr(src, dst);
+}
+
+/* helper function for bemit_minus64bit */
+static void bemit_helper_xchg(const arch_register_t *src, const arch_register_t *dst)
+{
+	if (src->index == REG_GP_EAX) {
+		bemit8(0x90 + reg_gp_map[dst->index]); // xchgl %eax, %dst
+	} else if (dst->index == REG_GP_EAX) {
+		bemit8(0x90 + reg_gp_map[src->index]); // xchgl %src, %eax
+	} else {
+		bemit8(0x87); // xchgl %src, %dst
+		bemit_modrr(src, dst);
+	}
+}
+
+/* helper function for bemit_minus64bit */
+static void bemit_helper_zero(const arch_register_t *reg)
+{
+	bemit8(0x33); // xorl %reg, %reg
+	bemit_modrr(reg, reg);
+}
+
+static void bemit_minus64bit(const ir_node *node)
+{
+	const arch_register_t *in_lo  = get_in_reg(node, 0);
+	const arch_register_t *in_hi  = get_in_reg(node, 1);
+	const arch_register_t *out_lo = get_out_reg(node, 0);
+	const arch_register_t *out_hi = get_out_reg(node, 1);
+
+	if (out_lo == in_lo) {
+		if (out_hi != in_hi) {
+			/* a -> a, b -> d */
+			goto zero_neg;
+		} else {
+			/* a -> a, b -> b */
+			goto normal_neg;
+		}
+	} else if (out_lo == in_hi) {
+		if (out_hi == in_lo) {
+			/* a -> b, b -> a */
+			bemit_helper_xchg(in_lo, in_hi);
+			goto normal_neg;
+		} else {
+			/* a -> b, b -> d */
+			bemit_helper_mov(in_hi, out_hi);
+			bemit_helper_mov(in_lo, out_lo);
+			goto normal_neg;
+		}
+	} else {
+		if (out_hi == in_lo) {
+			/* a -> c, b -> a */
+			bemit_helper_mov(in_lo, out_lo);
+			goto zero_neg;
+		} else if (out_hi == in_hi) {
+			/* a -> c, b -> b */
+			bemit_helper_mov(in_lo, out_lo);
+			goto normal_neg;
+		} else {
+			/* a -> c, b -> d */
+			bemit_helper_mov(in_lo, out_lo);
+			goto zero_neg;
+		}
+	}
+
+normal_neg:
+	bemit_helper_neg( out_hi);
+	bemit_helper_neg( out_lo);
+	bemit_helper_sbb0(out_hi);
+	return;
+
+zero_neg:
+	bemit_helper_zero(out_hi);
+	bemit_helper_neg( out_lo);
+	bemit_helper_sbb( in_hi, out_hi);
+}
+
 /**
  * Emit a single opcode.
  */
@@ -3139,7 +3315,7 @@ static void bemit_load(const ir_node *node)
 {
 	const arch_register_t *out = get_out_reg(node, 0);
 
-	if (out->index == REG_EAX) {
+	if (out->index == REG_GP_EAX) {
 		ir_node   *base      = get_irn_n(node, n_ia32_base);
 		int        has_base  = !is_ia32_NoReg_GP(base);
 		ir_node   *index     = get_irn_n(node, n_ia32_index);
@@ -3184,7 +3360,7 @@ static void bemit_store(const ir_node *node)
 	} else {
 		const arch_register_t *in = get_in_reg(node, n_ia32_Store_val);
 
-		if (in->index == REG_EAX) {
+		if (in->index == REG_GP_EAX) {
 			ir_node   *base      = get_irn_n(node, n_ia32_base);
 			int        has_base  = !is_ia32_NoReg_GP(base);
 			ir_node   *index     = get_irn_n(node, n_ia32_index);
@@ -3402,6 +3578,67 @@ emit_jcc:
 	}
 }
 
+static void bemit_switchjmp(const ir_node *node)
+{
+	unsigned long          interval;
+	int                    last_value;
+	int                    i;
+	jmp_tbl_t              tbl;
+	const arch_register_t *in;
+
+	/* fill the table structure */
+	generate_jump_table(&tbl, node);
+
+	/* two-complement's magic make this work without overflow */
+	interval = tbl.max_value - tbl.min_value;
+
+	in = get_in_reg(node, 0);
+	/* emit the table */
+	if (get_signed_imm_size(interval) == 1) {
+		bemit8(0x83); // cmpl $imm8, %in
+		bemit_modru(in, 7);
+		bemit8(interval);
+	} else {
+		bemit8(0x81); // cmpl $imm32, %in
+		bemit_modru(in, 7);
+		bemit32(interval);
+	}
+	bemit8(0x0F); // ja tbl.defProj
+	bemit8(0x87);
+	ia32_emitf(tbl.defProj, ".long %L - . - 4\n");
+
+	if (tbl.num_branches > 1) {
+		/* create table */
+		bemit8(0xFF); // jmp *tbl.label(,%in,4)
+		bemit8(MOD_IND | ENC_REG(4) | ENC_RM(0x04));
+		bemit8(ENC_SIB(2, reg_gp_map[in->index], 0x05));
+		be_emit_irprintf("\t.long %s\n", tbl.label);
+
+		be_gas_emit_switch_section(GAS_SECTION_RODATA);
+		be_emit_cstring(".align 4\n");
+		be_emit_irprintf("%s:\n", tbl.label);
+
+		last_value = tbl.branches[0].value;
+		for (i = 0; i != tbl.num_branches; ++i) {
+			while (last_value != tbl.branches[i].value) {
+				ia32_emitf(tbl.defProj, ".long %L\n");
+				++last_value;
+			}
+			ia32_emitf(tbl.branches[i].target, ".long %L\n");
+			++last_value;
+		}
+		be_gas_emit_switch_section(GAS_SECTION_TEXT);
+	} else {
+		/* one jump is enough */
+		panic("switch only has one case");
+		//ia32_emitf(tbl.branches[0].target, "\tjmp %L\n");
+	}
+
+	be_emit_write_line();
+
+	free(tbl.branches);
+}
+
 /**
  * Emits a return.
  */
@@ -3857,7 +4094,7 @@ static void ia32_register_binary_emitters(void)
 	register_emitter(op_ia32_AndMem,        bemit_andmem);
 	register_emitter(op_ia32_AndMem8Bit,    bemit_andmem8bit);
 	register_emitter(op_ia32_Breakpoint,    bemit_int3);
-	register_emitter(op_ia32_CMov,          bemit_cmov);
+	register_emitter(op_ia32_CMovcc,        bemit_cmovcc);
 	register_emitter(op_ia32_Call,          bemit_call);
 	register_emitter(op_ia32_Cltd,          bemit_cltd);
 	register_emitter(op_ia32_Cmc,           bemit_cmc);
@@ -3891,6 +4128,7 @@ static void ia32_register_binary_emitters(void)
 	register_emitter(op_ia32_Lea,           bemit_lea);
 	register_emitter(op_ia32_Leave,         bemit_leave);
 	register_emitter(op_ia32_Load,          bemit_load);
+	register_emitter(op_ia32_Minus64Bit,    bemit_minus64bit);
 	register_emitter(op_ia32_Mul,           bemit_mul);
 	register_emitter(op_ia32_Neg,           bemit_neg);
 	register_emitter(op_ia32_NegMem,        bemit_negmem);
@@ -3912,7 +4150,7 @@ static void ia32_register_binary_emitters(void)
 	register_emitter(op_ia32_Sar,           bemit_sar);
 	register_emitter(op_ia32_SarMem,        bemit_sarmem);
 	register_emitter(op_ia32_Sbb,           bemit_sbb);
-	register_emitter(op_ia32_Set,           bemit_set);
+	register_emitter(op_ia32_Setcc,         bemit_setcc);
 	register_emitter(op_ia32_Shl,           bemit_shl);
 	register_emitter(op_ia32_ShlD,          bemit_shld);
 	register_emitter(op_ia32_ShlMem,        bemit_shlmem);
@@ -3926,6 +4164,7 @@ static void ia32_register_binary_emitters(void)
 	register_emitter(op_ia32_SubMem,        bemit_submem);
 	register_emitter(op_ia32_SubMem8Bit,    bemit_submem8bit);
 	register_emitter(op_ia32_SubSP,         bemit_subsp);
+	register_emitter(op_ia32_SwitchJmp,     bemit_switchjmp);
 	register_emitter(op_ia32_Test,          bemit_test);
 	register_emitter(op_ia32_Test8Bit,      bemit_test8bit);
 	register_emitter(op_ia32_Xor,           bemit_xor);
@@ -3980,13 +4219,15 @@ static void gen_binary_block(ir_node *block)
 	}
 }
 
-void ia32_gen_binary_routine(ia32_code_gen_t *ia32_cg, ir_graph *irg)
+void ia32_gen_binary_routine(ir_graph *irg)
 {
-	ir_entity *entity     = get_irg_entity(irg);
+	ir_entity        *entity    = get_irg_entity(irg);
+	const arch_env_t *arch_env  = be_get_irg_arch_env(irg);
+	ia32_irg_data_t  *irg_data  = ia32_get_irg_data(irg);
+	ir_node         **blk_sched = irg_data->blk_sched;
 	int i, n;
 
-	cg  = ia32_cg;
-	isa = cg->isa;
+	isa = (ia32_isa_t*) arch_env;
 
 	ia32_register_binary_emitters();
 
@@ -3997,16 +4238,16 @@ void ia32_gen_binary_routine(ia32_code_gen_t *ia32_cg, ir_graph *irg)
 	irg_block_walk_graph(irg, ia32_gen_labels, NULL, NULL);
 
 	/* initialize next block links */
-	n = ARR_LEN(cg->blk_sched);
+	n = ARR_LEN(blk_sched);
 	for (i = 0; i < n; ++i) {
-		ir_node *block = cg->blk_sched[i];
-		ir_node *prev  = i > 0 ? cg->blk_sched[i-1] : NULL;
+		ir_node *block = blk_sched[i];
+		ir_node *prev  = i > 0 ? blk_sched[i-1] : NULL;
 
 		set_irn_link(block, prev);
 	}
 
 	for (i = 0; i < n; ++i) {
-		ir_node *block = cg->blk_sched[i];
+		ir_node *block = blk_sched[i];
 		gen_binary_block(block);
 	}
 
@@ -4019,8 +4260,6 @@ void ia32_gen_binary_routine(ia32_code_gen_t *ia32_cg, ir_graph *irg)
 }
 
 
-
-
 void ia32_init_emitter(void)
 {
 	lc_opt_entry_t *be_grp;