X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_emitter.c;h=8612528a56045f59b5d1ff036b1a4eedea20028e;hb=61f4d246e707173f272e6ead6f42360a4674f951;hp=4678e7ef62427b0795441b741555d5ec8c981cb8;hpb=04ca356a8165637c38566714c4293cef2bc9eb32;p=libfirm diff --git a/ir/be/ia32/ia32_emitter.c b/ir/be/ia32/ia32_emitter.c index 4678e7ef6..8612528a5 100644 --- a/ir/be/ia32/ia32_emitter.c +++ b/ir/be/ia32/ia32_emitter.c @@ -1,6 +1,6 @@ /** * This file implements the node emitter. - * + * @author Christian Wuerdig * $Id$ */ @@ -49,10 +49,20 @@ void ia32_switch_section(FILE *F, section_t sec) { static section_t curr_sec = NO_SECTION; static const char *text[ASM_MAX][SECTION_MAX] = { { - ".section\t.text", ".section\t.data", ".section\t.rodata", ".section\t.text" + ".section\t.text", + ".section\t.data", + ".section\t.rodata", + ".section\t.text", + ".section\t.tbss,\"awT\",@nobits", + ".section\t.ctors,\"aw\",@progbits" }, { - ".section\t.text", ".section\t.data", ".section .rdata,\"dr\"", ".section\t.text" + ".section\t.text", + ".section\t.data", + ".section .rdata,\"dr\"", + ".section\t.text", + ".section\t.tbss,\"awT\",@nobits", + ".section\t.ctors,\"aw\",@progbits" } }; @@ -69,7 +79,13 @@ void ia32_switch_section(FILE *F, section_t sec) { case SECTION_DATA: case SECTION_RODATA: case SECTION_COMMON: + case SECTION_TLS: + case SECTION_CTOR: fprintf(F, "\t%s\n", text[asm_flavour][sec]); + break; + + default: + break; } } @@ -82,6 +98,8 @@ static void ia32_dump_function_object(FILE *F, const char *name) case ASM_MINGW_GAS: fprintf(F, "\t.def\t%s;\t.scl\t2;\t.type\t32;\t.endef\n", name); break; + default: + break; } } @@ -91,6 +109,8 @@ static void ia32_dump_function_size(FILE *F, const char *name) case ASM_LINUX_GAS: fprintf(F, "\t.size\t%s, .-%s\n", name, name); break; + default: + break; } } @@ -293,7 +313,9 @@ static int ia32_get_mode_suffix(lc_appendable_t *app, ir_mode *mode = get_irn_mode(irn); if (mode == mode_T) { - mode = (is_ia32_Ld(irn) || is_ia32_St(irn)) ? get_ia32_ls_mode(irn) : get_ia32_res_mode(irn); + mode = get_ia32_res_mode(irn); + if (! mode) + mode = get_ia32_ls_mode(irn); } if (! irn) @@ -359,6 +381,8 @@ const char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) { is_ia32_Store8Bit(n) || \ is_ia32_CondJmp(n) || \ is_ia32_xCondJmp(n) || \ + is_ia32_CmpSet(n) || \ + is_ia32_xCmpSet(n) || \ is_ia32_SwitchJmp(n))) if (! buf) { @@ -370,9 +394,12 @@ const char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) { switch(get_ia32_op_type(n)) { case ia32_Normal: - if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) { + if (is_ia32_ImmConst(n)) { lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n)); } + else if (is_ia32_ImmSymConst(n)) { + lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, OFFSET FLAT:%s", n, get_ia32_cnst(n)); + } else { const arch_register_t *in1 = get_in_reg(n, 2); const arch_register_t *in2 = get_in_reg(n, 3); @@ -414,9 +441,9 @@ const char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) { get_ia32_cnst(n)); /* tell the assembler to store it's address. */ } else { - const arch_register_t *in1 = get_in_reg(n, 2); - ir_mode *mode = get_ia32_res_mode(n); - const char *in_name; + const arch_register_t *in1 = get_in_reg(n, get_irn_arity(n) == 5 ? 3 : 2); + ir_mode *mode = get_ia32_res_mode(n); + const char *in_name; mode = mode ? mode : get_ia32_ls_mode(n); in_name = ia32_get_reg_name_for_mode(env, mode, in1); @@ -510,8 +537,6 @@ const char *ia32_emit_x87_binop(const ir_node *n, ia32_emit_env_t *env) { assert(0 && "unsupported op type"); } -#undef PRODUCES_RESULT - return buf; } @@ -534,12 +559,25 @@ const char *ia32_emit_unop(const ir_node *n, ia32_emit_env_t *env) { lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%C", n); } else { - lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n); + if (is_ia32_MulS(n) || is_ia32_Mulh(n)) { + /* MulS and Mulh implicitly multiply by EAX */ + lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%4S", n); + } + else + lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n); } break; case ia32_AddrModeD: snprintf(buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env)); break; + case ia32_AddrModeS: + /* + Mulh is emitted via emit_unop + imul [MEM] means EDX:EAX <- EAX * [MEM] + */ + assert((is_ia32_Mulh(n) || is_ia32_MulS(n)) && "Only MulS and Mulh can have AM source as unop"); + lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env)); + break; default: assert(0 && "unsupported op type"); } @@ -555,7 +593,6 @@ const char *ia32_emit_am(const ir_node *n, ia32_emit_env_t *env) { int had_output = 0; char *s; const char *p; - int size; static struct obstack *obst = NULL; ir_mode *mode = get_ia32_ls_mode(n); @@ -572,7 +609,7 @@ const char *ia32_emit_am(const ir_node *n, ia32_emit_env_t *env) { /* obstack_free with NULL results in an uninitialized obstack */ obstack_init(obst); - p = pointer_size(mode, has_x87_register(n)); + p = pointer_size(mode, has_x87_register(n) || is_ia32_GetST0(n) || is_ia32_SetST0(n)); if (p) obstack_printf(obst, "%s ", p); @@ -625,9 +662,8 @@ const char *ia32_emit_am(const ir_node *n, ia32_emit_env_t *env) { if (had_output) obstack_printf(obst, "] "); - size = obstack_object_size(obst); - s = obstack_finish(obst); - s[size - 1] = '\0'; + obstack_1grow(obst, '\0'); + s = obstack_finish(obst); return s; } @@ -706,12 +742,12 @@ static const struct cmp2conditon_t cmp2condition_s[] = { { "ne", pn_Cmp_Lg }, /* != */ { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */ { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */ - { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */ - { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */ - { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */ - { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */ - { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */ - { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */ + { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */ + { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */ + { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */ + { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */ + { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */ + { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */ { NULL, pn_Cmp_True }, /* always true */ }; @@ -728,12 +764,12 @@ static const struct cmp2conditon_t cmp2condition_u[] = { { "ne", pn_Cmp_Lg }, /* != */ { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */ { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */ - { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */ - { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */ - { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */ - { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */ - { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */ - { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */ + { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */ + { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */ + { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */ + { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */ + { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */ + { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */ { NULL, pn_Cmp_True }, /* always true */ }; @@ -796,56 +832,59 @@ static ir_node *get_proj(const ir_node *irn, long proj) { * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false) */ static void finish_CondJmp(FILE *F, const ir_node *irn, ir_mode *mode) { - const ir_node *proj1, *proj2 = NULL; - const ir_node *block, *next_bl = NULL; + const ir_node *proj_true; + const ir_node *proj_false; + const ir_node *block; + const ir_node *next_block; char buf[SNPRINTF_BUF_LEN]; char cmd_buf[SNPRINTF_BUF_LEN]; char cmnt_buf[SNPRINTF_BUF_LEN]; + int is_unsigned; + int pnc; + int flipped = 0; /* get both Proj's */ - proj1 = get_proj(irn, pn_Cond_true); - assert(proj1 && "CondJmp without true Proj"); + proj_true = get_proj(irn, pn_Cond_true); + assert(proj_true && "CondJmp without true Proj"); - proj2 = get_proj(irn, pn_Cond_false); - assert(proj2 && "CondJmp without false Proj"); + proj_false = get_proj(irn, pn_Cond_false); + assert(proj_false && "CondJmp without false Proj"); + + pnc = get_ia32_pncode(irn); /* for now, the code works for scheduled and non-schedules blocks */ block = get_nodes_block(irn); /* we have a block schedule */ - next_bl = next_blk_sched(block); + next_block = next_blk_sched(block); - if (get_cfop_target_block(proj1) == next_bl) { + if (get_cfop_target_block(proj_true) == next_block) { /* exchange both proj's so the second one can be omitted */ - const ir_node *t = proj1; - proj1 = proj2; - proj2 = t; + const ir_node *t = proj_true; + proj_true = proj_false; + proj_false = t; + + flipped = 1; + pnc = get_negated_pnc(pnc, mode); } /* the first Proj must always be created */ - if (get_Proj_proj(proj1) == pn_Cond_true) { - snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s", - get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))), - get_cfop_target(proj1, buf)); - snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == TRUE */"); - } - else { - snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s", - get_cmp_suffix(get_negated_pnc(get_ia32_pncode(irn), mode), - !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))), - get_cfop_target(proj1, buf)); - snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == FALSE */"); - } + is_unsigned = mode_is_float(mode) || ! mode_is_signed(mode); + snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s", + get_cmp_suffix(pnc, is_unsigned), + get_cfop_target(proj_true, buf)); + snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* %s(a, b) %s*/", + get_pnc_string(pnc), flipped ? "(was flipped)" : ""); IA32_DO_EMIT(irn); /* the second Proj might be a fallthrough */ - if (get_cfop_target_block(proj2) != next_bl) { - snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj2, buf)); + if (get_cfop_target_block(proj_false) != next_block) { + snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj_false, buf)); snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* otherwise */"); } else { cmd_buf[0] = '\0'; - snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(proj2, buf)); + snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(proj_false, buf)); } IA32_DO_EMIT(irn); } @@ -925,6 +964,21 @@ static void emit_ia32_CJmpAM(const ir_node *irn, ia32_emit_env_t *env) { finish_CondJmp(F, irn, get_ia32_res_mode(irn)); } +/** + * Emits code for conditional SSE floating point jump with two variables. + */ +static void emit_ia32_xCondJmp(ir_node *irn, ia32_emit_env_t *env) { + FILE *F = env->out; + char cmd_buf[SNPRINTF_BUF_LEN]; + char cmnt_buf[SNPRINTF_BUF_LEN]; + + lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %s", irn, ia32_emit_binop(irn, env)); + lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn); + IA32_DO_EMIT(irn); + finish_CondJmp(F, irn, mode_F); + +} + /** * Emits code for conditional x87 floating point jump with two variables. */ @@ -937,7 +991,7 @@ static void emit_ia32_x87CondJmp(ir_node *irn, ia32_emit_env_t *env) { const char *instr = "fcom"; int reverse = 0; - switch (get_ia32_pncode(irn)) { + switch (get_ia32_irn_opcode(irn)) { case iro_ia32_fcomrJmp: reverse = 1; case iro_ia32_fcomJmp: @@ -958,12 +1012,11 @@ static void emit_ia32_x87CondJmp(ir_node *irn, ia32_emit_env_t *env) { } if (reverse) - set_ia32_pncode(irn, (long)get_negated_pnc(get_ia32_pncode(irn), mode_Is)); + set_ia32_pncode(irn, (long)get_inversed_pnc(get_ia32_pncode(irn))); - snprintf(cmd_buf, SNPRINTF_BUF_LEN, "%s %s", instr, reg); + snprintf(cmd_buf, SNPRINTF_BUF_LEN, "%s %s%s", instr, reg[0] == '\0' ? "" : "%", reg); lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn); IA32_DO_EMIT(irn); -// lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %3D", irn); lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %%ax", irn); snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store x87 FPU Control Word */"); IA32_DO_EMIT(irn); @@ -971,26 +1024,44 @@ static void emit_ia32_x87CondJmp(ir_node *irn, ia32_emit_env_t *env) { snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store ah into flags */"); IA32_DO_EMIT(irn); - finish_CondJmp(F, irn, mode_Is); + /* the compare flags must be evaluated using carry , ie unsigned */ + finish_CondJmp(F, irn, mode_Iu); } -static void emit_ia32_CMov(ir_node *irn, ia32_emit_env_t *env) { +static void CMov_emitter(ir_node *irn, ia32_emit_env_t *env) { FILE *F = env->out; const lc_arg_env_t *arg_env = ia32_get_arg_env(); - const char *cmp_suffix = get_cmp_suffix(get_ia32_pncode(irn), ! mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))); + ir_mode *mode = get_irn_mode(get_irn_n(irn, 0)); + int is_unsigned = mode_is_float(mode) || ! mode_is_signed(mode); + const char *cmp_suffix = get_cmp_suffix(get_ia32_pncode(irn), is_unsigned); + int is_PsiCondCMov = is_ia32_PsiCondCMov(irn); + int idx_left = 2 - is_PsiCondCMov; + int idx_right = 3 - is_PsiCondCMov; char cmd_buf[SNPRINTF_BUF_LEN]; char cmnt_buf[SNPRINTF_BUF_LEN]; const arch_register_t *in1, *in2, *out; out = arch_get_irn_register(env->arch_env, irn); - in1 = arch_get_irn_register(env->arch_env, get_irn_n(irn, 2)); - in2 = arch_get_irn_register(env->arch_env, get_irn_n(irn, 3)); + in1 = arch_get_irn_register(env->arch_env, get_irn_n(irn, idx_left)); + in2 = arch_get_irn_register(env->arch_env, get_irn_n(irn, idx_right)); /* we have to emit the cmp first, because the destination register */ /* could be one of the compare registers */ - lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %2S", irn, irn); - lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* Psi condition */" ); + if (is_ia32_CmpCMov(irn)) { + lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %2S", irn, irn); + } + else if (is_ia32_xCmpCMov(irn)) { + lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %1S, %2S", get_irn_n(irn, 0), irn, irn); + } + else if (is_PsiCondCMov) { + /* omit compare because flags are already set by And/Or */ + lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "test %1S, %1S", irn, irn); + } + else { + assert(0 && "unsupported CMov"); + } + snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Psi condition */" ); IA32_DO_EMIT(irn); if (REGS_ARE_EQUAL(out, in2)) { @@ -998,30 +1069,50 @@ static void emit_ia32_CMov(ir_node *irn, ia32_emit_env_t *env) { } else if (REGS_ARE_EQUAL(out, in1)) { /* true in == out -> need complement compare and exchange true and default in */ - ir_node *t = get_irn_n(irn, 2); - set_irn_n(irn, 2, get_irn_n(irn, 3)); - set_irn_n(irn, 3, t); + ir_node *t = get_irn_n(irn, idx_left); + set_irn_n(irn, idx_left, get_irn_n(irn, idx_right)); + set_irn_n(irn, idx_right, t); - cmp_suffix = get_cmp_suffix(get_inversed_pnc(get_ia32_pncode(irn)), ! mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))); + cmp_suffix = get_cmp_suffix(get_negated_pnc(get_ia32_pncode(irn), get_irn_mode(irn)), is_unsigned); } else { /* out is different from in: need copy default -> out */ - lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %4S", irn, irn); + if (is_PsiCondCMov) + lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %3S", irn, irn); + else + lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %4S", irn, irn); + lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* copy default -> out */" ); IA32_DO_EMIT(irn); } - lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmov%s %1D, %3S", cmp_suffix, irn, irn); + if (is_PsiCondCMov) + lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmov%s %1D, %2S", cmp_suffix, irn, irn); + else + lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmov%s %1D, %3S", cmp_suffix, irn, irn); + lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* condition is true case */" ); IA32_DO_EMIT(irn); } -static void emit_ia32_Set(ir_node *irn, ia32_emit_env_t *env) { +static void emit_ia32_CmpCMov(ir_node *irn, ia32_emit_env_t *env) { + CMov_emitter(irn, env); +} + +static void emit_ia32_PsiCondCMov(ir_node *irn, ia32_emit_env_t *env) { + CMov_emitter(irn, env); +} + +static void emit_ia32_xCmpCMov(ir_node *irn, ia32_emit_env_t *env) { + CMov_emitter(irn, env); +} + +static void Set_emitter(ir_node *irn, ir_mode *mode, ia32_emit_env_t *env) { FILE *F = env->out; const lc_arg_env_t *arg_env = ia32_get_arg_env(); - const char *cmp_suffix = get_cmp_suffix(get_ia32_pncode(irn), ! mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))); - const char *instr = "xor"; + int is_unsigned = mode_is_float(mode) || ! mode_is_signed(mode); + const char *cmp_suffix = get_cmp_suffix(get_ia32_pncode(irn), is_unsigned); const char *reg8bit; char cmd_buf[SNPRINTF_BUF_LEN]; @@ -1031,17 +1122,25 @@ static void emit_ia32_Set(ir_node *irn, ia32_emit_env_t *env) { out = arch_get_irn_register(env->arch_env, irn); reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out); - if (env->isa->opt_arch == arch_pentium_4) { - /* P4 prefers sub r, r, others xor r, r */ - instr = "sub"; + if (is_ia32_CmpSet(irn)) { + lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env)); } - - lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %1D", instr, irn, irn); - snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* clear target as set modifies only lower 8 bit */"); + else if (is_ia32_xCmpSet(irn)) { + lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %s", get_irn_n(irn, 2), ia32_emit_binop(irn, env)); + } + else if (is_ia32_PsiCondSet(irn)) { + /* omit compare because flags are already set by And/Or */ + snprintf(cmd_buf, SNPRINTF_BUF_LEN, " "); + } + else { + assert(0 && "unsupported Set"); + } + snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* calculate Psi condition */" ); IA32_DO_EMIT(irn); - lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %2S", irn, irn); - snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* calculate Psi condition */" ); + /* use mov to clear target because it doesn't affect the eflags */ + snprintf(cmd_buf, SNPRINTF_BUF_LEN, "mov %%%s, 0", arch_register_get_name(out)); + snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* clear target as set modifies only lower 8 bit */"); IA32_DO_EMIT(irn); snprintf(cmd_buf, SNPRINTF_BUF_LEN, "set%s %%%s", cmp_suffix, reg8bit); @@ -1049,45 +1148,96 @@ static void emit_ia32_Set(ir_node *irn, ia32_emit_env_t *env) { IA32_DO_EMIT(irn); } +static void emit_ia32_CmpSet(ir_node *irn, ia32_emit_env_t *env) { + Set_emitter(irn, get_irn_mode(get_irn_n(irn, 2)), env); +} + +static void emit_ia32_PsiCondSet(ir_node *irn, ia32_emit_env_t *env) { + Set_emitter(irn, get_irn_mode(get_irn_n(irn, 0)), env); +} + +static void emit_ia32_xCmpSet(ir_node *irn, ia32_emit_env_t *env) { + Set_emitter(irn, get_irn_mode(get_irn_n(irn, 2)), env); +} + static void emit_ia32_xCmp(ir_node *irn, ia32_emit_env_t *env) { FILE *F = env->out; const lc_arg_env_t *arg_env = ia32_get_arg_env(); int sse_pnc = -1; + long pnc = get_ia32_pncode(irn); + long unord = pnc & pn_Cmp_Uo; char cmd_buf[SNPRINTF_BUF_LEN]; char cmnt_buf[SNPRINTF_BUF_LEN]; - switch (get_ia32_pncode(irn)) { + switch (pnc) { case pn_Cmp_Leg: /* odered */ sse_pnc = 7; break; case pn_Cmp_Uo: /* unordered */ sse_pnc = 3; break; - case pn_Cmp_Ue: /* == */ + case pn_Cmp_Ue: + case pn_Cmp_Eq: /* == */ sse_pnc = 0; break; - case pn_Cmp_Ul: /* < */ + case pn_Cmp_Ul: + case pn_Cmp_Lt: /* < */ sse_pnc = 1; break; - case pn_Cmp_Ule: /* <= */ + case pn_Cmp_Ule: + case pn_Cmp_Le: /* <= */ sse_pnc = 2; break; - case pn_Cmp_Ug: /* > */ + case pn_Cmp_Ug: + case pn_Cmp_Gt: /* > */ sse_pnc = 6; break; - case pn_Cmp_Uge: /* >= */ + case pn_Cmp_Uge: + case pn_Cmp_Ge: /* >= */ sse_pnc = 5; break; - case pn_Cmp_Ne: /* != */ + case pn_Cmp_Ne: + case pn_Cmp_Lg: /* != */ sse_pnc = 4; break; } - lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmps%M %s, %d", irn, ia32_emit_binop(irn, env), sse_pnc); - lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* SSE compare with result in %1D */", irn); + assert(sse_pnc >= 0 && "unsupported compare"); + + if (unord && sse_pnc != 3) { + /* + We need a separate compare against unordered. + Quick and Dirty solution: + - get some memory on stack + - compare + - store result + - compare + - and result and stored result + - cleanup stack + */ + snprintf(cmd_buf, SNPRINTF_BUF_LEN, "sub %%esp, 8"); + snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* reserve some space for unordered compare result */"); + IA32_DO_EMIT(NULL); + snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmpsd %s, 3", ia32_emit_binop(irn, env)); + snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* SSE compare: unordered */"); + IA32_DO_EMIT(NULL); + lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "movsd [%%esp], %1D", irn); + snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* store compare result */"); + IA32_DO_EMIT(NULL); + } + + snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmpsd %s, %d", ia32_emit_binop(irn, env), sse_pnc); + lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* SSE compare (%+F) with result in %1D */", irn, irn); IA32_DO_EMIT(irn); - assert(sse_pnc >= 0 && "unsupported floating point compare"); + if (unord && sse_pnc != 3) { + lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "andpd %1D, [%%esp]", irn); + snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* build the final result */"); + IA32_DO_EMIT(NULL); + snprintf(cmd_buf, SNPRINTF_BUF_LEN, "add %%esp, 8"); + snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* free allocated space */"); + IA32_DO_EMIT(NULL); + } } /********************************************************* @@ -1148,7 +1298,7 @@ static void emit_ia32_SwitchJmp(const ir_node *irn, ia32_emit_env_t *emit_env) { /* fill the table structure */ tbl.label = xmalloc(SNPRINTF_BUF_LEN); - tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, "JMPTBL_"); + tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_"); tbl.defProj = NULL; tbl.num_branches = get_irn_n_edges(irn); tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0])); @@ -1302,25 +1452,27 @@ static void emit_Proj(const ir_node *irn, ia32_emit_env_t *env) { /** * Emit movsb/w instructions to make mov count divideable by 4 */ -static void emit_CopyB_prolog(FILE *F, int rem, int size) { +static void emit_CopyB_prolog(FILE *F, const ir_node *irn, int rem) { char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN]; - fprintf(F, "\t/* memcopy %d bytes*/\n", size); + ir_fprintf(F, "\t/* memcopy prolog %+F */\n", irn); snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cld"); - snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* copy direction forward*/"); - IA32_DO_EMIT(NULL); + snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* copy direction forward */"); switch(rem) { case 1: + IA32_DO_EMIT(NULL); snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb"); snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 1 */"); break; case 2: + IA32_DO_EMIT(NULL); snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw"); snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 2 */"); break; case 3: + IA32_DO_EMIT(NULL); snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb"); snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */"); IA32_DO_EMIT(NULL); @@ -1336,18 +1488,12 @@ static void emit_CopyB_prolog(FILE *F, int rem, int size) { * Emit rep movsd instruction for memcopy. */ static void emit_ia32_CopyB(const ir_node *irn, ia32_emit_env_t *emit_env) { - FILE *F = emit_env->out; - tarval *tv = get_ia32_Immop_tarval(irn); - int rem = get_tarval_long(tv); - ir_node *size_node = get_irn_n(irn, 2); - int size; + FILE *F = emit_env->out; + tarval *tv = get_ia32_Immop_tarval(irn); + int rem = get_tarval_long(tv); char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN]; - /* beware: size_node could be a be_Copy to fulfill constraints for ecx */ - size_node = be_is_Copy(size_node) ? be_get_Copy_op(size_node) : size_node; - size = get_tarval_long(get_ia32_Immop_tarval(size_node)); - - emit_CopyB_prolog(F, rem, size); + emit_CopyB_prolog(F, irn, rem); snprintf(cmd_buf, SNPRINTF_BUF_LEN, "rep movsd"); snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy */"); @@ -1363,7 +1509,7 @@ static void emit_ia32_CopyB_i(const ir_node *irn, ia32_emit_env_t *emit_env) { FILE *F = emit_env->out; char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN]; - emit_CopyB_prolog(F, size & 0x3, size); + emit_CopyB_prolog(F, irn, size & 0x3); size >>= 2; while (size--) { @@ -1450,11 +1596,13 @@ static void emit_ia32_Conv_I2I(const ir_node *irn, ia32_emit_env_t *emit_env) { conv_cmd = "cbw"; else if (n == 16 || m == 16) conv_cmd = "cwde"; - else + else { + printf("%d -> %d unsupported\n", n, m); assert(0 && "unsupported Conv_I2I"); + } } - switch(get_ia32_op_type(irn)) { + switch(get_ia32_op_type(irn)) { case ia32_Normal: in_reg = get_in_reg(irn, 2); out_reg = get_out_reg(irn, 0); @@ -1526,7 +1674,7 @@ static void emit_be_Call(const ir_node *irn, ia32_emit_env_t *emit_env) { snprintf(cmd_buf, SNPRINTF_BUF_LEN, "call %s", get_entity_ld_name(ent)); } else { - lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "%1D", get_irn_n(irn, be_pos_Call_ptr)); + lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "call %1D", get_irn_n(irn, be_pos_Call_ptr)); } lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (be_Call) */", irn); @@ -1539,15 +1687,14 @@ static void emit_be_Call(const ir_node *irn, ia32_emit_env_t *emit_env) { */ static void emit_be_IncSP(const ir_node *irn, ia32_emit_env_t *emit_env) { FILE *F = emit_env->out; - unsigned offs = be_get_IncSP_offset(irn); - be_stack_dir_t dir = be_get_IncSP_direction(irn); + int offs = be_get_IncSP_offset(irn); char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN]; if (offs) { - if (dir == be_stack_dir_expand) + if (offs > 0) lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1S, %u", irn, offs); else - lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S, %u", irn, offs); + lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S, %u", irn, -offs); lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (IncSP) */", irn); } else { @@ -1571,15 +1718,15 @@ static void emit_be_SetSP(const ir_node *irn, ia32_emit_env_t *emit_env) { } /** - * Emits code for Copy. + * Emits code for Copy/CopyKeep. */ -static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) { - FILE *F = emit_env->out; +static void Copy_emitter(const ir_node *irn, ir_node *op, ia32_emit_env_t *emit_env) { + FILE *F = emit_env->out; const arch_env_t *aenv = emit_env->arch_env; char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN]; - if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, irn), arch_get_irn_register(aenv, be_get_Copy_op(irn))) || - be_is_unknown_reg(arch_get_irn_register(aenv, be_get_Copy_op(irn)))) + if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, irn), arch_get_irn_register(aenv, op)) || + be_is_unknown_reg(arch_get_irn_register(aenv, op))) return; if (mode_is_float(get_irn_mode(irn))) @@ -1590,14 +1737,47 @@ static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) { IA32_DO_EMIT(irn); } +static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) { + Copy_emitter(irn, be_get_Copy_op(irn), emit_env); +} + +static void emit_be_CopyKeep(const ir_node *irn, ia32_emit_env_t *emit_env) { + Copy_emitter(irn, be_get_CopyKeep_op(irn), emit_env); +} + /** * Emits code for exchange. */ static void emit_be_Perm(const ir_node *irn, ia32_emit_env_t *emit_env) { FILE *F = emit_env->out; char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN]; + const arch_register_t *in1, *in2; + const arch_register_class_t *cls1, *cls2; + + in1 = arch_get_irn_register(emit_env->arch_env, get_irn_n(irn, 0)); + in2 = arch_get_irn_register(emit_env->arch_env, get_irn_n(irn, 1)); + + cls1 = arch_register_get_class(in1); + cls2 = arch_register_get_class(in2); + + assert(cls1 == cls2 && "Register class mismatch at Perm"); + + if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) { + lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xchg %1S, %2S", irn, irn); + } + else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) { + lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, + "pxor %1S, %2S\n\tpxor %2S, %1S\n\tpxor %1S, %2S", irn, irn, irn, irn, irn, irn); + } + else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) { + /* is a NOP */ + cmd_buf[0] = '\0'; + } + else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) { + /* is a NOP */ + cmd_buf[0] = '\0'; + } - lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xchg %1S, %2S", irn, irn); lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%1A, %2A) */", irn, irn, irn); IA32_DO_EMIT(irn); } @@ -1606,39 +1786,91 @@ static void emit_be_Perm(const ir_node *irn, ia32_emit_env_t *emit_env) { * Emits code for Constant loading. */ static void emit_ia32_Const(const ir_node *n, ia32_emit_env_t *env) { - FILE *F = env->out; - char cmd_buf[256], cmnt_buf[256]; - const lc_arg_env_t *arg_env = ia32_get_arg_env(); + FILE *F = env->out; + char cmd_buf[256], cmnt_buf[256]; + const lc_arg_env_t *arg_env = ia32_get_arg_env(); - if (get_ia32_Immop_tarval(n) == get_tarval_null(get_irn_mode(n))) { + if (get_ia32_Immop_tarval(n) == get_tarval_null(get_irn_mode(n))) { const char *instr = "xor"; if (env->isa->opt_arch == arch_pentium_4) { /* P4 prefers sub r, r, others xor r, r */ instr = "sub"; } - lc_esnprintf(arg_env, cmd_buf, 256, "%s %1D, %1D ", instr, n, n); - lc_esnprintf(arg_env, cmnt_buf, 256, "/* optimized mov 0 to register */"); - } - else { - if (get_ia32_op_type(n) == ia32_SymConst) { - lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, OFFSET FLAT:%C ", n, n); - lc_esnprintf(arg_env, cmnt_buf, 256, "/* Move address of SymConst into register */"); - } + lc_esnprintf(arg_env, cmd_buf, 256, "%s %1D, %1D ", instr, n, n); + lc_esnprintf(arg_env, cmnt_buf, 256, "/* optimized mov 0 to register */"); + } + else { + if (get_ia32_op_type(n) == ia32_SymConst) { + lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, OFFSET FLAT:%C ", n, n); + lc_esnprintf(arg_env, cmnt_buf, 256, "/* Move address of SymConst into register */"); + } else { - lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, %C ", n, n); - lc_esnprintf(arg_env, cmnt_buf, 256, "/* Mov Const into register */"); + lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, %C ", n, n); + lc_esnprintf(arg_env, cmnt_buf, 256, "/* Mov Const into register */"); } - } - lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", cmd_buf, cmnt_buf, n, n); + } + lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", cmd_buf, cmnt_buf, n, n); +} + +/** + * Emits code to increase stack pointer. + */ +static void emit_ia32_AddSP(const ir_node *irn, ia32_emit_env_t *emit_env) { + FILE *F = emit_env->out; + char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN]; + + if (is_ia32_ImmConst(irn)) { + lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1D, %C", irn, irn); + } + else if (is_ia32_ImmSymConst(irn)) { + if (get_ia32_op_type(irn) == ia32_Normal) + lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1D, OFFSET_FLAT:%C", irn, irn); + else /* source address mode */ + lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1D, [%s%s]", irn, get_id_str(get_ia32_am_sc(irn)), get_ia32_am_offs(irn)); + } + else { + lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1D, %2S", irn, irn); + } + snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* reserve space on stack */"); + + IA32_DO_EMIT(irn); +} + +/** + * Emits code to load the TLS base + */ +static void emit_ia32_LdTls(const ir_node *irn, ia32_emit_env_t *emit_env) { + FILE *F = emit_env->out; + char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN]; + + switch (asm_flavour) { + case ASM_LINUX_GAS: + lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, DWORD PTR %%gs:0", irn); + break; + case ASM_MINGW_GAS: + lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, DWORD PTR %%gs:0", irn); + break; + default: + assert(0 && "unsupported TLS"); + break; + } + snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get thread local storage base */"); + + IA32_DO_EMIT(irn); } static void emit_be_Return(const ir_node *n, ia32_emit_env_t *env) { - FILE *F = env->out; - const lc_arg_env_t *arg_env = ia32_get_arg_env(); + FILE *F = env->out; + const lc_arg_env_t *arg_env = ia32_get_arg_env(); - lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", "ret", "/* be_Return */", n, n); + lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", "ret", "/* be_Return */", n, n); } +static void emit_Nothing(const ir_node *n, ia32_emit_env_t *env) { + FILE *F = env->out; + + ir_fprintf(F, "\t%35s /* %+F (%+G) */\n", " ", n, n); +} /*********************************************************************************** @@ -1660,7 +1892,9 @@ static void ia32_register_emitters(void) { #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b #define IA32_EMIT(a) IA32_EMIT2(a,a) #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a +#define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a +#define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing /* first clear the generic function pointer for all ops */ clear_irp_opcodes_generic_func(); @@ -1673,8 +1907,10 @@ static void ia32_register_emitters(void) { IA32_EMIT(TestJmp); IA32_EMIT(CJmp); IA32_EMIT(CJmpAM); - IA32_EMIT(CMov); - IA32_EMIT(Set); + IA32_EMIT(CmpCMov); + IA32_EMIT(PsiCondCMov); + IA32_EMIT(CmpSet); + IA32_EMIT(PsiCondSet); IA32_EMIT(SwitchJmp); IA32_EMIT(CopyB); IA32_EMIT(CopyB_i); @@ -1684,7 +1920,12 @@ static void ia32_register_emitters(void) { IA32_EMIT(Conv_I2I); IA32_EMIT(Conv_I2I8Bit); IA32_EMIT(Const); + IA32_EMIT(AddSP); + IA32_EMIT(LdTls); IA32_EMIT(xCmp); + IA32_EMIT(xCmpSet); + IA32_EMIT(xCmpCMov); + IA32_EMIT(xCondJmp); IA32_EMIT2(fcomJmp, x87CondJmp); IA32_EMIT2(fcompJmp, x87CondJmp); IA32_EMIT2(fcomppJmp, x87CondJmp); @@ -1697,15 +1938,23 @@ static void ia32_register_emitters(void) { BE_EMIT(IncSP); BE_EMIT(SetSP); BE_EMIT(Copy); + BE_EMIT(CopyKeep); BE_EMIT(Perm); BE_EMIT(Return); + BE_IGN(RegParams); + BE_IGN(Barrier); + BE_IGN(Keep); + /* firm emitter */ EMIT(Jmp); EMIT(Proj); + IGN(Phi); + IGN(Start); #undef BE_EMIT #undef EMIT +#undef IGN #undef IA32_EMIT2 #undef IA32_EMIT } @@ -1715,7 +1964,6 @@ static void ia32_register_emitters(void) { */ static void ia32_emit_node(const ir_node *irn, void *env) { ia32_emit_env_t *emit_env = env; - FILE *F = emit_env->out; ir_op *op = get_irn_op(irn); DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;) @@ -1726,7 +1974,8 @@ static void ia32_emit_node(const ir_node *irn, void *env) { (*emit)(irn, env); } else { - ir_fprintf(F, "\t%35s /* %+F (%+G) */\n", " ", irn, irn); + emit_Nothing(irn, env); + ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", irn, irn); } } @@ -1743,23 +1992,20 @@ static void ia32_emit_alignment(FILE *F, unsigned align, unsigned skip) { static void ia32_emit_align_func(FILE *F, cpu_support cpu) { unsigned align; unsigned maximum_skip; - /* gcc doesn't emit alignment for p4 ?*/ - if (cpu == arch_pentium_4) - return; - switch (cpu) { case arch_i386: - align = 2; maximum_skip = 3; + align = 2; break; case arch_i486: - align = 4; maximum_skip = 15; + align = 4; break; case arch_k6: - align = 5; maximum_skip = 31; + align = 5; break; default: - align = 4; maximum_skip = 15; + align = 4; } + maximum_skip = (1 << align) - 1; ia32_emit_alignment(F, align, maximum_skip); } @@ -1769,23 +2015,20 @@ static void ia32_emit_align_func(FILE *F, cpu_support cpu) { static void ia32_emit_align_label(FILE *F, cpu_support cpu) { unsigned align; unsigned maximum_skip; - /* gcc doesn't emit alignment for p4 ?*/ - if (cpu == arch_pentium_4) - return; - switch (cpu) { case arch_i386: - align = 2; maximum_skip = 3; + align = 2; break; case arch_i486: - align = 4; maximum_skip = 15; + align = 4; break; case arch_k6: - align = 5; maximum_skip = 7; + align = 5; break; default: - align = 4; maximum_skip = 7; + align = 4; } + maximum_skip = (1 << align) - 1; ia32_emit_alignment(F, align, maximum_skip); } @@ -1797,6 +2040,7 @@ static void ia32_gen_block(ir_node *block, void *env) { ia32_emit_env_t *emit_env = env; const ir_node *irn; int need_label = block != get_irg_start_block(get_irn_irg(block)); + FILE *F = emit_env->out; if (! is_Block(block)) return; @@ -1808,10 +2052,27 @@ static void ia32_gen_block(ir_node *block, void *env) { } if (need_label) { + char cmd_buf[SNPRINTF_BUF_LEN]; + int i, arity; + ia32_emit_align_label(emit_env->out, emit_env->isa->opt_arch); - fprintf(emit_env->out, BLOCK_PREFIX("%ld:\n"), get_irn_node_nr(block)); + + ir_snprintf(cmd_buf, sizeof(cmd_buf), BLOCK_PREFIX("%d:"), + get_irn_node_nr(block)); + fprintf(F, "%-43s ", cmd_buf); + + /* emit list of pred blocks in comment */ + fprintf(F, "/* preds:"); + + arity = get_irn_arity(block); + for(i = 0; i < arity; ++i) { + ir_node *predblock = get_Block_cfgpred_block(block, i); + fprintf(F, " %ld", get_irn_node_nr(predblock)); + } + fprintf(F, " */\n"); } + /* emit the contents of the block */ sched_foreach(block, irn) { ia32_emit_node(irn, env); }