X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_emitter.c;h=385611b108ce29db11042d4a8d56a100dfbfcc5e;hb=3e49de2f9c8d52f5a6efc55a9e20f4992557d471;hp=6aef8b4ce0df09cbbb46e2f69313cfa6d181bc32;hpb=85f517eca982e6a4e1d1848eb67634ae33b70de9;p=libfirm

diff --git a/ir/be/ia32/ia32_emitter.c b/ir/be/ia32/ia32_emitter.c
index 6aef8b4ce..385611b10 100644
--- a/ir/be/ia32/ia32_emitter.c
+++ b/ir/be/ia32/ia32_emitter.c
@@ -21,7 +21,6 @@
  * @file
  * @brief       This file implements the ia32 node emitter.
  * @author      Christian Wuerdig, Matthias Braun
- * @version     $Id$
  *
  * Summary table for x86 floatingpoint compares:
  * (remember effect of unordered on x86: ZF=1, PF=1, CF=1)
@@ -61,15 +60,15 @@
 #include "raw_bitset.h"
 #include "dbginfo.h"
 #include "lc_opts.h"
+#include "ircons.h"
 
-#include "../besched.h"
-#include "../benode.h"
-#include "../beabi.h"
-#include "../be_dbgout.h"
-#include "../beemitter.h"
-#include "../begnuas.h"
-#include "../beirg.h"
-#include "../be_dbgout.h"
+#include "besched.h"
+#include "benode.h"
+#include "beabi.h"
+#include "bedwarf.h"
+#include "beemitter.h"
+#include "begnuas.h"
+#include "beirg.h"
 
 #include "ia32_emitter.h"
 #include "ia32_common_transform.h"
@@ -82,14 +81,16 @@
 
 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
 
-#define SNPRINTF_BUF_LEN 128
-
 static const ia32_isa_t *isa;
 static char              pic_base_label[128];
 static ir_label_t        exc_label_id;
 static int               mark_spill_reload = 0;
 static int               do_pic;
 
+static bool              sp_relative;
+static int               frame_type_size;
+static int               callframe_offset;
+
 /** Return the next block in Block schedule */
 static ir_node *get_prev_block_sched(const ir_node *block)
 {
@@ -119,7 +120,7 @@ static int block_needs_label(const ir_node *block)
 	int need_label = 1;
 	int  n_cfgpreds = get_Block_n_cfgpreds(block);
 
-	if (has_Block_entity(block))
+	if (get_Block_entity(block) != NULL)
 		return 1;
 
 	if (n_cfgpreds == 0) {
@@ -137,65 +138,6 @@ static int block_needs_label(const ir_node *block)
 	return need_label;
 }
 
-/**
- * Returns the register at in position pos.
- */
-static const arch_register_t *get_in_reg(const ir_node *irn, int pos)
-{
-	ir_node               *op;
-	const arch_register_t *reg = NULL;
-
-	assert(get_irn_arity(irn) > pos && "Invalid IN position");
-
-	/* The out register of the operator at position pos is the
-	   in register we need. */
-	op = get_irn_n(irn, pos);
-
-	reg = arch_get_irn_register(op);
-
-	assert(reg && "no in register found");
-
-	if (reg == &ia32_registers[REG_GP_NOREG])
-		panic("trying to emit noreg for %+F input %d", irn, pos);
-
-	return reg;
-}
-
-/**
- * Returns the register at out position pos.
- */
-static const arch_register_t *get_out_reg(const ir_node *irn, int pos)
-{
-	ir_node               *proj;
-	const arch_register_t *reg = NULL;
-
-	/* 1st case: irn is not of mode_T, so it has only                 */
-	/*           one OUT register -> good                             */
-	/* 2nd case: irn is of mode_T -> collect all Projs and ask the    */
-	/*           Proj with the corresponding projnum for the register */
-
-	if (get_irn_mode(irn) != mode_T) {
-		assert(pos == 0);
-		reg = arch_get_irn_register(irn);
-	} else if (is_ia32_irn(irn)) {
-		reg = arch_irn_get_register(irn, pos);
-	} else {
-		const ir_edge_t *edge;
-
-		foreach_out_edge(irn, edge) {
-			proj = get_edge_src_irn(edge);
-			assert(is_Proj(proj) && "non-Proj from mode_T node");
-			if (get_Proj_proj(proj) == pos) {
-				reg = arch_get_irn_register(proj);
-				break;
-			}
-		}
-	}
-
-	assert(reg && "no out register found");
-	return reg;
-}
-
 /**
  * Add a number to a prefix. This number will not be used a second time.
  */
@@ -267,19 +209,12 @@ static void emit_register(const arch_register_t *reg, const ir_mode *mode)
 	be_emit_string(reg_name);
 }
 
-void ia32_emit_source_register(const ir_node *node, int pos)
-{
-	const arch_register_t *reg = get_in_reg(node, pos);
-
-	emit_register(reg, NULL);
-}
-
 static void ia32_emit_entity(ir_entity *entity, int no_pic_adjust)
 {
 	be_gas_emit_entity(entity);
 
 	if (get_entity_owner(entity) == get_tls_type()) {
-		if (get_entity_visibility(entity) == ir_visibility_external) {
+		if (!entity_has_definition(entity)) {
 			be_emit_cstring("@INDNTPOFF");
 		} else {
 			be_emit_cstring("@NTPOFF");
@@ -316,68 +251,6 @@ static void emit_ia32_Immediate(const ir_node *node)
 	emit_ia32_Immediate_no_prefix(node);
 }
 
-void ia32_emit_8bit_source_register_or_immediate(const ir_node *node, int pos)
-{
-	const arch_register_t *reg;
-	const ir_node         *in = get_irn_n(node, pos);
-	if (is_ia32_Immediate(in)) {
-		emit_ia32_Immediate(in);
-		return;
-	}
-
-	reg = get_in_reg(node, pos);
-	emit_8bit_register(reg);
-}
-
-void ia32_emit_8bit_high_source_register(const ir_node *node, int pos)
-{
-	const arch_register_t *reg = get_in_reg(node, pos);
-	emit_8bit_register_high(reg);
-}
-
-void ia32_emit_16bit_source_register_or_immediate(const ir_node *node, int pos)
-{
-	const arch_register_t *reg;
-	const ir_node         *in = get_irn_n(node, pos);
-	if (is_ia32_Immediate(in)) {
-		emit_ia32_Immediate(in);
-		return;
-	}
-
-	reg = get_in_reg(node, pos);
-	emit_16bit_register(reg);
-}
-
-void ia32_emit_dest_register(const ir_node *node, int pos)
-{
-	const arch_register_t *reg  = get_out_reg(node, pos);
-
-	emit_register(reg, NULL);
-}
-
-void ia32_emit_dest_register_size(const ir_node *node, int pos)
-{
-	const arch_register_t *reg  = get_out_reg(node, pos);
-
-	emit_register(reg, get_ia32_ls_mode(node));
-}
-
-void ia32_emit_8bit_dest_register(const ir_node *node, int pos)
-{
-	const arch_register_t *reg  = get_out_reg(node, pos);
-
-	emit_register(reg, mode_Bu);
-}
-
-void ia32_emit_x87_register(const ir_node *node, int pos)
-{
-	const ia32_x87_attr_t *attr = get_ia32_x87_attr_const(node);
-
-	assert(pos < 3);
-	be_emit_char('%');
-	be_emit_string(attr->x87[pos]->name);
-}
-
 static void ia32_emit_mode_suffix_mode(const ir_mode *mode)
 {
 	assert(mode_is_int(mode) || mode_is_reference(mode));
@@ -392,16 +265,7 @@ static void ia32_emit_mode_suffix_mode(const ir_mode *mode)
 	panic("Can't output mode_suffix for %+F", mode);
 }
 
-void ia32_emit_mode_suffix(const ir_node *node)
-{
-	ir_mode *mode = get_ia32_ls_mode(node);
-	if (mode == NULL)
-		mode = mode_Iu;
-
-	ia32_emit_mode_suffix_mode(mode);
-}
-
-void ia32_emit_x87_mode_suffix(const ir_node *node)
+static void ia32_emit_x87_mode_suffix(ir_node const *const node)
 {
 	ir_mode *mode;
 
@@ -445,42 +309,13 @@ static char get_xmm_mode_suffix(ir_mode *mode)
 	}
 }
 
-void ia32_emit_xmm_mode_suffix(const ir_node *node)
-{
-	ir_mode *mode = get_ia32_ls_mode(node);
-	assert(mode != NULL);
-	be_emit_char('s');
-	be_emit_char(get_xmm_mode_suffix(mode));
-}
-
-void ia32_emit_xmm_mode_suffix_s(const ir_node *node)
+static void ia32_emit_xmm_mode_suffix(ir_node const *const node)
 {
 	ir_mode *mode = get_ia32_ls_mode(node);
 	assert(mode != NULL);
 	be_emit_char(get_xmm_mode_suffix(mode));
 }
 
-void ia32_emit_extend_suffix(const ir_node *node)
-{
-	ir_mode *mode = get_ia32_ls_mode(node);
-	if (get_mode_size_bits(mode) == 32)
-		return;
-	be_emit_char(mode_is_signed(mode) ? 's' : 'z');
-	ia32_emit_mode_suffix_mode(mode);
-}
-
-void ia32_emit_source_register_or_immediate(const ir_node *node, int pos)
-{
-	ir_node *in = get_irn_n(node, pos);
-	if (is_ia32_Immediate(in)) {
-		emit_ia32_Immediate(in);
-	} else {
-		const ir_mode         *mode = get_ia32_ls_mode(node);
-		const arch_register_t *reg  = get_in_reg(node, pos);
-		emit_register(reg, mode);
-	}
-}
-
 /**
  * Returns the target block for a control flow node.
  */
@@ -544,14 +379,15 @@ typedef enum ia32_emit_mod_t {
 	EMIT_ALTERNATE_AM = 1U << 1,
 	EMIT_LONG         = 1U << 2,
 	EMIT_HIGH_REG     = 1U << 3,
-	EMIT_LOW_REG      = 1U << 4
+	EMIT_LOW_REG      = 1U << 4,
+	EMIT_16BIT_REG    = 1U << 5
 } ia32_emit_mod_t;
 ENUM_BITSET(ia32_emit_mod_t)
 
 /**
  * Emits address mode.
  */
-void ia32_emit_am(const ir_node *node)
+static void ia32_emit_am(ir_node const *const node)
 {
 	ir_entity *ent       = get_ia32_am_sc(node);
 	int        offs      = get_ia32_am_offs_int(node);
@@ -588,13 +424,13 @@ void ia32_emit_am(const ir_node *node)
 
 		/* emit base */
 		if (has_base) {
-			const arch_register_t *reg = get_in_reg(node, n_ia32_base);
+			const arch_register_t *reg = arch_get_irn_register_in(node, n_ia32_base);
 			emit_register(reg, NULL);
 		}
 
 		/* emit index + scale */
 		if (has_index) {
-			const arch_register_t *reg = get_in_reg(node, n_ia32_index);
+			const arch_register_t *reg = arch_get_irn_register_in(node, n_ia32_index);
 			int scale;
 			be_emit_char(',');
 			emit_register(reg, NULL);
@@ -608,36 +444,14 @@ void ia32_emit_am(const ir_node *node)
 	}
 }
 
-/**
- * fmt  parameter               output
- * ---- ----------------------  ---------------------------------------------
- * %%                           %
- * %AM  <node>                  address mode of the node
- * %AR  const arch_register_t*  address mode of the node or register
- * %ASx <node>                  address mode of the node or source register x
- * %Dx  <node>                  destination register x
- * %I   <node>                  immediate of the node
- * %L   <node>                  control flow target of the node
- * %M   <node>                  mode suffix of the node
- * %P   int                     condition code
- * %R   const arch_register_t*  register
- * %Sx  <node>                  source register x
- * %s   const char*             string
- * %u   unsigned int            unsigned int
- * %d   signed int              signed int
- *
- * x starts at 0
- * # modifier for %ASx, %D, %R, and %S uses ls mode of node to alter register width
- * * modifier does not prefix immediates with $, but AM with *
- * l modifier for %lu and %ld
- * > modifier to output high 8bit register (ah, bh)
- * < modifier to output low 8bit register (al, bl)
- */
-static void ia32_emitf(const ir_node *node, const char *fmt, ...)
+static ia32_condition_code_t determine_final_cc(ir_node const *node, int flags_pos, ia32_condition_code_t cc);
+
+void ia32_emitf(ir_node const *const node, char const *fmt, ...)
 {
 	va_list ap;
 	va_start(ap, fmt);
 
+	be_emit_char('\t');
 	for (;;) {
 		const char      *start = fmt;
 		ia32_emit_mod_t  mod   = EMIT_NONE;
@@ -649,7 +463,9 @@ static void ia32_emitf(const ir_node *node, const char *fmt, ...)
 		}
 
 		if (*fmt == '\n') {
-			be_emit_finish_line_gas(node);
+			be_emit_char('\n');
+			be_emit_write_line();
+			be_emit_char('\t');
 			++fmt;
 			if (*fmt == '\0')
 				break;
@@ -667,6 +483,7 @@ static void ia32_emitf(const ir_node *node, const char *fmt, ...)
 			case 'l': mod |= EMIT_LONG;         break;
 			case '>': mod |= EMIT_HIGH_REG;     break;
 			case '<': mod |= EMIT_LOW_REG;      break;
+			case '^': mod |= EMIT_16BIT_REG;    break;
 			default:
 				goto end_of_mods;
 			}
@@ -684,6 +501,24 @@ end_of_mods:
 
 			case 'A': {
 				switch (*fmt++) {
+					case 'F':
+						if (get_ia32_op_type(node) == ia32_AddrModeS) {
+							goto emit_AM;
+						} else {
+							assert(get_ia32_op_type(node) == ia32_Normal);
+							ia32_x87_attr_t const *const x87_attr = get_ia32_x87_attr_const(node);
+							arch_register_t const *const in1      = x87_attr->x87[0];
+							arch_register_t const *      in       = x87_attr->x87[1];
+							arch_register_t const *      out      = x87_attr->x87[2];
+							if (out == NULL) {
+								out = in1;
+							} else if (out == in) {
+								in = in1;
+							}
+							be_emit_irprintf("%%%s, %%%s", arch_register_get_name(in), arch_register_get_name(out));
+							break;
+						}
+
 emit_AM:
 					case 'M':
 						if (mod & EMIT_ALTERNATE_AM)
@@ -713,12 +548,54 @@ emit_AM:
 				break;
 			}
 
+			case 'B':
+				imm = get_irn_n(node, n_ia32_binary_right);
+				if (is_ia32_Immediate(imm)) {
+					emit_ia32_Immediate(imm);
+					be_emit_cstring(", ");
+					if (get_ia32_op_type(node) == ia32_AddrModeS) {
+						ia32_emit_am(node);
+					} else {
+						assert(get_ia32_op_type(node) == ia32_Normal);
+						reg = arch_get_irn_register_in(node, n_ia32_binary_left);
+						emit_register(reg, get_ia32_ls_mode(node));
+					}
+				} else {
+					if (get_ia32_op_type(node) == ia32_AddrModeS) {
+						ia32_emit_am(node);
+					} else {
+						assert(get_ia32_op_type(node) == ia32_Normal);
+						reg = arch_get_irn_register_in(node, n_ia32_binary_right);
+						emit_register(reg, get_ia32_ls_mode(node));
+					}
+					be_emit_cstring(", ");
+					reg = arch_get_irn_register_in(node, n_ia32_binary_left);
+					emit_register(reg, get_ia32_ls_mode(node));
+				}
+				break;
+
 			case 'D':
 				if (*fmt < '0' || '9' <= *fmt)
 					goto unknown;
-				reg = get_out_reg(node, *fmt++ - '0');
+				reg = arch_get_irn_register_out(node, *fmt++ - '0');
 				goto emit_R;
 
+			case 'F':
+				if (*fmt == 'M') {
+					++fmt;
+					ia32_emit_x87_mode_suffix(node);
+				} else if (*fmt == 'X') {
+					++fmt;
+					ia32_emit_xmm_mode_suffix(node);
+				} else if ('0' <= *fmt && *fmt <= '3') {
+					const ia32_x87_attr_t *attr = get_ia32_x87_attr_const(node);
+					be_emit_char('%');
+					be_emit_string(attr->x87[*fmt++ - '0']->name);
+				} else {
+					goto unknown;
+				}
+				break;
+
 			case 'I':
 				imm = node;
 emit_I:
@@ -731,12 +608,31 @@ emit_I:
 				ia32_emit_cfop_target(node);
 				break;
 
-			case 'M':
-				ia32_emit_mode_suffix_mode(get_ia32_ls_mode(node));
+			case 'M': {
+				ir_mode *mode = get_ia32_ls_mode(node);
+				if (!mode)
+					mode = mode_Iu;
+				if (mod & EMIT_RESPECT_LS) {
+					if (get_mode_size_bits(mode) == 32)
+						break;
+					be_emit_char(mode_is_signed(mode) ? 's' : 'z');
+				}
+				ia32_emit_mode_suffix_mode(mode);
 				break;
+			}
 
 			case 'P': {
-				ia32_condition_code_t cc = va_arg(ap, ia32_condition_code_t);
+				ia32_condition_code_t cc;
+				if (*fmt == 'X') {
+					++fmt;
+					cc = (ia32_condition_code_t)va_arg(ap, int);
+				} else if ('0' <= *fmt && *fmt <= '9') {
+					cc = get_ia32_condcode(node);
+					cc = determine_final_cc(node, *fmt - '0', cc);
+					++fmt;
+				} else {
+					goto unknown;
+				}
 				ia32_emit_condition_code(cc);
 				break;
 			}
@@ -750,6 +646,8 @@ emit_R:
 					emit_8bit_register_high(reg);
 				} else if (mod & EMIT_LOW_REG) {
 					emit_8bit_register(reg);
+				} else if (mod & EMIT_16BIT_REG) {
+					emit_16bit_register(reg);
 				} else {
 					emit_register(reg, mod & EMIT_RESPECT_LS ? get_ia32_ls_mode(node) : NULL);
 				}
@@ -767,7 +665,7 @@ emit_S:
 				if (is_ia32_Immediate(imm)) {
 					goto emit_I;
 				} else {
-					reg = get_in_reg(node, pos);
+					reg = arch_get_irn_register_in(node, pos);
 					goto emit_R;
 				}
 			}
@@ -800,80 +698,25 @@ emit_S:
 
 			default:
 unknown:
-				panic("unknown format conversion in ia32_emitf()");
+				panic("unknown format conversion");
 		}
 	}
 
+	be_emit_finish_line_gas(node);
 	va_end(ap);
 }
 
-/**
- * Emits registers and/or address mode of a binary operation.
- */
-void ia32_emit_binop(const ir_node *node)
-{
-	if (is_ia32_Immediate(get_irn_n(node, n_ia32_binary_right))) {
-		ia32_emitf(node, "%#S4, %#AS3");
-	} else {
-		ia32_emitf(node, "%#AS4, %#S3");
-	}
-}
-
-/**
- * Emits registers and/or address mode of a binary operation.
- */
-void ia32_emit_x87_binop(const ir_node *node)
-{
-	switch (get_ia32_op_type(node)) {
-		case ia32_Normal:
-			{
-				const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
-				const arch_register_t *in1      = x87_attr->x87[0];
-				const arch_register_t *in       = x87_attr->x87[1];
-				const arch_register_t *out      = x87_attr->x87[2];
-
-				if (out == NULL) {
-					out = in1;
-				} else if (out == in) {
-					in = in1;
-				}
-
-				be_emit_char('%');
-				be_emit_string(arch_register_get_name(in));
-				be_emit_cstring(", %");
-				be_emit_string(arch_register_get_name(out));
-			}
-			break;
-		case ia32_AddrModeS:
-			ia32_emit_am(node);
-			break;
-		case ia32_AddrModeD:
-		default:
-			assert(0 && "unsupported op type");
-	}
-}
-
-/**
- * Emits registers and/or address mode of a unary operation.
- */
-void ia32_emit_unop(const ir_node *node, int pos)
-{
-	char fmt[] = "%ASx";
-	fmt[3] = '0' + pos;
-	ia32_emitf(node, fmt);
-}
-
 static void emit_ia32_IMul(const ir_node *node)
 {
 	ir_node               *left    = get_irn_n(node, n_ia32_IMul_left);
-	const arch_register_t *out_reg = get_out_reg(node, pn_ia32_IMul_res);
+	const arch_register_t *out_reg = arch_get_irn_register_out(node, pn_ia32_IMul_res);
 
 	/* do we need the 3-address form? */
 	if (is_ia32_NoReg_GP(left) ||
-			get_in_reg(node, n_ia32_IMul_left) != out_reg) {
-		ia32_emitf(node, "\timul%M %#S4, %#AS3, %#D0\n");
+			arch_get_irn_register_in(node, n_ia32_IMul_left) != out_reg) {
+		ia32_emitf(node, "imul%M %#S4, %#AS3, %#D0");
 	} else {
-		ia32_emitf(node, "\timul%M %#AS4, %#S3\n");
+		ia32_emitf(node, "imul%M %#AS4, %#S3");
 	}
 }
 
@@ -920,7 +763,8 @@ static ir_node *find_original_value(ir_node *node)
 	}
 }
 
-static int determine_final_cc(const ir_node *node, int flags_pos, int cc)
+static ia32_condition_code_t determine_final_cc(const ir_node *node,
+		int flags_pos, ia32_condition_code_t cc)
 {
 	ir_node           *flags = get_irn_n(node, flags_pos);
 	const ia32_attr_t *flags_attr;
@@ -947,14 +791,6 @@ static int determine_final_cc(const ir_node *node, int flags_pos, int cc)
 	return cc;
 }
 
-void ia32_emit_cmp_suffix_node(const ir_node *node, int flags_pos)
-{
-	ia32_condition_code_t cc = get_ia32_condcode(node);
-	cc = determine_final_cc(node, flags_pos, cc);
-
-	ia32_emit_condition_code(cc);
-}
-
 /**
  * Emits an exception label for a given node.
  */
@@ -969,8 +805,7 @@ static void ia32_emit_exc_label(const ir_node *node)
  */
 static ir_node *get_proj(const ir_node *node, long proj)
 {
-	const ir_edge_t *edge;
-	ir_node         *src;
+	ir_node *src;
 
 	assert(get_irn_mode(node) == mode_T && "expected mode_T node");
 
@@ -1026,28 +861,30 @@ static void emit_ia32_Jcc(const ir_node *node)
 		/* Some floating point comparisons require a test of the parity flag,
 		 * which indicates that the result is unordered */
 		if (cc & ia32_cc_negated) {
-			ia32_emitf(proj_true, "\tjp %L\n");
+			ia32_emitf(proj_true, "jp %L");
 		} else {
 			/* we need a local label if the false proj is a fallthrough
 			 * as the falseblock might have no label emitted then */
 			if (can_be_fallthrough(proj_false)) {
 				need_parity_label = 1;
-				ia32_emitf(proj_false, "\tjp 1f\n");
+				ia32_emitf(proj_false, "jp 1f");
 			} else {
-				ia32_emitf(proj_false, "\tjp %L\n");
+				ia32_emitf(proj_false, "jp %L");
 			}
 		}
 	}
-	ia32_emitf(proj_true, "\tj%P %L\n", cc);
+	ia32_emitf(proj_true, "j%PX %L", (int)cc);
 	if (need_parity_label) {
-		ia32_emitf(NULL, "1:\n");
+		be_emit_cstring("1:\n");
+		be_emit_write_line();
 	}
 
 	/* the second Proj might be a fallthrough */
 	if (can_be_fallthrough(proj_false)) {
-		ia32_emitf(proj_false, "\t/* fallthrough to %L */\n");
+		if (be_options.verbose_asm)
+			ia32_emitf(proj_false, "/* fallthrough to %L */");
 	} else {
-		ia32_emitf(proj_false, "\tjmp %L\n");
+		ia32_emitf(proj_false, "jmp %L");
 	}
 }
 
@@ -1057,29 +894,29 @@ static void emit_ia32_Jcc(const ir_node *node)
  */
 static void emit_ia32_Setcc(const ir_node *node)
 {
-	const arch_register_t *dreg = get_out_reg(node, pn_ia32_Setcc_res);
+	const arch_register_t *dreg = arch_get_irn_register_out(node, pn_ia32_Setcc_res);
 
 	ia32_condition_code_t cc = get_ia32_condcode(node);
 	cc = determine_final_cc(node, n_ia32_Setcc_eflags, cc);
 	if (cc & ia32_cc_float_parity_cases) {
 		if (cc & ia32_cc_negated) {
-			ia32_emitf(node, "\tset%P %<R\n", cc, dreg);
-			ia32_emitf(node, "\tsetp %>R\n", dreg);
-			ia32_emitf(node, "\torb %>R, %<R\n", dreg, dreg);
+			ia32_emitf(node, "set%PX %<R", (int)cc, dreg);
+			ia32_emitf(node, "setp %>R", dreg);
+			ia32_emitf(node, "orb %>R, %<R", dreg, dreg);
 		} else {
-			ia32_emitf(node, "\tset%P %<R\n", cc, dreg);
-			ia32_emitf(node, "\tsetnp %>R\n", dreg);
-			ia32_emitf(node, "\tandb %>R, %<R\n", dreg, dreg);
+			ia32_emitf(node, "set%PX %<R", (int)cc, dreg);
+			ia32_emitf(node, "setnp %>R", dreg);
+			ia32_emitf(node, "andb %>R, %<R", dreg, dreg);
 		}
 	} else {
-		ia32_emitf(node, "\tset%P %#R\n", cc, dreg);
+		ia32_emitf(node, "set%PX %#R", (int)cc, dreg);
 	}
 }
 
 static void emit_ia32_CMovcc(const ir_node *node)
 {
 	const ia32_attr_t     *attr = get_ia32_attr_const(node);
-	const arch_register_t *out  = arch_irn_get_register(node, pn_ia32_res);
+	const arch_register_t *out  = arch_get_irn_register_out(node, pn_ia32_res);
 	ia32_condition_code_t  cc   = get_ia32_condcode(node);
 	const arch_register_t *in_true;
 	const arch_register_t *in_false;
@@ -1110,14 +947,14 @@ static void emit_ia32_CMovcc(const ir_node *node)
 		in_false = tmp;
 	} else {
 		/* we need a mov */
-		ia32_emitf(node, "\tmovl %R, %R\n", in_false, out);
+		ia32_emitf(node, "movl %R, %R", in_false, out);
 	}
 
 	if (cc & ia32_cc_float_parity_cases) {
 		panic("CMov with floatingpoint compare/parity not supported yet");
 	}
 
-	ia32_emitf(node, "\tcmov%P %#AR, %#R\n", cc, in_true, out);
+	ia32_emitf(node, "cmov%PX %#AR, %#R", (int)cc, in_true, out);
 }
 
 /**
@@ -1125,11 +962,11 @@ static void emit_ia32_CMovcc(const ir_node *node)
  */
 static void emit_ia32_SwitchJmp(const ir_node *node)
 {
-	ir_entity *jump_table = get_ia32_am_sc(node);
-	long       default_pn = get_ia32_default_pn(node);
+	ir_entity             *jump_table = get_ia32_am_sc(node);
+	const ir_switch_table *table      = get_ia32_switch_table(node);
 
-	ia32_emitf(node, "\tjmp %*AM\n");
-	emit_jump_table(node, default_pn, jump_table, get_cfop_target_block);
+	ia32_emitf(node, "jmp %*AM");
+	be_emit_jump_table(node, table, jump_table, get_cfop_target_block);
 }
 
 /**
@@ -1139,9 +976,10 @@ static void emit_ia32_Jmp(const ir_node *node)
 {
 	/* we have a block schedule */
 	if (can_be_fallthrough(node)) {
-		ia32_emitf(node, "\t/* fallthrough to %L */\n");
+		if (be_options.verbose_asm)
+			ia32_emitf(node, "/* fallthrough to %L */");
 	} else {
-		ia32_emitf(node, "\tjmp %L\n");
+		ia32_emitf(node, "jmp %L");
 	}
 }
 
@@ -1223,7 +1061,7 @@ static const char* emit_asm_operand(const ir_node *node, const char *s)
 
 	/* get register */
 	if (asm_reg->use_input == 0) {
-		reg = get_out_reg(node, asm_reg->inout_pos);
+		reg = arch_get_irn_register_out(node, asm_reg->inout_pos);
 	} else {
 		ir_node *pred = get_irn_n(node, asm_reg->inout_pos);
 
@@ -1232,7 +1070,7 @@ static const char* emit_asm_operand(const ir_node *node, const char *s)
 			emit_ia32_Immediate(pred);
 			return s;
 		}
-		reg = get_in_reg(node, asm_reg->inout_pos);
+		reg = arch_get_irn_register_in(node, asm_reg->inout_pos);
 	}
 	if (reg == NULL) {
 		ir_fprintf(stderr,
@@ -1261,7 +1099,7 @@ static const char* emit_asm_operand(const ir_node *node, const char *s)
 			panic("Invalid asm op modifier");
 		}
 	} else {
-		emit_register(reg, asm_reg->mode);
+		emit_register(reg, asm_reg->memory ? mode_Iu : asm_reg->mode);
 	}
 
 	if (asm_reg->memory) {
@@ -1282,7 +1120,8 @@ static void emit_ia32_Asm(const ir_node *node)
 	ident                 *asm_text = attr->asm_text;
 	const char            *s        = get_id_str(asm_text);
 
-	ia32_emitf(node, "#APP\t\n");
+	be_emit_cstring("#APP\n");
+	be_emit_write_line();
 
 	if (s[0] != '\t')
 		be_emit_char('\t');
@@ -1295,7 +1134,8 @@ static void emit_ia32_Asm(const ir_node *node)
 		}
 	}
 
-	ia32_emitf(NULL, "\n#NO_APP\n");
+	be_emit_cstring("\n#NO_APP\n");
+	be_emit_write_line();
 }
 
 
@@ -1305,9 +1145,9 @@ static void emit_ia32_Asm(const ir_node *node)
 static void emit_CopyB_prolog(unsigned size)
 {
 	if (size & 1)
-		ia32_emitf(NULL, "\tmovsb\n");
+		ia32_emitf(NULL, "movsb");
 	if (size & 2)
-		ia32_emitf(NULL, "\tmovsw\n");
+		ia32_emitf(NULL, "movsw");
 }
 
 /**
@@ -1318,7 +1158,7 @@ static void emit_ia32_CopyB(const ir_node *node)
 	unsigned size = get_ia32_copyb_size(node);
 
 	emit_CopyB_prolog(size);
-	ia32_emitf(node, "\trep movsd\n");
+	ia32_emitf(node, "rep movsd");
 }
 
 /**
@@ -1332,7 +1172,7 @@ static void emit_ia32_CopyB_i(const ir_node *node)
 
 	size >>= 2;
 	while (size--) {
-		ia32_emitf(NULL, "\tmovsd\n");
+		ia32_emitf(NULL, "movsd");
 	}
 }
 
@@ -1347,7 +1187,7 @@ static void emit_ia32_Conv_with_FP(const ir_node *node, const char* conv_f,
 	int                 ls_bits = get_mode_size_bits(ls_mode);
 	const char         *conv    = ls_bits == 32 ? conv_f : conv_d;
 
-	ia32_emitf(node, "\tcvt%s %AS3, %D0\n", conv);
+	ia32_emitf(node, "cvt%s %AS3, %D0", conv);
 }
 
 static void emit_ia32_Conv_I2FP(const ir_node *node)
@@ -1365,32 +1205,6 @@ static void emit_ia32_Conv_FP2FP(const ir_node *node)
 	emit_ia32_Conv_with_FP(node, "sd2ss", "ss2sd");
 }
 
-/**
- * Emits code for an Int conversion.
- */
-static void emit_ia32_Conv_I2I(const ir_node *node)
-{
-	ir_mode    *smaller_mode = get_ia32_ls_mode(node);
-	int         signed_mode  = mode_is_signed(smaller_mode);
-	const char *sign_suffix;
-
-	assert(!mode_is_float(smaller_mode));
-
-	sign_suffix = signed_mode ? "s" : "z";
-	ia32_emitf(node, "\tmov%s%Ml %#AS3, %D0\n", sign_suffix);
-}
-
-/**
- * Emits a call
- */
-static void emit_ia32_Call(const ir_node *node)
-{
-	/* Special case: Call must not have its immediates prefixed by $, instead
-	 * address mode is prefixed by *. */
-	ia32_emitf(node, "\tcall %*AS3\n");
-}
-
-
 /**
  * Emits code to increase stack pointer.
  */
@@ -1402,9 +1216,9 @@ static void emit_be_IncSP(const ir_node *node)
 		return;
 
 	if (offs > 0) {
-		ia32_emitf(node, "\tsubl $%u, %D0\n", offs);
+		ia32_emitf(node, "subl $%u, %D0", offs);
 	} else {
-		ia32_emitf(node, "\taddl $%u, %D0\n", -offs);
+		ia32_emitf(node, "addl $%u, %D0", -offs);
 	}
 }
 
@@ -1423,11 +1237,7 @@ static void Copy_emitter(const ir_node *node, const ir_node *op)
 	if (arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp])
 		return;
 
-	if (get_irn_mode(node) == mode_E) {
-		ia32_emitf(node, "\tmovsd %R, %R\n", in, out);
-	} else {
-		ia32_emitf(node, "\tmovl %R, %R\n", in, out);
-	}
+	ia32_emitf(node, "movl %R, %R", in, out);
 }
 
 static void emit_be_Copy(const ir_node *node)
@@ -1457,11 +1267,11 @@ static void emit_be_Perm(const ir_node *node)
 	assert(cls0 == cls1 && "Register class mismatch at Perm");
 
 	if (cls0 == &ia32_reg_classes[CLASS_ia32_gp]) {
-		ia32_emitf(node, "\txchg %R, %R\n", in1, in0);
+		ia32_emitf(node, "xchg %R, %R", in1, in0);
 	} else if (cls0 == &ia32_reg_classes[CLASS_ia32_xmm]) {
-		ia32_emitf(NULL, "\txorpd %R, %R\n", in1, in0);
-		ia32_emitf(NULL, "\txorpd %R, %R\n", in0, in1);
-		ia32_emitf(node, "\txorpd %R, %R\n", in1, in0);
+		ia32_emitf(NULL, "xorpd %R, %R", in1, in0);
+		ia32_emitf(NULL, "xorpd %R, %R", in0, in1);
+		ia32_emitf(node, "xorpd %R, %R", in1, in0);
 	} else if (cls0 == &ia32_reg_classes[CLASS_ia32_vfp]) {
 		/* is a NOP */
 	} else if (cls0 == &ia32_reg_classes[CLASS_ia32_st]) {
@@ -1471,56 +1281,48 @@ static void emit_be_Perm(const ir_node *node)
 	}
 }
 
-/**
- * Emits code for Constant loading.
- */
-static void emit_ia32_Const(const ir_node *node)
-{
-	ia32_emitf(node, "\tmovl %I, %D0\n");
-}
-
 /* helper function for emit_ia32_Minus64Bit */
 static void emit_mov(const ir_node* node, const arch_register_t *src, const arch_register_t *dst)
 {
-	ia32_emitf(node, "\tmovl %R, %R\n", src, dst);
+	ia32_emitf(node, "movl %R, %R", src, dst);
 }
 
 /* helper function for emit_ia32_Minus64Bit */
 static void emit_neg(const ir_node* node, const arch_register_t *reg)
 {
-	ia32_emitf(node, "\tnegl %R\n", reg);
+	ia32_emitf(node, "negl %R", reg);
 }
 
 /* helper function for emit_ia32_Minus64Bit */
 static void emit_sbb0(const ir_node* node, const arch_register_t *reg)
 {
-	ia32_emitf(node, "\tsbbl $0, %R\n", reg);
+	ia32_emitf(node, "sbbl $0, %R", reg);
 }
 
 /* helper function for emit_ia32_Minus64Bit */
 static void emit_sbb(const ir_node* node, const arch_register_t *src, const arch_register_t *dst)
 {
-	ia32_emitf(node, "\tsbbl %R, %R\n", src, dst);
+	ia32_emitf(node, "sbbl %R, %R", src, dst);
 }
 
 /* helper function for emit_ia32_Minus64Bit */
 static void emit_xchg(const ir_node* node, const arch_register_t *src, const arch_register_t *dst)
 {
-	ia32_emitf(node, "\txchgl %R, %R\n", src, dst);
+	ia32_emitf(node, "xchgl %R, %R", src, dst);
 }
 
 /* helper function for emit_ia32_Minus64Bit */
 static void emit_zero(const ir_node* node, const arch_register_t *reg)
 {
-	ia32_emitf(node, "\txorl %R, %R\n", reg, reg);
+	ia32_emitf(node, "xorl %R, %R", reg, reg);
 }
 
 static void emit_ia32_Minus64Bit(const ir_node *node)
 {
-	const arch_register_t *in_lo  = get_in_reg(node, 0);
-	const arch_register_t *in_hi  = get_in_reg(node, 1);
-	const arch_register_t *out_lo = get_out_reg(node, 0);
-	const arch_register_t *out_hi = get_out_reg(node, 1);
+	const arch_register_t *in_lo  = arch_get_irn_register_in(node, 0);
+	const arch_register_t *in_hi  = arch_get_irn_register_in(node, 1);
+	const arch_register_t *out_lo = arch_get_irn_register_out(node, 0);
+	const arch_register_t *out_hi = arch_get_irn_register_out(node, 1);
 
 	if (out_lo == in_lo) {
 		if (out_hi != in_hi) {
@@ -1571,22 +1373,23 @@ zero_neg:
 
 static void emit_ia32_GetEIP(const ir_node *node)
 {
-	ia32_emitf(node, "\tcall %s\n", pic_base_label);
-	ia32_emitf(NULL, "%s:\n", pic_base_label);
-	ia32_emitf(node, "\tpopl %D0\n");
+	ia32_emitf(node, "call %s", pic_base_label);
+	be_emit_irprintf("%s:\n", pic_base_label);
+	be_emit_write_line();
+	ia32_emitf(node, "popl %D0");
 }
 
 static void emit_ia32_ClimbFrame(const ir_node *node)
 {
 	const ia32_climbframe_attr_t *attr = get_ia32_climbframe_attr_const(node);
 
-	ia32_emitf(node, "\tmovl %S0, %D0\n");
-	ia32_emitf(node, "\tmovl $%u, %S1\n", attr->count);
+	ia32_emitf(node, "movl %S0, %D0");
+	ia32_emitf(node, "movl $%u, %S1", attr->count);
 	be_gas_emit_block_name(node);
 	be_emit_cstring(":\n");
 	be_emit_write_line();
-	ia32_emitf(node, "\tmovl (%D0), %D0\n");
-	ia32_emitf(node, "\tdec %S1\n");
+	ia32_emitf(node, "movl (%D0), %D0");
+	ia32_emitf(node, "dec %S1");
 	be_emit_cstring("\tjnz ");
 	be_gas_emit_block_name(node);
 	be_emit_finish_line_gas(node);
@@ -1597,9 +1400,9 @@ static void emit_be_Return(const ir_node *node)
 	unsigned pop = be_Return_get_pop(node);
 
 	if (pop > 0 || be_Return_get_emit_pop(node)) {
-		ia32_emitf(node, "\tret $%u\n", pop);
+		ia32_emitf(node, "ret $%u", pop);
 	} else {
-		ia32_emitf(node, "\tret\n");
+		ia32_emitf(node, "ret");
 	}
 }
 
@@ -1615,29 +1418,24 @@ static void emit_Nothing(const ir_node *node)
  */
 static void ia32_register_emitters(void)
 {
-#define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
-#define IA32_EMIT(a)    IA32_EMIT2(a,a)
+#define IA32_EMIT(a)    op_ia32_##a->ops.generic = (op_func)emit_ia32_##a
 #define EMIT(a)         op_##a->ops.generic = (op_func)emit_##a
 #define IGN(a)          op_##a->ops.generic = (op_func)emit_Nothing
 #define BE_EMIT(a)      op_be_##a->ops.generic = (op_func)emit_be_##a
 #define BE_IGN(a)       op_be_##a->ops.generic = (op_func)emit_Nothing
 
 	/* first clear the generic function pointer for all ops */
-	clear_irp_opcodes_generic_func();
+	ir_clear_opcodes_generic_func();
 
 	/* register all emitter functions defined in spec */
 	ia32_register_spec_emitters();
 
 	/* other ia32 emitter functions */
-	IA32_EMIT2(Conv_I2I8Bit, Conv_I2I);
 	IA32_EMIT(Asm);
 	IA32_EMIT(CMovcc);
-	IA32_EMIT(Call);
-	IA32_EMIT(Const);
 	IA32_EMIT(Conv_FP2FP);
 	IA32_EMIT(Conv_FP2I);
 	IA32_EMIT(Conv_I2FP);
-	IA32_EMIT(Conv_I2I);
 	IA32_EMIT(CopyB);
 	IA32_EMIT(CopyB_i);
 	IA32_EMIT(GetEIP);
@@ -1665,7 +1463,6 @@ static void ia32_register_emitters(void)
 #undef BE_EMIT
 #undef EMIT
 #undef IGN
-#undef IA32_EMIT2
 #undef IA32_EMIT
 }
 
@@ -1704,20 +1501,20 @@ static void ia32_emit_node(ir_node *node)
 		}
 		if (mark_spill_reload) {
 			if (is_ia32_is_spill(node)) {
-				ia32_emitf(NULL, "\txchg %ebx, %ebx        /* spill mark */\n");
+				ia32_emitf(NULL, "xchg %ebx, %ebx        /* spill mark */");
 			}
 			if (is_ia32_is_reload(node)) {
-				ia32_emitf(NULL, "\txchg %edx, %edx        /* reload mark */\n");
+				ia32_emitf(NULL, "xchg %edx, %edx        /* reload mark */");
 			}
 			if (is_ia32_is_remat(node)) {
-				ia32_emitf(NULL, "\txchg %ecx, %ecx        /* remat mark */\n");
+				ia32_emitf(NULL, "xchg %ecx, %ecx        /* remat mark */");
 			}
 		}
 	}
 	if (op->ops.generic) {
 		emit_func_ptr func = (emit_func_ptr) op->ops.generic;
 
-		be_dbg_set_dbg_info(get_irn_dbg_info(node));
+		be_dwarf_location(get_irn_dbg_info(node));
 
 		(*func) (node);
 	} else {
@@ -1725,6 +1522,15 @@ static void ia32_emit_node(ir_node *node)
 		ir_fprintf(stderr, "Error: No emit handler for node %+F (%+G, graph %+F)\n", node, node, current_ir_graph);
 		abort();
 	}
+
+	if (sp_relative) {
+		int sp_change = arch_get_sp_bias(node);
+		if (sp_change != 0) {
+			assert(sp_change != SP_BIAS_RESET);
+			callframe_offset += sp_change;
+			be_dwarf_callframe_offset(callframe_offset);
+		}
+	}
 }
 
 /**
@@ -1732,7 +1538,7 @@ static void ia32_emit_node(ir_node *node)
  */
 static void ia32_emit_alignment(unsigned align, unsigned skip)
 {
-	ia32_emitf(NULL, "\t.p2align %u,,%u\n", align, skip);
+	ia32_emitf(NULL, ".p2align %u,,%u", align, skip);
 }
 
 /**
@@ -1754,27 +1560,23 @@ static void ia32_emit_align_label(void)
 static int should_align_block(const ir_node *block)
 {
 	static const double DELTA = .0001;
-	ir_graph     *irg         = get_irn_irg(block);
-	ir_exec_freq *exec_freq   = be_get_irg_exec_freq(irg);
-	ir_node      *prev        = get_prev_block_sched(block);
-	double        block_freq;
-	double        prev_freq = 0;  /**< execfreq of the fallthrough block */
-	double        jmp_freq  = 0;  /**< execfreq of all non-fallthrough blocks */
-	int           i, n_cfgpreds;
-
-	if (exec_freq == NULL)
-		return 0;
+	ir_node *prev      = get_prev_block_sched(block);
+	double   prev_freq = 0;  /**< execfreq of the fallthrough block */
+	double   jmp_freq  = 0;  /**< execfreq of all non-fallthrough blocks */
+	double   block_freq;
+	int      i, n_cfgpreds;
+
 	if (ia32_cg_config.label_alignment_factor <= 0)
 		return 0;
 
-	block_freq = get_block_execfreq(exec_freq, block);
+	block_freq = get_block_execfreq(block);
 	if (block_freq < DELTA)
 		return 0;
 
 	n_cfgpreds = get_Block_n_cfgpreds(block);
 	for (i = 0; i < n_cfgpreds; ++i) {
 		const ir_node *pred      = get_Block_cfgpred_block(block, i);
-		double         pred_freq = get_block_execfreq(exec_freq, pred);
+		double         pred_freq = get_block_execfreq(pred);
 
 		if (pred == prev) {
 			prev_freq += pred_freq;
@@ -1801,8 +1603,6 @@ static void ia32_emit_block_header(ir_node *block)
 {
 	ir_graph     *irg        = current_ir_graph;
 	int           need_label = block_needs_label(block);
-	ir_exec_freq *exec_freq  = be_get_irg_exec_freq(irg);
-	int           arity;
 
 	if (block == get_irg_end_block(irg))
 		return;
@@ -1833,37 +1633,7 @@ static void ia32_emit_block_header(ir_node *block)
 		}
 	}
 
-	if (need_label) {
-		be_gas_emit_block_name(block);
-		be_emit_char(':');
-
-		be_emit_pad_comment();
-		be_emit_cstring("   /* ");
-	} else {
-		be_emit_cstring("\t/* ");
-		be_gas_emit_block_name(block);
-		be_emit_cstring(": ");
-	}
-
-	be_emit_cstring("preds:");
-
-	/* emit list of pred blocks in comment */
-	arity = get_irn_arity(block);
-	if (arity <= 0) {
-		be_emit_cstring(" none");
-	} else {
-		int i;
-		for (i = 0; i < arity; ++i) {
-			ir_node *predblock = get_Block_cfgpred_block(block, i);
-			be_emit_irprintf(" %d", get_irn_node_nr(predblock));
-		}
-	}
-	if (exec_freq != NULL) {
-		be_emit_irprintf(", freq: %f",
-		                 get_block_execfreq(exec_freq, block));
-	}
-	be_emit_cstring(" */\n");
-	be_emit_write_line();
+	be_gas_begin_block(block, need_label);
 }
 
 /**
@@ -1872,12 +1642,20 @@ static void ia32_emit_block_header(ir_node *block)
  */
 static void ia32_gen_block(ir_node *block)
 {
-	ir_node *node;
-
 	ia32_emit_block_header(block);
 
+	if (sp_relative) {
+		ir_graph *irg = get_irn_irg(block);
+		callframe_offset = 4; /* 4 bytes for the return address */
+		/* ESP guessing, TODO perform a real ESP simulation */
+		if (block != get_irg_start_block(irg)) {
+			callframe_offset += frame_type_size;
+		}
+		be_dwarf_callframe_offset(callframe_offset);
+	}
+
 	/* emit the contents of the block */
-	be_dbg_set_dbg_info(get_irn_dbg_info(block));
+	be_dwarf_location(get_irn_dbg_info(block));
 	sched_foreach(block, node) {
 		ia32_emit_node(node);
 	}
@@ -1928,6 +1706,33 @@ static int cmp_exc_entry(const void *a, const void *b)
 	return +1;
 }
 
+static parameter_dbg_info_t *construct_parameter_infos(ir_graph *irg)
+{
+	ir_entity            *entity    = get_irg_entity(irg);
+	ir_type              *type      = get_entity_type(entity);
+	size_t                n_params  = get_method_n_params(type);
+	be_stack_layout_t    *layout    = be_get_irg_stack_layout(irg);
+	ir_type              *arg_type  = layout->arg_type;
+	size_t                n_members = get_compound_n_members(arg_type);
+	parameter_dbg_info_t *infos     = XMALLOCNZ(parameter_dbg_info_t, n_params);
+	size_t                i;
+
+	for (i = 0; i < n_members; ++i) {
+		ir_entity *member = get_compound_member(arg_type, i);
+		size_t     param;
+		if (!is_parameter_entity(member))
+			continue;
+		param = get_entity_parameter_number(member);
+		if (param == IR_VA_START_PARAMETER_NUMBER)
+			continue;
+		assert(infos[param].entity == NULL && infos[param].reg == NULL);
+		infos[param].reg    = NULL;
+		infos[param].entity = member;
+	}
+
+	return infos;
+}
+
 /**
  * Main driver. Emits the code for one routine.
  */
@@ -1938,10 +1743,12 @@ void ia32_gen_routine(ir_graph *irg)
 	const arch_env_t *arch_env  = be_get_irg_arch_env(irg);
 	ia32_irg_data_t  *irg_data  = ia32_get_irg_data(irg);
 	ir_node         **blk_sched = irg_data->blk_sched;
+	be_stack_layout_t *layout   = be_get_irg_stack_layout(irg);
+	parameter_dbg_info_t *infos;
 	int i, n;
 
-	isa      = (ia32_isa_t*) arch_env;
-	do_pic   = be_get_irg_options(irg)->pic;
+	isa    = (ia32_isa_t*) arch_env;
+	do_pic = be_options.pic;
 
 	be_gas_elf_type_char = '@';
 
@@ -1949,8 +1756,24 @@ void ia32_gen_routine(ir_graph *irg)
 
 	get_unique_label(pic_base_label, sizeof(pic_base_label), "PIC_BASE");
 
-	be_dbg_method_begin(entity);
-	be_gas_emit_function_prolog(entity, ia32_cg_config.function_alignment);
+	infos = construct_parameter_infos(irg);
+	be_gas_emit_function_prolog(entity, ia32_cg_config.function_alignment,
+	                            infos);
+	xfree(infos);
+
+	sp_relative = layout->sp_relative;
+	if (layout->sp_relative) {
+		ir_type *frame_type = get_irg_frame_type(irg);
+		frame_type_size = get_type_size_bytes(frame_type);
+		be_dwarf_callframe_register(&ia32_registers[REG_ESP]);
+	} else {
+		/* well not entirely correct here, we should emit this after the
+		 * "movl esp, ebp" */
+		be_dwarf_callframe_register(&ia32_registers[REG_EBP]);
+		/* TODO: do not hardcode the following */
+		be_dwarf_callframe_offset(8);
+		be_dwarf_callframe_spilloffset(&ia32_registers[REG_EBP], -8);
+	}
 
 	/* we use links to point to target blocks */
 	ir_reserve_resources(irg, IR_RESOURCE_IRN_LINK);
@@ -1972,9 +1795,6 @@ void ia32_gen_routine(ir_graph *irg)
 	}
 
 	be_gas_emit_function_epilog(entity);
-	be_dbg_method_end();
-	be_emit_char('\n');
-	be_emit_write_line();
 
 	ir_free_resources(irg, IR_RESOURCE_IRN_LINK);
 
@@ -2092,7 +1912,7 @@ static void bemit_entity(ir_entity *entity, bool entity_sign, int offset,
 	be_gas_emit_entity(entity);
 
 	if (get_entity_owner(entity) == get_tls_type()) {
-		if (get_entity_visibility(entity) == ir_visibility_external) {
+		if (!entity_has_definition(entity)) {
 			be_emit_cstring("@INDNTPOFF");
 		} else {
 			be_emit_cstring("@NTPOFF");
@@ -2304,7 +2124,7 @@ static void bemit_binop_with_imm(
 		if (get_ia32_op_type(node) == ia32_AddrModeS) {
 			bemit_mod_am(ruval, node);
 		} else {
-			const arch_register_t *reg = get_in_reg(node, n_ia32_binary_left);
+			const arch_register_t *reg = arch_get_irn_register_in(node, n_ia32_binary_left);
 			bemit_modru(reg, ruval);
 		}
 		bemit8((unsigned char)attr->offset);
@@ -2316,7 +2136,7 @@ static void bemit_binop_with_imm(
 			bemit8(opcode);
 			bemit_mod_am(ruval, node);
 		} else {
-			const arch_register_t *reg = get_in_reg(node, n_ia32_binary_left);
+			const arch_register_t *reg = arch_get_irn_register_in(node, n_ia32_binary_left);
 			if (reg->index == REG_GP_EAX) {
 				bemit8(opcode_ax);
 			} else {
@@ -2335,10 +2155,10 @@ static void bemit_binop_with_imm(
  */
 static void bemit_binop_2(const ir_node *node, unsigned code)
 {
-	const arch_register_t *out = get_in_reg(node, n_ia32_binary_left);
+	const arch_register_t *out = arch_get_irn_register_in(node, n_ia32_binary_left);
 	bemit8(code);
 	if (get_ia32_op_type(node) == ia32_Normal) {
-		const arch_register_t *op2 = get_in_reg(node, n_ia32_binary_right);
+		const arch_register_t *op2 = arch_get_irn_register_in(node, n_ia32_binary_right);
 		bemit_modrr(op2, out);
 	} else {
 		bemit_mod_am(reg_gp_map[out->index], node);
@@ -2365,7 +2185,7 @@ static void bemit_unop(const ir_node *node, unsigned char code, unsigned char ex
 {
 	bemit8(code);
 	if (get_ia32_op_type(node) == ia32_Normal) {
-		const arch_register_t *in = get_in_reg(node, input);
+		const arch_register_t *in = arch_get_irn_register_in(node, input);
 		bemit_modru(in, ext);
 	} else {
 		bemit_mod_am(ext, node);
@@ -2374,7 +2194,7 @@ static void bemit_unop(const ir_node *node, unsigned char code, unsigned char ex
 
 static void bemit_unop_reg(const ir_node *node, unsigned char code, int input)
 {
-	const arch_register_t *out = get_out_reg(node, 0);
+	const arch_register_t *out = arch_get_irn_register_out(node, 0);
 	bemit_unop(node, code, reg_gp_map[out->index], input);
 }
 
@@ -2387,6 +2207,12 @@ static void bemit_unop_mem(const ir_node *node, unsigned char code, unsigned cha
 	bemit_mod_am(ext, node);
 }
 
+static void bemit_0f_unop_reg(ir_node const *const node, unsigned char const code, int const input)
+{
+	bemit8(0x0F);
+	bemit_unop_reg(node, code, input);
+}
+
 static void bemit_immediate(const ir_node *node, bool relative)
 {
 	const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
@@ -2395,8 +2221,8 @@ static void bemit_immediate(const ir_node *node, bool relative)
 
 static void bemit_copy(const ir_node *copy)
 {
-	const arch_register_t *in  = get_in_reg(copy, 0);
-	const arch_register_t *out = get_out_reg(copy, 0);
+	const arch_register_t *in  = arch_get_irn_register_in(copy, 0);
+	const arch_register_t *out = arch_get_irn_register_out(copy, 0);
 
 	if (in == out)
 		return;
@@ -2404,13 +2230,9 @@ static void bemit_copy(const ir_node *copy)
 	if (arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp])
 		return;
 
-	if (get_irn_mode(copy) == mode_E) {
-		panic("NIY");
-	} else {
-		assert(arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_gp]);
-		bemit8(0x8B);
-		bemit_modrr(in, out);
-	}
+	assert(arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_gp]);
+	bemit8(0x8B);
+	bemit_modrr(in, out);
 }
 
 static void bemit_perm(const ir_node *node)
@@ -2432,9 +2254,9 @@ static void bemit_perm(const ir_node *node)
 		}
 	} else if (cls0 == &ia32_reg_classes[CLASS_ia32_xmm]) {
 		panic("unimplemented"); // TODO implement
-		//ia32_emitf(NULL, "\txorpd %R, %R\n", in1, in0);
-		//ia32_emitf(NULL, "\txorpd %R, %R\n", in0, in1);
-		//ia32_emitf(node, "\txorpd %R, %R\n", in1, in0);
+		//ia32_emitf(NULL, "xorpd %R, %R", in1, in0);
+		//ia32_emitf(NULL, "xorpd %R, %R", in0, in1);
+		//ia32_emitf(node, "xorpd %R, %R", in1, in0);
 	} else if (cls0 == &ia32_reg_classes[CLASS_ia32_vfp]) {
 		/* is a NOP */
 	} else if (cls0 == &ia32_reg_classes[CLASS_ia32_st]) {
@@ -2446,14 +2268,14 @@ static void bemit_perm(const ir_node *node)
 
 static void bemit_xor0(const ir_node *node)
 {
-	const arch_register_t *out = get_out_reg(node, 0);
+	const arch_register_t *out = arch_get_irn_register_out(node, 0);
 	bemit8(0x31);
 	bemit_modrr(out, out);
 }
 
 static void bemit_mov_const(const ir_node *node)
 {
-	const arch_register_t *out = get_out_reg(node, 0);
+	const arch_register_t *out = arch_get_irn_register_out(node, 0);
 	bemit8(0xB8 + reg_gp_map[out->index]);
 	bemit_immediate(node, false);
 }
@@ -2503,7 +2325,7 @@ static void bemit_##op(const ir_node *node) \
 		} \
 	} else { \
 		bemit8(ext << 3 | 1); \
-		bemit_mod_am(reg_gp_map[get_out_reg(val, 0)->index], node); \
+		bemit_mod_am(reg_gp_map[arch_get_irn_register(val)->index], node); \
 	} \
 } \
  \
@@ -2516,7 +2338,7 @@ static void bemit_##op##8bit(const ir_node *node) \
 		bemit8(get_ia32_immediate_attr_const(val)->offset); \
 	} else { \
 		bemit8(ext << 3); \
-		bemit_mod_am(reg_gp_map[get_out_reg(val, 0)->index], node); \
+		bemit_mod_am(reg_gp_map[arch_get_irn_register(val)->index], node); \
 	} \
 }
 
@@ -2548,7 +2370,7 @@ UNOP(ijmp,    0xFF, 4, n_ia32_IJmp_target)
 #define SHIFT(op, ext) \
 static void bemit_##op(const ir_node *node) \
 { \
-	const arch_register_t *out   = get_out_reg(node, 0); \
+	const arch_register_t *out   = arch_get_irn_register_out(node, 0); \
 	ir_node               *count = get_irn_n(node, 1); \
 	if (is_ia32_Immediate(count)) { \
 		int offset = get_ia32_immediate_attr_const(count)->offset; \
@@ -2597,8 +2419,8 @@ SHIFT(sar, 7)
 
 static void bemit_shld(const ir_node *node)
 {
-	const arch_register_t *in  = get_in_reg(node, n_ia32_ShlD_val_low);
-	const arch_register_t *out = get_out_reg(node, pn_ia32_ShlD_res);
+	const arch_register_t *in  = arch_get_irn_register_in(node, n_ia32_ShlD_val_low);
+	const arch_register_t *out = arch_get_irn_register_out(node, pn_ia32_ShlD_res);
 	ir_node *count = get_irn_n(node, n_ia32_ShlD_count);
 	bemit8(0x0F);
 	if (is_ia32_Immediate(count)) {
@@ -2613,8 +2435,8 @@ static void bemit_shld(const ir_node *node)
 
 static void bemit_shrd(const ir_node *node)
 {
-	const arch_register_t *in  = get_in_reg(node, n_ia32_ShrD_val_low);
-	const arch_register_t *out = get_out_reg(node, pn_ia32_ShrD_res);
+	const arch_register_t *in  = arch_get_irn_register_in(node, n_ia32_ShrD_val_low);
+	const arch_register_t *out = arch_get_irn_register_out(node, pn_ia32_ShrD_res);
 	ir_node *count = get_irn_n(node, n_ia32_ShrD_count);
 	bemit8(0x0F);
 	if (is_ia32_Immediate(count)) {
@@ -2632,7 +2454,7 @@ static void bemit_shrd(const ir_node *node)
  */
 static void bemit_setcc(const ir_node *node)
 {
-	const arch_register_t *dreg = get_out_reg(node, pn_ia32_Setcc_res);
+	const arch_register_t *dreg = arch_get_irn_register_out(node, pn_ia32_Setcc_res);
 
 	ia32_condition_code_t cc = get_ia32_condcode(node);
 	cc = determine_final_cc(node, n_ia32_Setcc_eflags, cc);
@@ -2674,11 +2496,21 @@ static void bemit_setcc(const ir_node *node)
 	}
 }
 
+static void bemit_bsf(ir_node const *const node)
+{
+	bemit_0f_unop_reg(node, 0xBC, n_ia32_Bsf_operand);
+}
+
+static void bemit_bsr(ir_node const *const node)
+{
+	bemit_0f_unop_reg(node, 0xBD, n_ia32_Bsr_operand);
+}
+
 static void bemit_cmovcc(const ir_node *node)
 {
 	const ia32_attr_t     *attr         = get_ia32_attr_const(node);
 	int                    ins_permuted = attr->data.ins_permuted;
-	const arch_register_t *out          = arch_irn_get_register(node, pn_ia32_res);
+	const arch_register_t *out          = arch_get_irn_register_out(node, pn_ia32_res);
 	ia32_condition_code_t  cc           = get_ia32_condcode(node);
 	const arch_register_t *in_true;
 	const arch_register_t *in_false;
@@ -2745,7 +2577,7 @@ static void bemit_cmp(const ir_node *node)
 				if (get_ia32_op_type(node) == ia32_AddrModeS) {
 					bemit_mod_am(7, node);
 				} else {
-					const arch_register_t *reg = get_in_reg(node, n_ia32_binary_left);
+					const arch_register_t *reg = arch_get_irn_register_in(node, n_ia32_binary_left);
 					bemit_modru(reg, 7);
 				}
 				bemit8((unsigned char)attr->offset);
@@ -2757,7 +2589,7 @@ static void bemit_cmp(const ir_node *node)
 					bemit8(0x81);
 					bemit_mod_am(7, node);
 				} else {
-					const arch_register_t *reg = get_in_reg(node, n_ia32_binary_left);
+					const arch_register_t *reg = arch_get_irn_register_in(node, n_ia32_binary_left);
 					if (reg->index == REG_GP_EAX) {
 						bemit8(0x3D);
 					} else {
@@ -2774,10 +2606,10 @@ static void bemit_cmp(const ir_node *node)
 		}
 		panic("invalid imm size?!?");
 	} else {
-		const arch_register_t *out = get_in_reg(node, n_ia32_binary_left);
+		const arch_register_t *out = arch_get_irn_register_in(node, n_ia32_binary_left);
 		bemit8(0x3B);
 		if (get_ia32_op_type(node) == ia32_Normal) {
-			const arch_register_t *op2 = get_in_reg(node, n_ia32_binary_right);
+			const arch_register_t *op2 = arch_get_irn_register_in(node, n_ia32_binary_right);
 			bemit_modrr(op2, out);
 		} else {
 			bemit_mod_am(reg_gp_map[out->index], node);
@@ -2790,7 +2622,7 @@ static void bemit_cmp8bit(const ir_node *node)
 	ir_node *right = get_irn_n(node, n_ia32_binary_right);
 	if (is_ia32_Immediate(right)) {
 		if (get_ia32_op_type(node) == ia32_Normal) {
-			const arch_register_t *out = get_in_reg(node, n_ia32_Cmp_left);
+			const arch_register_t *out = arch_get_irn_register_in(node, n_ia32_Cmp_left);
 			if (out->index == REG_GP_EAX) {
 				bemit8(0x3C);
 			} else {
@@ -2803,10 +2635,10 @@ static void bemit_cmp8bit(const ir_node *node)
 		}
 		bemit8(get_ia32_immediate_attr_const(right)->offset);
 	} else {
-		const arch_register_t *out = get_in_reg(node, n_ia32_Cmp_left);
+		const arch_register_t *out = arch_get_irn_register_in(node, n_ia32_Cmp_left);
 		bemit8(0x3A);
 		if (get_ia32_op_type(node) == ia32_Normal) {
-			const arch_register_t *in = get_in_reg(node, n_ia32_Cmp_right);
+			const arch_register_t *in = arch_get_irn_register_in(node, n_ia32_Cmp_right);
 			bemit_modrr(out, in);
 		} else {
 			bemit_mod_am(reg_gp_map[out->index], node);
@@ -2819,7 +2651,7 @@ static void bemit_test8bit(const ir_node *node)
 	ir_node *right = get_irn_n(node, n_ia32_Test8Bit_right);
 	if (is_ia32_Immediate(right)) {
 		if (get_ia32_op_type(node) == ia32_Normal) {
-			const arch_register_t *out = get_in_reg(node, n_ia32_Test8Bit_left);
+			const arch_register_t *out = arch_get_irn_register_in(node, n_ia32_Test8Bit_left);
 			if (out->index == REG_GP_EAX) {
 				bemit8(0xA8);
 			} else {
@@ -2832,10 +2664,10 @@ static void bemit_test8bit(const ir_node *node)
 		}
 		bemit8(get_ia32_immediate_attr_const(right)->offset);
 	} else {
-		const arch_register_t *out = get_in_reg(node, n_ia32_Test8Bit_left);
+		const arch_register_t *out = arch_get_irn_register_in(node, n_ia32_Test8Bit_left);
 		bemit8(0x84);
 		if (get_ia32_op_type(node) == ia32_Normal) {
-			const arch_register_t *in = get_in_reg(node, n_ia32_Test8Bit_right);
+			const arch_register_t *in = arch_get_irn_register_in(node, n_ia32_Test8Bit_right);
 			bemit_modrr(out, in);
 		} else {
 			bemit_mod_am(reg_gp_map[out->index], node);
@@ -2857,20 +2689,19 @@ static void bemit_imul(const ir_node *node)
 			bemit32(imm);
 		}
 	} else {
-		bemit8(0x0F);
-		bemit_unop_reg(node, 0xAF, n_ia32_IMul_right);
+		bemit_0f_unop_reg(node, 0xAF, n_ia32_IMul_right);
 	}
 }
 
 static void bemit_dec(const ir_node *node)
 {
-	const arch_register_t *out = get_out_reg(node, pn_ia32_Dec_res);
+	const arch_register_t *out = arch_get_irn_register_out(node, pn_ia32_Dec_res);
 	bemit8(0x48 + reg_gp_map[out->index]);
 }
 
 static void bemit_inc(const ir_node *node)
 {
-	const arch_register_t *out = get_out_reg(node, pn_ia32_Inc_res);
+	const arch_register_t *out = arch_get_irn_register_out(node, pn_ia32_Inc_res);
 	bemit8(0x40 + reg_gp_map[out->index]);
 }
 
@@ -2887,7 +2718,7 @@ UNOPMEM(decmem, 0xFE, 1)
 
 static void bemit_ldtls(const ir_node *node)
 {
-	const arch_register_t *out = get_out_reg(node, 0);
+	const arch_register_t *out = arch_get_irn_register_out(node, 0);
 
 	bemit8(0x65); // gs:
 	if (out->index == REG_GP_EAX) {
@@ -2904,7 +2735,7 @@ static void bemit_ldtls(const ir_node *node)
  */
 static void bemit_lea(const ir_node *node)
 {
-	const arch_register_t *out = get_out_reg(node, 0);
+	const arch_register_t *out = arch_get_irn_register_out(node, 0);
 	bemit8(0x8D);
 	bemit_mod_am(reg_gp_map[out->index], node);
 }
@@ -2960,10 +2791,10 @@ static void bemit_helper_zero(const arch_register_t *reg)
 
 static void bemit_minus64bit(const ir_node *node)
 {
-	const arch_register_t *in_lo  = get_in_reg(node, 0);
-	const arch_register_t *in_hi  = get_in_reg(node, 1);
-	const arch_register_t *out_lo = get_out_reg(node, 0);
-	const arch_register_t *out_hi = get_out_reg(node, 1);
+	const arch_register_t *in_lo  = arch_get_irn_register_in(node, 0);
+	const arch_register_t *in_hi  = arch_get_irn_register_in(node, 1);
+	const arch_register_t *out_lo = arch_get_irn_register_out(node, 0);
+	const arch_register_t *out_hi = arch_get_irn_register_out(node, 1);
 
 	if (out_lo == in_lo) {
 		if (out_hi != in_hi) {
@@ -3049,7 +2880,7 @@ EMIT_SINGLEOP(stc,   0xF9)
  */
 static void bemit_load(const ir_node *node)
 {
-	const arch_register_t *out = get_out_reg(node, 0);
+	const arch_register_t *out = arch_get_irn_register_out(node, 0);
 
 	if (out->index == REG_GP_EAX) {
 		ir_node   *base      = get_irn_n(node, n_ia32_base);
@@ -3094,7 +2925,7 @@ static void bemit_store(const ir_node *node)
 			bemit_immediate(value, false);
 		}
 	} else {
-		const arch_register_t *in = get_in_reg(node, n_ia32_Store_val);
+		const arch_register_t *in = arch_get_irn_register_in(node, n_ia32_Store_val);
 
 		if (in->index == REG_GP_EAX) {
 			ir_node   *base      = get_irn_n(node, n_ia32_base);
@@ -3131,18 +2962,14 @@ static void bemit_store(const ir_node *node)
 
 static void bemit_conv_i2i(const ir_node *node)
 {
-	ir_mode  *smaller_mode = get_ia32_ls_mode(node);
-	unsigned  opcode;
-
-	bemit8(0x0F);
 	/*        8 16 bit source
 	 * movzx B6 B7
-	 * movsx BE BF
-	 */
-	opcode = 0xB6;
+	 * movsx BE BF */
+	ir_mode *const smaller_mode = get_ia32_ls_mode(node);
+	unsigned       opcode       = 0xB6;
 	if (mode_is_signed(smaller_mode))           opcode |= 0x08;
 	if (get_mode_size_bits(smaller_mode) == 16) opcode |= 0x01;
-	bemit_unop_reg(node, opcode, n_ia32_Conv_I2I_val);
+	bemit_0f_unop_reg(node, opcode, n_ia32_Conv_I2I_val);
 }
 
 /**
@@ -3173,7 +3000,7 @@ static void bemit_push(const ir_node *node)
 		bemit8(0xFF);
 		bemit_mod_am(6, node);
 	} else {
-		const arch_register_t *reg = get_in_reg(node, n_ia32_Push_val);
+		const arch_register_t *reg = arch_get_irn_register_in(node, n_ia32_Push_val);
 		bemit8(0x50 + reg_gp_map[reg->index]);
 	}
 }
@@ -3183,7 +3010,7 @@ static void bemit_push(const ir_node *node)
  */
 static void bemit_pop(const ir_node *node)
 {
-	const arch_register_t *reg = get_out_reg(node, pn_ia32_Pop_res);
+	const arch_register_t *reg = arch_get_irn_register_out(node, pn_ia32_Pop_res);
 	bemit8(0x58 + reg_gp_map[reg->index]);
 }
 
@@ -3219,7 +3046,7 @@ static void bemit_jump(const ir_node *node)
 	bemit_jmp(get_cfop_target_block(node));
 }
 
-static void bemit_jcc(int pnc, const ir_node *dest_block)
+static void bemit_jcc(ia32_condition_code_t pnc, const ir_node *dest_block)
 {
 	unsigned char cc = pnc2cc(pnc);
 	bemit8(0x0F);
@@ -3291,13 +3118,13 @@ static void bemit_ia32_jcc(const ir_node *node)
 
 static void bemit_switchjmp(const ir_node *node)
 {
-	ir_entity *jump_table = get_ia32_am_sc(node);
-	long       default_pn = get_ia32_default_pn(node);
+	ir_entity             *jump_table = get_ia32_am_sc(node);
+	const ir_switch_table *table      = get_ia32_switch_table(node);
 
 	bemit8(0xFF); // jmp *tbl.label(,%in,4)
 	bemit_mod_am(0x05, node);
 
-	emit_jump_table(node, default_pn, jump_table, get_cfop_target_block);
+	be_emit_jump_table(node, table, jump_table, get_cfop_target_block);
 }
 
 /**
@@ -3322,7 +3149,7 @@ static void bemit_subsp(const ir_node *node)
 	bemit_sub(node);
 	/* mov %esp, %out */
 	bemit8(0x8B);
-	out = get_out_reg(node, 1);
+	out = arch_get_irn_register_out(node, 1);
 	bemit8(MOD_REG | ENC_REG(reg_gp_map[out->index]) | ENC_RM(0x04));
 }
 
@@ -3347,7 +3174,7 @@ static void bemit_incsp(const ir_node *node)
 	size = get_signed_imm_size(offs);
 	bemit8(size == 1 ? 0x83 : 0x81);
 
-	reg  = get_out_reg(node, 0);
+	reg  = arch_get_irn_register_out(node, 0);
 	bemit_modru(reg, ext);
 
 	if (size == 1) {
@@ -3411,6 +3238,12 @@ static void bemit_fbinopp(const ir_node *node, unsigned const code)
 	bemit8(code + out->index);
 }
 
+static void bemit_fop_reg(ir_node const *const node, unsigned char const op0, unsigned char const op1)
+{
+	bemit8(op0);
+	bemit8(op1 + get_ia32_x87_attr_const(node)->x87[0]->index);
+}
+
 static void bemit_fabs(const ir_node *node)
 {
 	(void)node;
@@ -3576,23 +3409,17 @@ static void bemit_fmulp(const ir_node *node)
 
 static void bemit_fpop(const ir_node *node)
 {
-	const ia32_x87_attr_t *attr = get_ia32_x87_attr_const(node);
-	bemit8(0xDD);
-	bemit8(0xD8 + attr->x87[0]->index);
+	bemit_fop_reg(node, 0xDD, 0xD8);
 }
 
 static void bemit_fpush(const ir_node *node)
 {
-	const ia32_x87_attr_t *attr = get_ia32_x87_attr_const(node);
-	bemit8(0xD9);
-	bemit8(0xC0 + attr->x87[0]->index);
+	bemit_fop_reg(node, 0xD9, 0xC0);
 }
 
 static void bemit_fpushcopy(const ir_node *node)
 {
-	const ia32_x87_attr_t *attr = get_ia32_x87_attr_const(node);
-	bemit8(0xD9);
-	bemit8(0xC0 + attr->x87[0]->index);
+	bemit_fop_reg(node, 0xD9, 0xC0);
 }
 
 static void bemit_fst(const ir_node *node)
@@ -3718,9 +3545,7 @@ static void bemit_fucomppfnstsw(const ir_node *node)
 
 static void bemit_fxch(const ir_node *node)
 {
-	const ia32_x87_attr_t *attr = get_ia32_x87_attr_const(node);
-	bemit8(0xD9);
-	bemit8(0xC8 + attr->x87[0]->index);
+	bemit_fop_reg(node, 0xD9, 0xC8);
 }
 
 /**
@@ -3739,7 +3564,7 @@ static void register_emitter(ir_op *op, emit_func func)
 static void ia32_register_binary_emitters(void)
 {
 	/* first clear the generic function pointer for all ops */
-	clear_irp_opcodes_generic_func();
+	ir_clear_opcodes_generic_func();
 
 	/* benode emitter */
 	register_emitter(op_be_Copy,            bemit_copy);
@@ -3755,6 +3580,8 @@ static void ia32_register_binary_emitters(void)
 	register_emitter(op_ia32_AndMem,        bemit_andmem);
 	register_emitter(op_ia32_AndMem8Bit,    bemit_andmem8bit);
 	register_emitter(op_ia32_Breakpoint,    bemit_int3);
+	register_emitter(op_ia32_Bsf,           bemit_bsf);
+	register_emitter(op_ia32_Bsr,           bemit_bsr);
 	register_emitter(op_ia32_CMovcc,        bemit_cmovcc);
 	register_emitter(op_ia32_Call,          bemit_call);
 	register_emitter(op_ia32_Cltd,          bemit_cltd);
@@ -3861,6 +3688,7 @@ static void ia32_register_binary_emitters(void)
 
 	/* ignore the following nodes */
 	register_emitter(op_ia32_ProduceVal,   emit_Nothing);
+	register_emitter(op_ia32_Unknown,      emit_Nothing);
 	register_emitter(op_be_Keep,           emit_Nothing);
 	register_emitter(op_be_Start,          emit_Nothing);
 	register_emitter(op_Phi,               emit_Nothing);
@@ -3869,8 +3697,6 @@ static void ia32_register_binary_emitters(void)
 
 static void gen_binary_block(ir_node *block)
 {
-	ir_node *node;
-
 	ia32_emit_block_header(block);
 
 	/* emit the contents of the block */
@@ -3886,12 +3712,16 @@ void ia32_gen_binary_routine(ir_graph *irg)
 	ia32_irg_data_t  *irg_data  = ia32_get_irg_data(irg);
 	ir_node         **blk_sched = irg_data->blk_sched;
 	size_t            i, n;
+	parameter_dbg_info_t *infos;
 
 	isa = (ia32_isa_t*) arch_env;
 
 	ia32_register_binary_emitters();
 
-	be_gas_emit_function_prolog(entity, ia32_cg_config.function_alignment);
+	infos = construct_parameter_infos(irg);
+	be_gas_emit_function_prolog(entity, ia32_cg_config.function_alignment,
+	                            NULL);
+	xfree(infos);
 
 	/* we use links to point to target blocks */
 	ir_reserve_resources(irg, IR_RESOURCE_IRN_LINK);
@@ -3912,9 +3742,6 @@ void ia32_gen_binary_routine(ir_graph *irg)
 	}
 
 	be_gas_emit_function_epilog(entity);
-	be_dbg_method_end();
-	be_emit_char('\n');
-	be_emit_write_line();
 
 	ir_free_resources(irg, IR_RESOURCE_IRN_LINK);
 }