X-Git-Url: http://nsz.repo.hu/git/?a=blobdiff_plain;f=ir%2Fbe%2Fia32%2Fia32_emitter.c;h=34c75bb322cc186d66808e197a9f8525c1bd0406;hb=d0bb153368997acebe0339c165bec2ec3235581b;hp=babfd970a178075ec0b629913fefb8507bb8e809;hpb=fd07b1498438629b4ef81343573377e3e535048f;p=libfirm diff --git a/ir/be/ia32/ia32_emitter.c b/ir/be/ia32/ia32_emitter.c index babfd970a..34c75bb32 100644 --- a/ir/be/ia32/ia32_emitter.c +++ b/ir/be/ia32/ia32_emitter.c @@ -23,9 +23,7 @@ * @author Christian Wuerdig, Matthias Braun * @version $Id$ */ -#ifdef HAVE_CONFIG_H #include "config.h" -#endif #include @@ -68,7 +66,6 @@ DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;) #define SNPRINTF_BUF_LEN 128 -static const arch_env_t *arch_env; static const ia32_isa_t *isa; static ia32_code_gen_t *cg; static int do_pic; @@ -129,7 +126,7 @@ static const arch_register_t *get_in_reg(const ir_node *irn, int pos) in register we need. */ op = get_irn_n(irn, pos); - reg = arch_get_irn_register(arch_env, op); + reg = arch_get_irn_register(op); assert(reg && "no in register found"); @@ -138,10 +135,7 @@ static const arch_register_t *get_in_reg(const ir_node *irn, int pos) /* in case of unknown register: just return a valid register */ if (reg == &ia32_gp_regs[REG_GP_UKNWN]) { - const arch_register_req_t *req; - - /* ask for the requirements */ - req = arch_get_register_req(arch_env, irn, pos); + const arch_register_req_t *req = arch_get_register_req(irn, pos); if (arch_register_req_is(req, limited)) { /* in case of limited requirements: get the first allowed register */ @@ -171,7 +165,7 @@ static const arch_register_t *get_out_reg(const ir_node *irn, int pos) if (get_irn_mode(irn) != mode_T) { assert(pos == 0); - reg = arch_get_irn_register(arch_env, irn); + reg = arch_get_irn_register(irn); } else if (is_ia32_irn(irn)) { reg = get_ia32_out_reg(irn, pos); } else { @@ -181,7 +175,7 @@ static const arch_register_t *get_out_reg(const ir_node *irn, int pos) proj = get_edge_src_irn(edge); assert(is_Proj(proj) && "non-Proj from mode_T node"); if (get_Proj_proj(proj) == pos) { - reg = arch_get_irn_register(arch_env, proj); + reg = arch_get_irn_register(proj); break; } } @@ -599,9 +593,9 @@ static void ia32_emitf(const ir_node *node, const char *fmt, ...) case 'R': { const arch_register_t *reg = va_arg(ap, const arch_register_t*); + if (mod & EMIT_ALTERNATE_AM) + be_emit_char('*'); if (get_ia32_op_type(node) == ia32_AddrModeS) { - if (mod & EMIT_ALTERNATE_AM) - be_emit_char('*'); ia32_emit_am(node); } else { emit_register(reg, NULL); @@ -681,7 +675,11 @@ emit_S: be_emit_char('$'); emit_ia32_Immediate_no_prefix(in); } else { - const arch_register_t *reg = get_in_reg(node, pos); + const arch_register_t *reg; + + if (mod & EMIT_ALTERNATE_AM) + be_emit_char('*'); + reg = get_in_reg(node, pos); emit_register(reg, mod & EMIT_RESPECT_LS ? get_ia32_ls_mode(node) : NULL); } break; @@ -1067,17 +1065,15 @@ static void emit_ia32_CMov(const ir_node *node) { const ia32_attr_t *attr = get_ia32_attr_const(node); int ins_permuted = attr->data.ins_permuted; - const arch_register_t *out = arch_get_irn_register(arch_env, node); + const arch_register_t *out = arch_get_irn_register(node); pn_Cmp pnc = get_ia32_condcode(node); const arch_register_t *in_true; const arch_register_t *in_false; pnc = determine_final_pnc(node, n_ia32_CMov_eflags, pnc); - in_true = arch_get_irn_register(arch_env, - get_irn_n(node, n_ia32_CMov_val_true)); - in_false = arch_get_irn_register(arch_env, - get_irn_n(node, n_ia32_CMov_val_false)); + in_true = arch_get_irn_register(get_irn_n(node, n_ia32_CMov_val_true)); + in_false = arch_get_irn_register(get_irn_n(node, n_ia32_CMov_val_false)); /* should be same constraint fullfilled? */ if (out == in_false) { @@ -1535,7 +1531,7 @@ static void emit_ia32_Conv_I2I(const ir_node *node) if (signed_mode && smaller_bits == 16 && &ia32_gp_regs[REG_EAX] == get_out_reg(node, 0) && - &ia32_gp_regs[REG_EAX] == arch_get_irn_register(arch_env, get_irn_n(node, n_ia32_unary_op))) { + &ia32_gp_regs[REG_EAX] == arch_get_irn_register(get_irn_n(node, n_ia32_unary_op))) { /* argument and result are both in EAX and signedness is ok: use the * smaller cwtl opcode */ ia32_emitf(node, "\tcwtl\n"); @@ -1588,8 +1584,8 @@ static void emit_be_IncSP(const ir_node *node) */ static void Copy_emitter(const ir_node *node, const ir_node *op) { - const arch_register_t *in = arch_get_irn_register(arch_env, op); - const arch_register_t *out = arch_get_irn_register(arch_env, node); + const arch_register_t *in = arch_get_irn_register(op); + const arch_register_t *out = arch_get_irn_register(node); if (in == out) { return; @@ -1625,8 +1621,8 @@ static void emit_be_Perm(const ir_node *node) const arch_register_t *in0, *in1; const arch_register_class_t *cls0, *cls1; - in0 = arch_get_irn_register(arch_env, get_irn_n(node, 0)); - in1 = arch_get_irn_register(arch_env, get_irn_n(node, 1)); + in0 = arch_get_irn_register(get_irn_n(node, 0)); + in1 = arch_get_irn_register(get_irn_n(node, 1)); cls0 = arch_register_get_class(in0); cls1 = arch_register_get_class(in1); @@ -2112,8 +2108,7 @@ void ia32_gen_routine(ia32_code_gen_t *ia32_cg, ir_graph *irg) int i, n; cg = ia32_cg; - isa = (const ia32_isa_t*) cg->arch_env; - arch_env = cg->arch_env; + isa = cg->isa; do_pic = cg->birg->main_env->options->pic; ia32_register_emitters();